IRF1405PBF [INFINEON]
AUTOMOTIVE MOSFET; 汽车MOSFET型号: | IRF1405PBF |
厂家: | Infineon |
描述: | AUTOMOTIVE MOSFET |
文件: | 总9页 (文件大小:208K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PD - 94969
AUTOMOTIVE MOSFET
IRF1405PbF
Typical Applications
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Electric Power Steering (EPS)
Anti-lock Braking System (ABS)
Wiper Control
Climate Control
Power Door
HEXFET® Power MOSFET
D
VDSS = 55V
Lead-Free
RDS(on) = 5.3mΩ
Benefits
G
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Advanced Process Technology
Ultra Low On-Resistance
Dynamic dv/dt Rating
175°C Operating Temperature
Fast Switching
ID = 169A
S
Repetitive Avalanche Allowed up to Tjmax
Description
Specifically designed for Automotive applications, this
Stripe Planar design of HEXFET® Power MOSFETs
utilizes the latest processing techniques to achieve
extremelylow on-resistancepersiliconarea. Additional
features of this HEXFET power MOSFET are a 175°C
junction operating temperature, fast switching speed
andimprovedrepetitiveavalancherating.Thesebenefits
combine to make this design an extremely efficient and
reliable device for use in Automotive applications and a
wide variety of other applications.
TO-220AB
Absolute Maximum Ratings
Parameter
Max.
Units
ID @ TC = 25°C
ID @ TC = 100°C
IDM
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
169
118
A
680
PD @TC = 25°C
Power Dissipation
330
W
W/°C
V
Linear Derating Factor
2.2
VGS
EAS
IAR
Gate-to-Source Voltage
± 20
560
Single Pulse Avalanche Energy
Avalanche Current
mJ
A
See Fig.12a, 12b, 15, 16
EAR
dv/dt
TJ
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
mJ
V/ns
5.0
-55 to + 175
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting Torque, 6-32 or M3 screw
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
Junction-to-Case
Typ.
–––
Max.
Units
°C/W
RθJC
0.45
–––
62
RθCS
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
0.50
–––
RθJA
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1
02/02/04
IRF1405PbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
Min. Typ. Max. Units
55 ––– –––
Conditions
VGS = 0V, ID = 250µA
V(BR)DSS
V
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.057 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on)
VGS(th)
gfs
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
–––
2.0
69
4.6 5.3
––– 4.0
––– –––
mΩ VGS = 10V, ID = 101A
V
VDS = 10V, ID = 250µA
Forward Transconductance
S
VDS = 25V, ID = 110A
––– ––– 20
––– ––– 250
––– ––– 200
––– ––– -200
––– 170 260
VDS = 55V, VGS = 0V
IDSS
Drain-to-Source Leakage Current
µA
nA
VDS = 44V, VGS = 0V, TJ = 150°C
VGS = 20V
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
IGSS
VGS = -20V
Qg
ID = 101A
Qgs
Qgd
td(on)
tr
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
–––
–––
–––
44
62
66
93
nC VDS = 44V
VGS = 10V
VDD = 38V
13 –––
––– 190 –––
––– 130 –––
––– 110 –––
ID = 110A
ns
td(off)
tf
Turn-Off Delay Time
Fall Time
RG = 1.1Ω
VGS = 10V
D
S
Between lead,
LD
LS
Internal Drain Inductance
Internal Source Inductance
–––
–––
4.5 –––
–––
6mm (0.25in.)
nH
G
from package
7.5
and center of die contact
Ciss
Input Capacitance
––– 5480 –––
––– 1210 –––
––– 280 –––
––– 5210 –––
––– 900 –––
––– 1500 –––
VGS = 0V
Coss
Output Capacitance
pF
VDS = 25V
Crss
Reverse Transfer Capacitance
Output Capacitance
ƒ = 1.0MHz, See Fig. 5
Coss
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
VGS = 0V, VDS = 44V, ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 44V
Coss
Output Capacitance
Coss eff.
Effective Output Capacitance ꢀ
Source-Drain Ratings and Characteristics
Parameter
Continuous Source Current
(Body Diode)
Min. Typ. Max. Units
Conditions
MOSFET symbol
D
IS
––– –––
169
showing the
A
G
ISM
Pulsed Source Current
(Body Diode)
integral reverse
––– ––– 680
S
p-n junction diode.
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
––– ––– 1.3
––– 88 130
––– 250 380
V
TJ = 25°C, IS = 101A, VGS = 0V
ns
TJ = 25°C, IF = 101A
Qrr
ton
nC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
Starting TJ = 25°C, L = 0.11mH
RG = 25Ω, IAS = 101A. (See Figure 12).
ISD ≤ 101A, di/dt ≤ 210A/µs, VDD ≤ V(BR)DSS
TJ ≤ 175°C
ꢀ Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
.
Calculated continuous current based on maximum allowable
junction temperature. Package limitation current is 75A.
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
avalanche performance.
,
Pulse width ≤ 400µs; duty cycle ≤ 2%.
2
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IRF1405PbF
1000
100
10
1000
100
10
VGS
15V
VGS
15V
TOP
TOP
10V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM4.5V
BOTTOM 4.5V
4.5V
4.5V
20µs PULSE WIDTH
20µs PULSE WIDTH
T = 25 C
J
°
°
T = 175 C
J
1
0.1
0.1
1
10
100
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
3.0
169A
=
I
D
°
T = 25 C
J
°
T = 175 C
2.5
2.0
1.5
1.0
0.5
0.0
J
100
10
1
V
= 25V
DS
V
=10V
GS
20µs PULSE WIDTH
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
°
4
6
8
10 12
T , Junction Temperature( C)
J
V
, Gate-to-Source Voltage (V)
GS
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
Vs. Temperature
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3
IRF1405PbF
100000
V
C
= 0V,
f = 1 MHZ
GS
= C + C
,
C
SHORTED
iss
gs
gd
ds
20
16
12
8
C
= C
I
D
= 101A
rss
gd
C
= C + C
V
V
= 44V
= 27V
oss
ds
gd
DS
DS
10000
1000
100
Ciss
Coss
Crss
4
1
10
100
FOR TEST CIRCUIT
SEE FIGURE 13
V
, Drain-to-Source Voltage (V)
DS
0
0
60
120
180
240
300
Q
, Total Gate Charge (nC)
G
Fig 6. Typical Gate Charge Vs.
Fig 5. Typical Capacitance Vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
1000
10000
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R (on)
DS
°
T = 175 C
J
100
100µsec
1msec
°
T = 25 C
J
10
Tc = 25°C
Tj = 175°C
Single Pulse
10msec
100
V
= 0 V
GS
2.5
1
0.0
1
0.5
1.0
1.5
2.0
3.0
0
1
10
1000
V
,Source-to-Drain Voltage (V)
SD
V
, Drain-toSource Voltage (V)
DS
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
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IRF1405PbF
200
160
120
80
RD
VDS
LIMITED BY PACKAGE
VGS
10V
DꢀUꢀTꢀ
RG
+VDD
-
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
40
V
DS
90%
0
25
50
75
100
125
150
175
°
T , Case Temperature ( C)
C
10%
V
GS
Fig 9. Maximum Drain Current Vs.
t
t
r
t
t
f
d(on)
d(off)
Case Temperature
Fig 10b. Switching Time Waveforms
1
D = 0.50
0.20
0.1
0.01
0.10
0.05
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
P
DM
t
1
t
2
Notes:
1. Duty factor D = t / t
1
2
2. Peak T =P
x Z
+ T
thJC C
J
DM
0.001
0.00001
0.0001
0.001
0.01
0.1
t , Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRF1405PbF
1200
1000
800
600
400
200
0
15V
I
D
TOP
41A
71A
DRIVER
+
BOTTOM 101A
L
V
DS
D.U.T
R
G
V
DD
-
I
A
AS
20V
t
0.01Ω
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
25
50
75
100
125
150
175
°
Starting T , Junction Temperature( C)
J
I
AS
Fig 12c. Maximum Avalanche Energy
Fig 12b. Unclamped Inductive Waveforms
Vs. Drain Current
Q
G
10 V
Q
Q
4.0
3.5
3.0
2.5
2.0
1.5
GS
GD
V
G
I
= 250µA
Charge
D
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
.3µF
+
V
DS
D.U.T.
-
-75 -50 -25
0
25 50 75 100 125 150 175
, Temperature ( °C )
V
GS
T
3mA
J
I
I
D
G
Current Sampling Resistors
Fig 14. Threshold Voltage Vs. Temperature
Fig 13b. Gate Charge Test Circuit
6
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IRF1405PbF
1000
100
10
Duty Cycle = Single Pulse
0.01
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming
Tj = 25°C due to
∆
avalanche losses
0.05
0.10
1
1.0E-08
1.0E-07
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current Vs.Pulsewidth
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
600
500
400
300
200
100
0
TOP
BOTTOM 10% Duty Cycle
= 101A
Single Pulse
I
D
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
25
50
75
100
125
150
175
Starting T , Junction Temperature (°C)
J
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
Fig 16. Maximum Avalanche Energy
EAS (AR) = PD (ave)·tav
Vs. Temperature
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IRF1405PbF
Peak Diode Recovery dv/dt Test Circuit
+
-
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
DꢀUꢀT*
+
-
-
+
RG
• dv/dt controlled by RG
• ISD controlled by Duty Factor "D"
• DꢀUꢀTꢀ - Device Under Test
+
-
VDD
VGS
* Reverse Polarity of DꢀUꢀT for P-Channel
Driver Gate Drive
P.W.
Period
Period
D =
P.W.
V
[
=10V
] ***
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
[
DD
]
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
[
]
SD
Ripple ≤ 5%
*** VGS = 5ꢀ0V for Logic Level and 3V Drive Devices
Fig 17ꢀ For N-channel HEXFET® power MOSFETs
8
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IRF1405PbF
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
10.54 (.415)
3.78 (.149)
- B -
10.29 (.405)
2.87 (.113)
2.62 (.103)
4.69 (.185)
4.20 (.165)
3.54 (.139)
1.32 (.052)
1.22 (.048)
- A -
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
LEAD ASSIGNMENTS
1.15 (.045)
MIN
HEXFET
IGBTs, CoPACK
1
2
3
1- GATE
2- DRAIN
1- GATE
2- COLLECTOR
3- EMITTER
4- COLLECTOR
3- SOURCE
4- DRAIN
14.09 (.555)
13.47 (.530)
4.06 (.160)
3.55 (.140)
0.93 (.037)
0.69 (.027)
0.55 (.022)
0.46 (.018)
3X
3X
1.40 (.055)
3X
1.15 (.045)
0.36 (.014)
M
B A M
2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
NOTES:
1
2
DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
CONTROLLING DIMENSION : INCH
3
4
OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
TO-220AB Part Marking Information
EXAMPLE: T HIS IS AN IRF1010
LOT CODE 1789
PART NUMBER
AS S EMBLED ON WW 19, 1997
IN THE AS S EMBLY LINE "C"
INTERNATIONAL
RECTIFIER
LOGO
Note: "P" in assembly line
position indicates "Lead-Free"
DAT E CODE
YEAR 7 = 1997
WEEK 19
AS S E MB LY
LOT CODE
LINE C
TO-220AB packages are not recommended for Surface Mount Application.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Automotive [Q101] market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 02/04
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9
相关型号:
IRF1405STRLPBF
Power Field-Effect Transistor, 75A I(D), 55V, 0.0053ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, LEAD FREE, PLASTIC, D2PAK-3
INFINEON
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