IRF7580MPbF [INFINEON]

DirectFET® N-Channel Power MOSFET;
IRF7580MPbF
型号: IRF7580MPbF
厂家: Infineon    Infineon
描述:

DirectFET® N-Channel Power MOSFET

文件: 总11页 (文件大小:515K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
StrongIRFET™  
IRF7580MTRPbF  
DirectFET® N-Channel Power MOSFET  
Application  
Brushed motor drive applications  
BLDC motor drive applications  
Battery powered circuits  
Half-bridge and full-bridge topologies  
Synchronous rectifier applications  
Resonant mode power supplies  
OR-ing and redundant power switches  
DC/DC and AC/DC converters  
DC/AC inverters  
VDSS  
RDS(on) typ.  
max  
60V  
2.9m  
3.6m  
116A  
ID  
S
S
S
S
S
D
D
Benefits  
G
Improved gate, avalanche and dynamic dv/dt ruggedness  
Fully characterized capacitance and avalanche SOA  
Enhanced body diode dv/dt and di/dt capability  
Lead-free, RoHS compliant  
DirectFET®  
ISOMETRIC  
ME  
Standard Pack  
Orderable Part Number  
Base part number Package Type  
Form  
Quantity  
IRF7580MPbF  
DirectFET ME  
Tape and Reel  
4800  
IRF7580MTRPbF  
8.0  
7.0  
6.0  
5.0  
4.0  
3.0  
2.0  
1.0  
120  
100  
80  
I
= 70A  
D
T
= 125°C  
J
60  
40  
20  
T
= 25°C  
J
0
4
6
8
10 12 14 16 18 20  
25  
50  
75  
100  
125  
150  
175  
T
, Case Temperature (°C)  
C
V
Gate -to -Source Voltage (V)  
GS,  
Fig 2. Maximum Drain Current vs. Case Temperature  
Fig 1. Typical On-Resistance vs. Gate Voltage  
1
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© 2014 International Rectifier  
Submit Datasheet Feedback  
February 13, 2014  
IRF7580MTRPbF  
Absolute Maximum Ratings  
Symbol  
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V  
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V  
Parameter  
Max.  
116  
82  
Units  
A
Pulsed Drain Current   
Maximum Power Dissipation  
Linear Derating Factor  
460  
IDM  
115  
PD @TC = 25°C  
W
W/°C  
V
0.78  
Gate-to-Source Voltage  
Operating Junction and  
Storage Temperature Range  
± 20  
VGS  
TJ  
TSTG  
-55 to + 175  
°C  
Avalanche Characteristics  
EAS (Thermally limited) Single Pulse Avalanche Energy   
100  
120  
70  
mJ  
Single Pulse Avalanche Energy Tested Value   
EAS (tested)  
IAR  
Avalanche Current   
A
12  
EAR  
Repetitive Avalanche Energy   
mJ  
Thermal Resistance  
Symbol  
Parameter  
Typ.  
Max.  
44  
Units  
Junction-to-Ambient   
–––  
12.5  
20  
RJA  
Junction-to-Ambient   
Junction-to-Ambient   
Junction-to-Case   
–––  
–––  
1.3  
RJA  
°C/W  
RJA  
RJC  
–––  
0.75  
Junction-to-PCB Mounted   
–––  
RJA-PCB  
Static @ TJ = 25°C (unless otherwise specified)  
Symbol  
V(BR)DSS  
Parameter  
Min. Typ. Max. Units  
Conditions  
VGS = 0V, ID = 250µA  
Drain-to-Source Breakdown Voltage  
Breakdown Voltage Temp. Coefficient  
Static Drain-to-Source On-Resistance  
60  
––– –––  
V
–––  
44 ––– mV/°C Reference to 25°C, ID = 1.0mA  
V(BR)DSS/TJ  
RDS(on)  
––– 2.9  
3.6  
VGS = 10V, ID = 70A   
GS = 6.0V, ID = 35A   
VDS = VGS, ID = 150µA  
m  
m  
V
––– 3.5 –––  
2.1 ––– 3.7  
––– ––– 1.0  
––– ––– 150  
––– ––– 100  
––– ––– -100  
––– 0.8 –––  
V
VGS(th)  
IDSS  
Gate Threshold Voltage  
Drain-to-Source Leakage Current  
µA VDS = 60V, VGS = 0V  
V
V
V
DS = 60V, VGS = 0V, TJ = 125°C  
IGSS  
Gate-to-Source Forward Leakage  
Gate-to-Source Reverse Leakage  
Internal Gate Resistance  
nA  
GS = 20V  
GS = -20V  
RG  
Notes:  
Mounted on minimum footprint full size board with metalized  
back and with small clip heatsink.  
TC measured with thermocouple mounted to top (Drain) of part.  
Used double sided cooling , mounting pad with large heatsink.  
Mounted to a PCB with small clip  
heatsink (still air)  
Mounted on minimum footprint full size  
board with metalized back and with  
small clip heatsink (still air)  
Surface mounted on 1 in. square Cu  
board (still air).  
2
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February 13, 2014  
IRF7580MTRPbF  
Dynamic @ TJ = 25°C (unless otherwise specified)  
Symbol  
Parameter  
Forward Transconductance  
Total Gate Charge  
Min. Typ. Max. Units  
Conditions  
DS = 10V, ID = 70A  
gfs  
Qg  
190 ––– –––  
––– 120 180  
S
V
ID = 70A  
Qgs  
Qgd  
Qsync  
td(on)  
tr  
Gate-to-Source Charge  
Gate-to-Drain ("Miller") Charge  
Total Gate Charge Sync. (Qg - Qgd)  
Turn-On Delay Time  
Rise Time  
Turn-Off Delay Time  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
32  
36  
84  
20  
38  
53  
21  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
VDS =30V  
nC  
VGS = 10V   
ID = 70A, VDS =0V, VGS = 10V  
VDD = 30V  
ID = 30A  
RG = 2.7  
ns  
td(off)  
tf  
Fall Time  
VGS = 10V   
Ciss  
Coss  
Crss  
Input Capacitance  
Output Capacitance  
Reverse Transfer Capacitance  
––– 6510 –––  
––– 610 –––  
––– 360 –––  
V
GS = 0V  
VDS = 25V  
ƒ = 1.0MHz  
pF  
C
C
oss eff. (ER) Effective Output Capacitance (Energy Related) ––– 620 –––  
oss eff. (TR) Effective Output Capacitance (Time Related) ––– 770 –––  
VGS = 0V, VDS = 0V to 48V   
VGS = 0V, VDS = 0V to 48V   
Diode Characteristics  
Symbol Parameter  
Min. Typ. Max. Units  
Conditions  
D
IS  
Continuous Source Current  
(Body Diode)  
––– –––  
105  
A
MOSFET symbol  
showing the  
G
integral reverse  
p-n junction diode.  
ISM  
Pulsed Source Current  
(Body Diode)   
––– –––  
460  
S
VSD  
dv/dt  
trr  
Diode Forward Voltage  
––– ––– 1.2  
V
TJ= 25°C,IS = 70A, VGS = 0V  
Peak Diode Recovery   
––– 4.1 ––– V/ns TJ =175°C,IS =70A, VDS = 60V  
Reverse Recovery Time  
–––  
–––  
–––  
–––  
41  
44  
55  
71  
–––  
–––  
ns TJ = 25° C VR = 51V,  
IF = 70A  
TJ = 125°C  
di/dt = 100A/µs   
Qrr  
Reverse Recovery Charge  
Reverse Recovery Current  
––– nC TJ = 25°C  
–––  
TJ = 125°C  
TJ = 25°C  
IRRM  
––– 2.5 –––  
A
Notes:  
Coss eff. (ER) is a fixed capacitance that gives the  
Repetitive rating; pulse width limited by max. junction  
temperature.  
same energy as Coss while VDS is rising from 0 to  
80% VDSS  
.
Limited by TJmax, starting TJ = 25°C, L = 42µH  
When mounted on 1" square PCB (FR-4 or G-10  
Material). For recommended footprint and soldering  
techniques refer to application note #AN-994.  
Ris measured at TJ approximately 90°C.  
RG = 50, IAS = 70A, VGS =10V.  
ISD 70A, di/dt 980A/µs, VDD V(BR)DSS, TJ 175°C.  
Pulse width 400µs; duty cycle 2%.  
Coss eff. (TR) is a fixed capacitance that gives the  
same charging time as Coss while VDS is rising from 0  
This value determined from sample failure population,  
starting TJ = 25°C, L= 42µH, RG = 50, IAS = 70A,  
to 80% VDSS  
.
VGS =10V.  
3
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© 2014 International Rectifier  
Submit Datasheet Feedback  
February 13, 2014  
IRF7580MTRPbF  
1000  
100  
10  
1000  
100  
10  
VGS  
15V  
10V  
8.0V  
7.0V  
6.0V  
5.5V  
5.0V  
4.5V  
VGS  
15V  
10V  
8.0V  
7.0V  
6.0V  
5.5V  
5.0V  
4.5V  
TOP  
TOP  
BOTTOM  
BOTTOM  
4.5V  
4.5V  
1
60µs PULSE WIDTH  
Tj = 175°C  
60µs PULSE WIDTH  
Tj = 25°C  
0.1  
1
0.1  
1
10  
100  
1000  
0.1  
1
10  
100  
1000  
V
, Drain-to-Source Voltage (V)  
DS  
V
, Drain-to-Source Voltage (V)  
DS  
Fig 3. Typical Output Characteristics  
Fig 4. Typical Output Characteristics  
1000  
100  
10  
2.8  
2.4  
2.0  
1.6  
1.2  
0.8  
0.4  
I
= 70A  
D
V
= 10V  
GS  
T
= 175°C  
J
T
= 25°C  
= 25V  
J
V
DS  
60µs PULSE WIDTH  
1.0  
3
4
5
6
7
8
-60 -40 -20  
T
0
20 40 60 80 100120140160180  
, Junction Temperature (°C)  
J
V
, Gate-to-Source Voltage (V)  
GS  
Fig 6. Normalized On-Resistance vs. Temperature  
Fig 5. Typical Transfer Characteristics  
100000  
10000  
1000  
14.0  
V
= 0V,  
= C  
f = 1 MHZ  
GS  
I
= 70A  
D
C
C
C
+ C , C  
SHORTED  
iss  
gs  
gd  
ds  
12.0  
10.0  
8.0  
= C  
rss  
oss  
gd  
= C + C  
V
V
V
= 48V  
= 30V  
= 12V  
DS  
DS  
DS  
ds  
gd  
C
iss  
C
C
oss  
6.0  
rss  
4.0  
2.0  
100  
0.0  
1
10  
, Drain-to-Source Voltage (V)  
100  
0
20 40 60 80 100 120 140 160  
V
DS  
Q , Total Gate Charge (nC)  
G
Fig 7. Typical Capacitance vs. Drain-to-Source Voltage  
Fig 8. Typical Gate Charge vs. Gate-to-Source Voltage  
Submit Datasheet Feedback February 13, 2014  
4
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© 2014 International Rectifier  
IRF7580MTRPbF  
1000  
100  
10  
100µsec  
1msec  
100  
10  
T
= 175°C  
J
OPERATION  
IN THIS  
AREA  
LIMITED BY  
R
(on)  
DS  
1
T
V
= 25°C  
= 0V  
J
10msec  
DC  
1
0.1  
0.01  
Tc = 25°C  
Tj = 175°C  
Single Pulse  
GS  
0.1  
0.1  
1
10  
0.3  
0.4  
V
0.5  
0.6  
0.7  
0.8  
0.9  
1.0  
V
, Drain-to-Source Voltage (V)  
DS  
, Source-to-Drain Voltage (V)  
SD  
Fig 10. Maximum Safe Operating Area  
Fig 9. Typical Source-Drain Diode Forward Voltage  
1.0  
78  
Id = 1.0mA  
76  
74  
72  
70  
68  
66  
64  
0.8  
0.6  
0.4  
0.2  
0.0  
-10  
0
10  
20  
30  
40  
50  
60  
-60 -40 -20  
0
20 40 60 80 100120140160180  
, Temperature ( °C )  
T
J
V
Drain-to-Source Voltage (V)  
DS,  
Fig 12. Typical Coss Stored Energy  
Fig 11. Drain-to-Source Breakdown Voltage  
7.0  
Vgs = 5.5V  
6.0  
5.0  
4.0  
3.0  
2.0  
Vgs = 6.0V  
Vgs = 7.0V  
Vgs = 8.0V  
Vgs = 10V  
0
20 40 60 80 100 120 140 160 180 200  
, Drain Current (A)  
I
D
Fig 13. Typical On-Resistance vs. Drain Current  
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5
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February 13, 2014  
IRF7580MTRPbF  
10  
1
D = 0.50  
0.20  
0.10  
0.05  
0.1  
0.02  
0.01  
0.01  
Notes:  
1. Duty Factor D = t1/t2  
2. Peak Tj = P dm x Zthjc + Tc  
SINGLE PULSE  
( THERMAL RESPONSE )  
0.001  
1E-006  
1E-005  
0.0001  
0.001  
0.01  
0.1  
t
, Rectangular Pulse Duration (sec)  
1
Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case  
1000  
100  
10  
Allowed avalanche Current vs avalanche  
pulsewidth, tav, assuming Tj = 150°C and  
Tstart =25°C (Single Pulse)  
1
Allowed avalanche Current vs avalanche  
  
pulsewidth, tav, assuming j = 25°C and  
Tstart = 150°C.  
0.1  
1.0E-06  
1.0E-05  
1.0E-04  
tav (sec)  
1.0E-03  
1.0E-02  
Fig 15. Avalanche Current vs. Pulse Width  
120  
100  
80  
60  
40  
20  
0
TOP  
BOTTOM 1.0% Duty Cycle  
= 70A  
Single Pulse  
Notes on Repetitive Avalanche Curves , Figures 15, 16:  
(For further info, see AN-1005 at www.irf.com)  
1.Avalanche failures assumption:  
I
D
Purely a thermal phenomenon and failure occurs at a  
temperature far in excess of Tjmax. This is validated for every  
part type.  
2. Safe operation in Avalanche is allowed as long asTjmax is not  
exceeded.  
3. Equation below based on circuit and waveforms shown in Figures  
23a, 23b.  
4. PD (ave) = Average power dissipation per single avalanche pulse.  
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage  
increase during avalanche).  
6. Iav = Allowable avalanche current.  
7. T = Allowable rise in junction temperature, not to exceed Tjmax  
(assumed as 25°C in Figure 15, 16).  
tav = Average time in avalanche.  
D = Duty cycle in avalanche = tav ·f  
25  
50  
75  
100  
125  
150  
175  
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)  
Starting T , Junction Temperature (°C)  
J
PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC  
I
av = 2T/ [1.3·BV·Zth]  
Fig 16. Maximum Avalanche Energy vs. Temperature  
EAS (AR) = PD (ave)· av  
t
6
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February 13, 2014  
IRF7580MTRPbF  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
20  
15  
10  
5
I = 46A  
F
V
= 51V  
R
T = 25°C  
J
T = 125°C  
J
I
I
I
I
= 150µA  
= 250µA  
= 1.0mA  
= 1.0A  
D
D
D
D
0
-75 -50 -25  
0
25 50 75 100 125 150 175  
0
200  
400  
600  
800  
1000  
T
, Temperature ( °C )  
di /dt (A/µs)  
J
F
Fig 17. Threshold Voltage vs. Temperature  
Fig 18. Typical Recovery Current vs. dif/dt  
25  
300  
I = 70A  
F
I = 46A  
F
V
= 51V  
V
= 51V  
R
R
20  
15  
10  
5
250  
200  
150  
100  
50  
T = 25°C  
J
T = 125°C  
J
T = 25°C  
J
T = 125°C  
J
0
0
200  
400  
600  
800  
1000  
0
200  
400  
600  
800  
1000  
di /dt (A/µs)  
di /dt (A/µs)  
F
F
Fig 20. Typical Stored Charge vs. dif/dt  
Fig 19. Typical Recovery Current vs. dif/dt  
300  
I = 70A  
F
V
= 51V  
R
250  
200  
150  
100  
50  
T = 25°C  
J
T = 125°C  
J
0
200  
400  
600  
800  
1000  
di /dt (A/µs)  
F
Fig 21. Typical Stored Charge vs. dif/dt  
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7
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February 13, 2014  
IRF7580MTRPbF  
Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs  
V
(BR)DSS  
t
p
15V  
DRIVER  
+
L
V
DS  
D.U.T  
AS  
R
G
V
DD  
-
I
A
20V  
I
0.01  
t
AS  
p
Fig 23a. Unclamped Inductive Test Circuit  
Fig 23b. Unclamped Inductive Waveforms  
Fig 24a. Switching Time Test Circuit  
Fig 24b. Switching Time Waveforms  
Id  
Vds  
Vgs  
VDD  
Vgs(th)  
Qgs1  
Qgs2  
Qgd  
Qgodr  
Fig 25b. Gate Charge Waveform  
Fig 25a. Gate Charge Test Circuit  
8
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February 13, 2014  
IRF7580MTRPbF  
DirectFET® Board Footprint, ME Outline  
(Medium Size Can, E-Designation)  
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET.  
This includes all recommendations for stencil and substrate designs.  
G = GATE  
D = DRAIN  
S = SOURCE  
D
D
D
D
G
S
S
S
S
S
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/  
9
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February 13, 2014  
IRF7580MTRPbF  
DirectFET® Outline Dimension, ME Outline  
(Medium Size Can, E-Designation)  
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET. This includes all  
recommendations for stencil and substrate designs.  
DIMENSIONS  
METRIC  
IMPERIAL  
CODE MIN MAX  
MIN  
MAX  
0.250  
0.199  
0.156  
0.018  
0.024  
0.044  
0.038  
0.052  
0.017  
0.024  
0.036  
0.083  
0.144  
0.028  
A
B
6.25 6.35  
4.80 5.05  
3.85 3.95  
0.35 0.45  
0.58 0.62  
1.08 1.12  
0.93 0.97  
1.28 1.32  
0.38 0.42  
0.58 0.62  
0.88 0.92  
2.08 2.12  
3.63 3.67  
0.59 0.70  
0.246  
0.189  
0.152  
0.014  
0.023  
0.043  
0.037  
0.050  
0.015  
0.023  
0.035  
0.082  
0.143  
0.023  
C
D
E
F
G
H
J
J1  
K
L
L1  
M
N
P
0.02 0.08 0.0008 0.003  
0.08 0.17 0.003 0.007  
Dimensions are shown in  
millimeters (inches)  
DirectFET® Part Marking  
LOGO  
GATE MARKING  
PART NUMBER  
BATCH NUMBER  
DATE CODE  
Line above the last character of  
the date code indicates "Lead-Free"  
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/  
10  
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February 13, 2014  
IRF7580MTRPbF  
DirectFET® Tape & Reel Dimension (Showing component orientation).  
LOADED TAPE FEED DIRECTION  
NOTE: Controlling dimensions in mm  
Std reel quantity is 4800 parts. (ordered as IRF7580MTRPBF). For 1000 parts on 7"  
reel, order IRF7580MTR1PBF  
DIMENSIONS  
METRIC  
IMPERIAL  
REEL DIMENSIONS  
NOTE: CONTROLLING  
DIMENSIONS IN MM  
CODE  
MIN  
MIN  
MAX  
8.10  
4.10  
12.30  
5.55  
5.30  
6.70  
N.C  
MAX  
0.319  
0.161  
0.484  
0.219  
0.209  
0.264  
N.C  
STANDARD OPTION (QTY 4800)  
METRIC  
IMPERIAL  
TR1 OPTION (QTY 1000)  
METRIC  
IMPERIAL  
A
B
C
D
E
F
0.311  
0.154  
0.469  
0.215  
0.201  
0.256  
0.059  
0.059  
7.90  
3.90  
11.90  
5.45  
5.10  
6.50  
1.50  
1.50  
CODE  
MIN  
12.992  
0.795  
0.504  
0.059  
3.937  
N.C  
MAX  
N.C  
MIN  
6.9  
MAX  
N.C  
N.C  
0.50  
N.C  
N.C  
0.53  
N.C  
N.C  
MIN  
MAX  
N.C  
N.C  
13.2  
N.C  
N.C  
18.4  
14.4  
15.4  
MIN  
MAX  
N.C  
A
B
C
D
E
F
330.0  
20.2  
12.8  
1.5  
177.77  
19.06  
13.5  
1.5  
0.75  
0.53  
0.059  
2.31  
N.C  
N.C  
N.C  
0.520  
N.C  
12.8  
N.C  
G
H
100.0  
N.C  
58.72  
N.C  
N.C  
N.C  
1.60  
0.063  
0.724  
0.567  
0.606  
13.50  
12.01  
12.01  
G
H
0.488  
0.469  
0.47  
0.47  
12.4  
11.9  
11.9  
11.9  
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/  
Qualification Information†  
Industrial  
(per JEDEC JESD47F†† guidelines)  
Qualification Level  
MSL3  
DFET 1.5  
Moisture Sensitivity Level  
RoHS Compliant  
(per JEDEC J-STD-020D††)  
Yes  
Qualification standards can be found at International Rectifier’s web site  
http://www.irf.com/product-info/reliability  
††  
Applicable version of JEDEC standard at the time of product release.  
* Industrial qualification standards except autoclave test conditions.  
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA  
To contact International Rectifier, please visit http://www.irf.com/whoto-call/  
11  
www.irf.com  
© 2014 International Rectifier  
Submit Datasheet Feedback  
February 13, 2014  

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