IRF7799L2PBF [INFINEON]
RoHS Compliant, Halogen Free;
| 型号： | IRF7799L2PBF |
| 厂家： | 
Infineon |
| 描述： | RoHS Compliant, Halogen Free |
| 文件： | 总11页 (文件大小：268K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IRF7799L2PbF
DirectFET Power MOSFET
Typical values (unless otherwise specified)
l RoHS Compliant, Halogen Free
l Lead-Free (Qualified up to 260°C Reflow)
VDSS
250V min ± 30V max
VGS
RDS(on)
32mΩ@ 10V
Vgs(th)
l Ideal for High Performance Isolated Converter
Primary Switch Socket
l Optimized for Synchronous Rectification
Qg tot
Qgd
l Low Conduction Losses
110nC
39nC
4.0V
l High Cdv/dt Immunity
l Low Profile (<0.7mm)
S
S
S
S
S
S
S
S
l Dual Sided Cooling Compatible
l Compatible with existing Surface Mount Techniques
l Industrial Qualified
G
D
D
DirectFET ISOMETRIC
L8
Applicable DirectFET Outline and Substrate Outline
SB
SC
M2
M4
L4
L6
L8
Description
The IRF7799L2TR/TR1PbF combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFETTM packaging to achieve the
lowest on-state resistance in a package that has a footprint smaller than a D2PAK and only 0.7 mm profile. The DirectFET package is compatible with existing
layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering techniques, when application
note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET package allows dual sided cooling to maximize thermal transfer
in power systems.
The IRF7799L2TR/TR1PbF is optimized for high frequency switching and synchronous rectification applications. The reduced total losses in the device
coupled with the high level of thermal performance enables high efficiency and low temperatures, which are key for system reliability improvements, and
makes this device ideal for high performance power converters.
Standard Pack
Orderable part number
Package Type
Note
Form
Quantity
4000
IRF7799L2TRPbF
IRF7799L2TR1PbF
DirectFET2 Large Can
DirectFET2 Large Can
Tape and Reel
Tape and Reel
"TR" suffix
"TR1" suffix EOL notice # 264
1000
Absolute Maximum Ratings
Max.
Parameter
Units
VDS
250
±30
35
Drain-to-Source Voltage
Gate-to-Source Voltage
V
V
GS
(Silicon Limited)
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
I
I
I
I
I
@ TC = 25°C
D
D
D
D
(Silicon Limited)
(Silicon Limited)
(Package Limited)
25
@ TC = 100°C
@ TA = 25°C
@ TC = 25°C
6.6
375
140
325
21
A
DM
EAS
IAR
Single Pulse Avalanche Energy
Avalanche Current
mJ
A
200
180
160
140
120
100
80
60
55
50
45
40
35
30
25
I
= 21A
T
= 25°C
D
J
Vgs = 7.0V
Vgs = 8.0V
Vgs = 10V
Vgs = 15V
T
= 125°C
J
60
40
T
= 25°C
16
J
20
0
20
40
60
80
100
4
8
12
20
I
, Drain Current (A)
D
V
Gate -to -Source Voltage (V)
GS,
Fig 2. Typical On-Resistance vs. Drain Current
Fig 1. Typical On-Resistance vs. Gate Voltage
Notes:
TC measured with thermocouple mounted to top (Drain) of part.
ꢀ Repetitive rating; pulse width limited by max. junction temperature.
Starting TJ = 25°C, L = 1.42mH, RG = 25Ω, IAS = 21A.
Pulse width ≤ 400μs; duty cycle ≤ 2%.
Click on this section to link to the appropriate technical paper.
Click on this section to link to the DirectFET Website.
Surface mounted on 1 in. square Cu board, steady state.
1
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February 24, 2014
IRF7799L2PbF
Static @ TJ = 25°C (unless otherwise specified)
Conditions
VGS = 0V, ID = 250μA
Parameter
Min. Typ. Max. Units
BVDSS
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
250
–––
–––
3.0
–––
0.12
32
–––
V
Reference to 25°C, ID = 2mA
V
/ T
J
ΔΒ DSS Δ
––– V/°C
VGS = 10V, ID = 21A
RDS(on)
38
mΩ
V
VDS = VGS, ID = 250μA
VGS(th)
4.0
5.0
ΔVGS(th)/ΔTJ
IDSS
Gate Threshold Voltage Coefficient
Drain-to-Source Leakage Current
–––
–––
–––
–––
–––
54
-13
–––
–––
–––
–––
–––
110
26
––– mV/°C
VDS = 250V, VGS = 0V
20
1
μA
VDS = 250V, VGS = 0V, TJ = 125°C
1mA
V
V
V
GS = 20V
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Forward Transconductance
Total Gate Charge
100
-100
–––
165
–––
–––
nA
S
GS = -20V
DS = 50V, ID = 21A
gfs
Qg
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
VDS = 125V
Qgs1
Qgs2
Qgd
Qgodr
Qsw
Qoss
RG
Pre-Vth Gate-to-Source Charge
Post-Vth Gate-to-Source Charge
Gate-to-Drain Charge
Gate Charge Overdrive
Switch Charge (Qgs2 + Qgd)
Output Charge
VGS = 10V
ID = 21A
5.7
nC
39
39
–––
–––
–––
–––
–––
–––
–––
–––
See Fig. 9
45
VDS = 16V, VGS = 0V
33
nC
Gate Resistance
0.73
36.3
33.5
73.9
26.6
Ω
VDD = 125V, VGS = 10V
td(on)
tr
td(off)
tf
Turn-On Delay Time
ID = 21A
Rise Time
ns
RG=6.2Ω
Turn-Off Delay Time
Fall Time
VGS = 0V
Ciss
Coss
Crss
Coss
Coss
Input Capacitance
––– 6714 –––
VDS = 25V
Output Capacitance
–––
–––
606
157
–––
–––
pF ƒ = 1.0MHz
VGS = 0V, VDS = 1.0V, f=1.0MHz
Reverse Transfer Capacitance
Output Capacitance
––– 5063 –––
––– 217 –––
VGS = 0V, VDS = 80V, f=1.0MHz
Output Capacitance
Diode Characteristics
Conditions
MOSFET symbol
Parameter
Continuous Source Current
Min. Typ. Max. Units
IS
–––
–––
35
showing the
(Body Diode)
A
ISM
integral reverse
Pulsed Source Current
(Body Diode)
–––
–––
140
p-n junction diode.
TJ = 25°C, IS = 21A, VGS = 0V
TJ = 25°C, IF = 21A, VDD = 50V
di/dt = 100A/μs
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
–––
–––
–––
132
1.3
V
198
ns
nC
Qrr
––– 1412 2118
2
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February 24, 2014
IRF7799L2PbF
Absolute Maximum Ratings
Max.
125
Parameter
Units
Power Dissipation
Power Dissipation
Power Dissipation
P
P
P
@TC = 25°C
@TC = 100°C
@TA = 25°C
D
D
D
P
J
63
W
4.3
270
T
T
T
Peak Soldering Temperature
Operating Junction and
-55 to + 175
°C
Storage Temperature Range
STG
Thermal Resistance
Parameter
Typ.
–––
12.5
20
Max.
35
Units
RθJA
Junction-to-Ambient
Junction-to-Ambient
Junction-to-Ambient
Junction-to-Can
RθJA
–––
–––
1.2
RθJA
°C/W
RθJ-can
RθJ-PCB
–––
–––
Junction-to-PCB Mounted
0.5
10
1
D = 0.50
0.20
0.10
0.1
R1
R1
R2
R2
Ri (°C/W) τi (sec)
0.05
τ
J τJ
τ
τ
0.38829
0.000787
Cτ
0.02
0.01
1 τ1
Ci= τi/Ri
τ
2τ2
0.8117
0.006586
0.01
0.001
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
t
, Rectangular Pulse Duration (sec)
1
Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Notes:
Mounted on minimum footprint full size board with metalized
back and with small clip heatsink.
Surface mounted on 1 in. square Cu board, steady state.
TC measured with thermocouple incontact with top (Drain) of part.
Used double sided cooling, mounting pad with large heatsink.
R is measured at TJ of approximately 90°C.
θ
Surface mounted on 1 in. square Cu
board (still air).
Mounted on minimum footprint full size board with metalized
back and with small clip heatsink. (still air)
3
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February 24, 2014
IRF7799L2PbF
1000
100
10
1000
100
10
VGS
15V
10V
8.0V
7.0V
6.5V
6.0V
5.5V
5.0V
VGS
15V
10V
8.0V
7.0V
6.5V
6.0V
5.5V
5.0V
TOP
TOP
BOTTOM
BOTTOM
5.0V
1
1
5.0V
60μs PULSE WIDT
60μs PULSE WIDT
Tj = 175°C
≤
Tj = 25°C
≤
0.1
0.1
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 4. Typical Output Characteristics
Fig 5. Typical Output Characteristics
3.0
2.5
2.0
1.5
1.0
0.5
0.0
1000
I
= 21A
V
= 50V
D
DS
V
= 10V
≤
60μs PULSE WIDTH
GS
100
10
1
T
= 175°C
J
TJ = 25°C
TJ = -40°C
0.1
-60 -40 -20 0 20 40 60 80 100120140160180
, Junction Temperature (°C)
3
4
5
6
7
T
J
V
, Gate-to-Source Voltage (V)
GS
Fig 6. Typical Transfer Characteristics
Fig 7. Normalized On-Resistance vs. Temperature
14.0
100000
V
= 0V,
= C
f = 1 MHZ
GS
I = 21A
D
C
C
C
+ C , C
SHORTED
ds
iss
gs
gd
12.0
= C
rss
oss
gd
V
V
= 200V
= 125V
DS
DS
= C + C
ds
gd
10.0
8.0
6.0
4.0
2.0
0.0
VDS= 50V
10000
1000
100
C
iss
C
oss
C
rss
0
20 40 60 80 100 120 140 160
1
10
100
1000
Q , Total Gate Charge (nC)
G
V
, Drain-to-Source Voltage (V)
DS
Fig 9. Typical Total Gate Charge vs
Fig 8. Typical Capacitance vs.Drain-to-Source Voltage
Gate-to-Source Voltage
4
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February 24, 2014
IRF7799L2PbF
1000
100
10
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R
(on)
DS
T
= 175°C
J
TJ = 25°C
TJ = -40°C
100μsec
DC
1msec
1
1
10msec
Tc = 25°C
Tj = 175°C
Single Pulse
V
= 0V
GS
0.1
0.1
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
, Source-to-Drain Voltage (V)
1
1
10
100
1000
V
V
, Drain-to-Source Voltage (V)
SD
DS
Fig 10. Typical Source-Drain Diode Forward Voltage
Fig11. Maximum Safe Operating Area
6.0
5.0
4.0
3.0
2.0
1.0
40
30
20
10
0
I
= 250μA
D
ID = 1.0mA
ID = 1.0A
-75 -50 -25
0
25 50 75 100 125 150 175
25
50
75
100
125
150
175
T , Temperature ( °C )
T
, Case Temperature (°C)
J
C
Fig 13. Typical Threshold Voltage vs.
Fig 12. Maximum Drain Current vs. Case Temperature
Junction Temperature
1400
1200
1000
800
600
400
200
0
I
D
TOP
1.33A
2.53A
BOTTOM 21A
25
50
75
100
125
150
175
Starting T , Junction Temperature (°C)
J
Fig 14. Maximum Avalanche Energy Vs. Drain Current
5
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February 24, 2014
IRF7799L2PbF
100
10
1
Duty Cycle = Single Pulse
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔTj = 150°C and
Tstart =25°C (Single Pulse)
0.01
0.05
0.10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔΤj = 25°C and
Tstart = 150°C.
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current Vs.Pulsewidth
Notes on Repetitive Avalanche Curves , Figures 13, 14:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 16a, 16b.
350
TOP
BOTTOM 1.0% Duty Cycle
= 21A
Single Pulse
300
250
200
150
100
50
I
D
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ΔT = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
0
25
50
75
100
125
150
175
Starting T , Junction Temperature (°C)
J
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Fig 16. Maximum Avalanche Energy Vs. Temperature
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·ta
Driver Gate Drive
P.W.
D.U.T
Period
D =
Period
P.W.
+
*
=10V
V
GS
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D.U.T. I Waveform
SD
+
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
-
+
-
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
VDD
• di/dt controlled by RG
Re-Applied
Voltage
RG
+
-
• Driver same type as D.U.T.
Body Diode
Inductor Current
Forward Drop
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 17. Diode Reverse Recovery Test Circuit for N-Channel HEXFET® Power MOSFETs
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6
IRF7799L2PbF
Id
Vds
Vgs
L
VCC
DUT
0
Vgs(th)
20K
Qgs1
Qgs2
Qgodr
Qgd
Fig 18a. Gate Charge Test Circuit
Fig 18b. Gate Charge Waveform
V
(BR)DSS
15V
t
p
DRIVER
+
L
V
DS
V
R
D.U.T
AS
GS
G
V
DD
-
I
A
20V
t
0.01Ω
p
I
AS
Fig 19b. Unclamped Inductive Waveforms
Fig 19a. Unclamped Inductive Test Circuit
RD
VDS
V
DS
90%
VGS
D.U.T.
RG
+
VDD
-
VGS
10%
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
V
GS
t
t
r
t
t
f
d(on)
d(off)
Fig 20a. Switching Time Test Circuit
Fig 20b. Switching Time Waveforms
7
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February 24, 2014
IRF7799L2PbF
DirectFET Board Footprint, L8 (Large Size Can).
Please see AN-1035 for DirectFET assembly details and stencil and substrate design recommendations
G = GATE
D = DRAIN
S = SOURCE
D
D
D
D
D
D
S
S
S
S
S
S
S
S
G
Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/
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8
February 24, 2014
IRF7799L2PbF
DirectFET Outline Dimension, L8 Outline (LargeSize Can).
Please see AN-1035 for DirectFET assembly details and stencil and substrate design recommendations
DIMENSIONS
IMPERIAL
MIN
0.356
7.10 0.270
METRIC
MAX
9.15
CODE MIN
MAX
0.360
0.280
0.236
0.026
0.024
0.048
0.017
0.030
0.017
0.058
0.106
0.0274
0.0031
0.007
A
B
C
D
E
F
9.05
6.85
5.90
0.55
0.58
1.18
0.98
0.73
0.38
1.34
2.52
0.616
0.020
0.09
6.00
0.65
0.232
0.022
0.62 0.023
1.22
1.02
0.046
0.015
G
H
J
0.77 0.029
0.42
1.47
0.015
0.053
K
L
2.69 0.099
0.676
0.080
0.18
M
N
P
0.0235
0.0008
0.003
DirectFET Part Marking
GATE MARKING
LOGO
PART NUMBER
BATCH NUMBER
DATE CODE
Line above the last character of
the date code indicates "Lead-Free"
Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/
www.irf.com © 2014 International Rectifier Submit Datasheet Feedback
9
February 24, 2014
IRF7799L2PbF
DirectFET Tape & Reel Dimension (Showing component orientation).
NOTE: Controlling dimensions in mm
Std reel quantity is 4000 parts (ordered as IRF7799L2TR).
REEL DIMENSIONS
STANDARD OPTION (QTY 4000)
IMPERIAL
METRIC
MIN
CODE
MIN
MAX
N.C
MAX
N.C
12.992
0.795
0.504
0.059
3.900
N.C
A
B
C
D
E
F
330.00
20.20
12.80
1.50
N.C
N.C
0.520
N.C
13.20
N.C
99.00
N.C
3.940
0.880
0.720
0.760
100.00
22.40
18.40
19.40
G
H
0.650
0.630
16.40
15.90
LOADED TAPE FEED DIRECTION
NOTE: CONTROLLING
DIMENSIONS IN MM
DIMENSIONS
METRIC
IMPERIAL
CODE
MIN
MIN
MAX
12.10
4.10
16.30
7.60
7.40
10.10
NC
MAX
0.476
0.161
0.642
0.299
0.291
0.398
NC
A
B
C
D
E
F
0.469
0.154
0.626
0.291
0.284
0.390
0.059
0.059
11.90
3.90
15.90
7.40
7.20
9.90
1.50
1.50
G
H
1.60
0.063
Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/
10 www.irf.com © 2014 International Rectifier Submit Datasheet Feedback
February 24, 2014
IRF7799L2PbF
Qualification Information†
Industrial ††
Qualification level
(per JEDEC JESD47F††† guidelines)
Comments: This family of products has passed JEDEC’s Industrial
qualification. IR’s Consumer qualification level is granted by extension of the
higher Industrial level.
MSL1
Moisture Sensitivity Level
RoHS Compliant
DFET2
(per JEDEC J-STD-020D†††
)
Yes
Qualification standards can be found at International Rectifier’s web site
http://www.irf.com/product-info/reliability
Higher qualification ratings may be available should the user have such requirements.
Please contact your International Rectifier sales representative for further information:
http://www.irf.com/whoto-call/salesrep/
Applicable version of JEDEC standard at the time of product release.
Revision History
Date
Comments
• Updated ordering information to reflect the End-Of-life (EOL) of the mini-reel option (EOL notice #264)
2/24/2014
•
Updated data sheet with new IR corporate template
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA
To contact International Rectifier, please visit http://www.irf.com/whoto-call/
11
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INFINEON
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