IRFH5104PBF_技术文档

IRFH5104PbF

HEXFET^®Power MOSFET

V_DS

40

V

R_{DS(on) max}

(@V_GS= 10V)

Q_{g (typical)}

3.5

m

Ω

53

nC

R_{G (typical)}

1.4

Ω

I_D

100

A

(@T_c(Bottom)= 25°C)

PQFN 5X6 mm

Applications

• Secondary Side Synchronous Rectification

• Inverters for DC Motors

• DC-DC Brick Applications

• Boost Converters

Features and Benefits

Features

Benefits

Low R_DSon(≤ 3.5mΩ)

Low Thermal Resistance to PCB (≤ 1.1°C/W)

100% Rg tested

Lower Conduction Losses

Enables better thermal dissipation

Increased Reliability

Low Profile (≤ 0.9 mm)

results in Increased Power Density

Industry-Standard Pinout

Multi-Vendor Compatibility

Easier Manufacturing

Environmentally Friendlier

Increased Reliability

⇒

Compatible with Existing Surface Mount Techniques

RoHS Compliant Containing no Lead, no Bromide and no Halogen

MSL1, Industrial Qualification

Orderable part number

Package Type

Standard Pack

Note

Form

Tape and Reel

Quantity

4000

1000

IRFH5104TRPBF

IRFH5104TR2PBF

PQFN 5mm x 6mm

EOL notice #259

Absolute Maximum Ratings

Parameter

Drain-to-Source Voltage

Gate-to-Source Voltage

Max.

40

Units

V_DS

V

V_GS

±20

24

I_D@ T_A= 25°C

I_D@ T_A= 70°C

I_D@ T_C(Bottom)= 25°C

I_D@ T_C(Bottom)= 100°C

I_DM

Continuous Drain Current, V_GS@ 10V

Pulsed Drain Current

19

100

86

A

400

3.6

114

Power Dissipation

P_D@T_A= 25°C

P_D@ T_C(Bottom)= 25°C

W

W/°C

°C

Power Dissipation

Linear Derating Factor

0.029

-55 to + 150

T_J

Operating Junction and

Storage Temperature Range

T_STG

Notes through are on page 9

1

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IRFH5104PbF

Static @ T_J= 25°C (unless otherwise specified)

Parameter

Min. Typ. Max. Units

40 ––– –––

––– 0.05 ––– V/°C Reference to 25°C, I_D= 1mA

Conditions

V_GS= 0V, I_D= 250μA

BV_DSS

Drain-to-Source Breakdown Voltage

Breakdown Voltage Temp. Coefficient

Static Drain-to-Source On-Resistance

Gate Threshold Voltage

V

/ T

J

ΔΒ _DSSΔ

R_DS(on)

V_GS(th)

–––

2.0

2.9

–––

-8.9

–––

3.5

4.0

V_GS= 10V, I_D= 50A

mΩ

V

V_DS= V_GS, I_D= 100μA

ΔV_GS(th)

I_DSS

Gate Threshold Voltage Coefficient

Drain-to-Source Leakage Current

–––

56

––– mV/°C

20

μA

V

_DS= 40V, V_GS= 0V

_DS= 40V, V_GS= 0V, T_J= 125°C

_GS= 20V

250

I_GSS

Gate-to-Source Forward Leakage

Gate-to-Source Reverse Leakage

Forward Transconductance

Total Gate Charge

100

nA

––– -100

_GS= -20V

gfs

Q_g

–––

53

–––

80

S

_DS= 15V, I_D= 50A

–––

Q_gs1

Q_gs2

Q_gd

Q_godr

Q_sw

Q_oss

Pre-Vth Gate-to-Source Charge

Post-Vth Gate-to-Source Charge

Gate-to-Drain Charge

10

–––

V_DS= 20V

V_GS= 10V

4.8

19

nC

I_D= 50A

Gate Charge Overdrive

Switch Charge (Q_gs2+ Q_gd)

Output Charge

––– 19.2 –––

––– 23.8 –––

See Fig.17 & 18

–––

22

–––

nC

V_DS= 16V, V_GS= 0V

R_G

t_d(on)

t_r

Gate Resistance

Turn-On Delay Time

Rise Time

–––

1.4

9.5

15

20

10

–––

Ω

V

_DD= 20V, V_GS= 10V

I_D= 50A

R =1.7

ns

t_d(off)

t_f

Turn-Off Delay Time

Fall Time

Ω

G

See Fig.15

C_iss

C_oss

C_rss

Input Capacitance

Output Capacitance

Reverse Transfer Capacitance

––– 3120 –––

V

_GS= 0V

–––

650

310

–––

V_DS= 25V

pF

ƒ = 1.0MHz

Avalanche Characteristics

Parameter

Typ.

–––

Max.

120

50

Units

mJ

Single Pulse Avalanche Energy

E_AS

I_AR

Avalanche Current

A

Diode Characteristics

Parameter

Min. Typ. Max. Units

Conditions

I_S

D

S

Continuous Source Current

MOSFET symbol

–––

100

400

(Body Diode)

showing the

integral reverse

A

G

I_SM

Pulsed Source Current

(Body Diode)

p-n junction diode.

V_SD

t_rr

Diode Forward Voltage

Reverse Recovery Time

Reverse Recovery Charge

Forward Turn-On Time

–––

31

1.3

47

V

T_J= 25°C, I_S= 50A, V_GS= 0V

ns T_J= 25°C, I_F= 50A, V_DD= 20V

di/dt = 500A/μs

nC

Q_rr

t_on

130

195

Time is dominated by parasitic Inductance

Thermal Resistance

Parameter

Typ.

–––

Max.

1.1

15

Units

Junction-to-Case

Junction-to-Ambient

R_θ_JC(Bottom)

R_θJC(Top)

°C/W

R_θ

35

JA

R_θJA(<10s)

22

2

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IRFH5104PbF

1000

100

10

1000

100

10

VGS

10V

VGS

10V

TOP

8.0V

7.0V

6.0V

5.5V

5.0V

4.8V

4.5V

8.0V

7.0V

6.0V

5.5V

5.0V

4.8V

4.5V

BOTTOM

1

4.5V

60μs PULSE WIDTH

Tj = 25°C

≤

60μs PULSE WIDTH

Tj = 150°C

≤

4.5V

0.1

1

0.1

1

10

100

1000

0.1

1

10

100

1000

V

, Drain-to-Source Voltage (V)

V

, Drain-to-Source Voltage (V)

DS

Fig 1. Typical Output Characteristics

Fig 2. Typical Output Characteristics

1000

1.8

I

= 50A

D

V

= 10V

GS

1.6

1.4

1.2

1.0

0.8

0.6

100

10

1

T

= 150°C

J

T

= 25°C

J

V

= 15V

DS

≤

60μs PULSE WIDTH

0.1

3

4

5

6

7

8

9

10

-60 -40 -20

0

20 40 60 80 100 120140 160

T

J

, Junction Temperature (°C)

V

, Gate-to-Source Voltage (V)

GS

Fig 3. Typical Transfer Characteristics

Fig 4. Normalized On-Resistance vs. Temperature

14.0

100000

10000

1000

V

= 0V,

= C

f = 1 MHZ

GS

I

= 50A

D

C

+ C , C

SHORTED

iss

gs

gd

ds

12.0

10.0

8.0

= C

rss

oss

gd

= C + C

V

= 32V

= 20V

DS

ds

gd

VDS= 8.0V

C

iss

C

6.0

oss

C

rss

4.0

2.0

0.0

100

0

10

20

30

40

50

60

70

1

10

, Drain-to-Source Voltage (V)

100

Q , Total Gate Charge (nC)

V

G

DS

Fig 5. Typical Capacitance vs.Drain-to-Source Voltage

Fig 6. Typical Gate Charge vs.Gate-to-Source Voltage

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IRFH5104PbF

1000

100

10

1000

100

10

OPERATION IN THIS AREA

LIMITED BY R (on)

DS

100μsec

T

= 150°C

J

1msec

10msec

T

= 25°C

J

Tc = 25°C

Tj = 150°C

Single Pulse

DC

V

GS

= 0V

1.0

1

0.2

0.4

V

0.6

0.8

1.0

1.2

1.4

0

1

10

100

, Source-to-Drain Voltage (V)

V

, Drain-to-Source Voltage (V)

SD

DS

Fig 7. Typical Source-Drain Diode Forward Voltage

Fig 8. Maximum Safe Operating Area

150

5.0

Limited By Package

125

4.5

4.0

3.5

3.0

2.5

2.0

1.5

100

75

50

25

0

I

= 100μA

= 500μA

= 1.0mA

= 1.0A

D

25

50

T

75

100

125

150

-75 -50 -25

0

25 50 75 100 125 150

, Case Temperature (°C)

T

, Temperature ( °C )

C

J

Fig 10. Threshold Voltage vs. Temperature

Fig 9. Maximum Drain Current vs.

Case(Bottom)Temperature

10

1

D = 0.50

0.20

0.10

0.1

0.05

0.02

0.01

Notes:

SINGLE PULSE

( THERMAL RESPONSE )

1. Duty Factor D = t1/t2

2. Peak Tj = P dm x Zthjc + Tc

0.001

1E-006

1E-005

0.0001

0.001

0.01

0.1

t

, Rectangular Pulse Duration (sec)

1

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case (Bottom)

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IRFH5104PbF

10

8

500

400

300

200

100

0

I

= 50A

I

D

TOP

8.3A

19A

BOTTOM 50A

6

T

= 125°C

= 25°C

J

4

2

J

0

4

6

8

10 12 14

16 18 20

25

50

75

100

125

150

Starting T , Junction Temperature (°C)

J

V

Gate -to -Source Voltage (V)

GS,

Fig 13. Maximum Avalanche Energy vs. Drain Current

Fig 12. On-Resistance vs. Gate Voltage

V

(BR)DSS

t

p

15V

DRIVER

+

L

V

DS

D.U.T

AS

R

G

V

DD

-

I

A

I

AS

20V

Ω

0.01

t

p

Fig 14b. Unclamped Inductive Waveforms

Fig 14a. Unclamped Inductive Test Circuit

R_D

V_DS

90%

V_GS

D.U.T.

R_G

⁺V_DD

-

10%

V_GS

10V

V_GS

Pulse Width ≤ 1 µs

Duty Factor ≤ 0.1

t_d(on)

t_d(off)

t_r

t_f

Fig 15a. Switching Time Test Circuit

Fig 15b. Switching Time Waveforms

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IRFH5104PbF

Driver Gate Drive

P.W.

Period

D.U.T

Period

D =

+

*

=10V

V

GS

Circuit Layout Considerations

• Low Stray Inductance

• Ground Plane

• Low Leakage Inductance

Current Transformer

-

D.U.T. I Waveform

SD

+

-

Reverse

Recovery

Current

Body Diode Forward

Current

di/dt

-

+

D.U.T. V Waveform

DS

Diode Recovery

dv/dt

V

DD

V_DD

Re-Applied

Voltage

• dv/dt controlled by R_G

R_G

+

-

Body Diode

Forward Drop

• Driver same type as D.U.T.

• I_SDcontrolled by Duty Factor "D"

• D.U.T. - Device Under Test

Inductor Curent

I

SD

Ripple

≤ 5%

* V_GS= 5V for Logic Level Devices

Fig 16. Peak Diode Recovery dv/dt Test Circuit for N-Channel

HEXFET^®Power MOSFETs

Id

Vds

Vgs

L

VCC

DUT

0

Vgs(th)

1K

Qgs1

Qgs2

Qgd

Qgodr

Fig 18. Gate Charge Waveform

Fig 17. Gate Charge Test Circuit

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IRFH5104PbF

PQFN 5x6 Outline "B" Package Details

For more information on board mounting, including footprint and stencil recommendation, please refer to application note AN-1136:

http://www.irf.com/technical-info/appnotes/an-1136.pdf

For more information on package inspection techniques, please refer to application note AN-1154:

http://www.irf.com/technical-info/appnotes/an-1154.pdf

PQFN 5x6 Part Marking

INTERNATIONAL

RECTIFIER LOGO

DATE CODE

PART NUMBER

XXXX

XYWWX

XXXXX

ASSEMBLY

SITE CODE

(Per SCOP 200-002)

MARKING CODE

(Per Marking Spec)

PIN 1

IDENTIFIER

LOT CODE

(Eng Mode - Min last 4 digits of EATI#)

(Prod Mode - 4 digits of SPN code)

Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/

7

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IRFH5104PbF

PQFN 5x6 Tape and Reel

REEL DIMENSIONS

TAPE DIMENSIONS

CODE

Ao

DESCRIPTION

Dimension design to accommodate the component width

Dimension design to accommodate the component lenght

Dimension design to accommodate the component thicknes s

Overall width of the carrier tape

Bo

Ko

W

P

1

Pitch between s ucces s ive cavity centers

QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE

Note: All dimens ion are nominal

Package

Type

Reel

Diameter

(Inch)

QTY

Reel

Width

W1

Ao

Bo

Ko

P1

W

Pin 1

(mm)

Quadrant

(mm)

5 X 6 PQFN

13

4000

12.4

6.300

5.300

1.20

8.00

12

Q1

Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/

8

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IRFH5104PbF

Qualification information^†

Industrial^††

(per JEDEC JES D47F ^†††guidelines )

Qualification level

MS L 1

Moisture Sensitivity Level

RoHS compliant

PQFN 5mm x 6mm

(per JEDEC J-ST D-020D^†††

)

Yes

Qualification standards can be found at International Rectifier’s web site

http://www.irf.com/product-info/reliability

Higher qualification ratings may be available should the user have such requirements.

Please contact your International Rectifier sales representative for further information:

http://www.irf.com/whoto-call/salesrep/

Applicable version of JEDEC standard at the time of product release.

Notes:

Repetitive rating; pulse width limited by max. junction temperature.

Starting T_J= 25°C, L = 0.098mH, R_G= 25Ω, I_AS= 50A.

Pulse width ≤ 400μs; duty cycle ≤ 2%.

R is measured at T_Jof approximately 90°C.

θ

ꢀ When mounted on 1 inch square 2 oz copper pad on 1.5x1.5 in. board of FR-4 material.

Calculated continuous current based on maximum allowable junction temperature. Package is limited to 100A by production test

capability.

Revision History

Date

Comment

12/16/2013

Updated ordering information to reflect the End-Of-Life (EOL) of the mini-reel option (EOL notice #259).

•

Updated data sheet with the new IR corporate template.

3/16/2015

Updated package outline and tape and reel on pages 7 and 8.

•

IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA

To contact International Rectifier, please visit http://www.irf.com/whoto-call/

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型号：	IRFH5104PBF
厂家：	Infineon
描述：	Secondary Side Synchronous Rectification
文件：	总9页 (文件大小：244K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

IRFH5104PBF [INFINEON]

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