IRLZ34NPBF [INFINEON]
HEXFET Power MOSFET; HEXFET功率MOSFET
| 型号： | IRLZ34NPBF |
| 厂家： | 
Infineon |
| 描述： | HEXFET Power MOSFET |
| 文件： | 总9页 (文件大小：227K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD - 94830
IRLZ34NPbF
HEXFET® Power MOSFET
l Logic-Level Gate Drive
l Advanced Process Technology
l Dynamic dv/dt Rating
l 175°C Operating Temperature
l Fast Switching
D
VDSS = 55V
RDS(on) = 0.035Ω
l Fully Avalanche Rated
l Lead-Free
G
ID = 30A
S
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve the
lowestpossibleon-resistancepersiliconarea. Thisbenefit,
combined with the fast switching speed and ruggedized
device design that HEXFET Power MOSFETs are well
knownfor, providesthedesignerwithanextremelyefficient
device for use in a wide variety of applications.
The TO-220 package is universally preferred for all
commercial-industrial applications at power dissipation
levelstoapproximately50watts. Thelowthermalresistance
and low package cost of the TO-220 contribute to its wide
acceptance throughout the industry.
TO-220AB
Absolute Maximum Ratings
Parameter
Max.
Units
ID @ TC = 25°C
ID @ TC = 100°C
IDM
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
30
21
110
A
PD @TC = 25°C
Power Dissipation
68
W
W/°C
V
Linear Derating Factor
0.45
±16
VGS
EAS
IAR
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
110
mJ
16
A
EAR
dv/dt
TJ
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
6.8
mJ
5.0
V/ns
-55 to + 175
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 screw.
°C
300 (1.6mm from case)
10 lbfin (1.1Nm)
Thermal Resistance
Parameter
Junction-to-Case
Min.
Typ.
0.50
Max.
Units
RθJC
RθCS
RθJA
2.2
62
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
°C/W
11/11/03
IRLZ34NPbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
55
Conditions
VGS = 0V, ID = 250µA
V(BR)DSS
Drain-to-Source Breakdown Voltage
V
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient 0.065 V/°C Reference to 25°C, ID = 1mA
0.035
VGS = 10V, ID = 16A
VGS = 5.0V, ID = 16A
VGS = 4.0V, ID = 14A
VDS = VGS, ID = 250µA
VDS = 25V, ID = 16A
VDS = 55V, VGS = 0V
VDS = 44V, VGS = 0V, TJ = 150°C
VGS = 16V
RDS(on)
Static Drain-to-Source On-Resistance
0.046
Ω
1.0
11
0.060
2.0
VGS(th)
gfs
Gate Threshold Voltage
V
S
Forward Transconductance
25
250
100
-100
25
5.2
14
µA
IDSS
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
nA
IGSS
VGS = -16V
Qg
ID = 16A
Qgs
Qgd
td(on)
tr
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
nC VDS = 44V
VGS = 5.0V, See Fig. 6 and 13
8.9
VDD = 28V
100
ID = 16A
ns
td(off)
tf
Turn-Off Delay Time
Fall Time
21
29
RG = 6.5Ω, VGS = 5.0V
RD = 1.8Ω, See Fig. 10
Between lead,
D
S
LD
LS
Internal Drain Inductance
Internal Source Inductance
4.5
7.5
6mm (0.25in.)
nH
pF
G
from package
and center of die contact
VGS = 0V
Ciss
Coss
Crss
Input Capacitance
880
220
Output Capacitance
VDS = 25V
Reverse Transfer Capacitance
94
= 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
Parameter
Continuous Source Current
(Body Diode)
Min. Typ. Max. Units
Conditions
MOSFET symbol
D
S
IS
30
A
showing the
G
ISM
Pulsed Source Current
(Body Diode)
integral reverse
110
p-n junction diode.
TJ = 25°C, IS = 16A, VGS = 0V
TJ = 25°C, IF = 16A
di/dt = 100A/µs
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
1.3
76 110
190 290
V
ns
nC
Qrr
ton
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
VDD = 25V, starting TJ = 25°C, L = 610µH
RG = 25Ω, IAS = 16A. (See Figure 12)
ISD ≤ 16A, di/dt ≤ 270A/µs, VDD ≤ V(BR)DSS
TJ ≤ 175°C
Pulse width ≤ 300µs; duty cycle ≤ 2%.
,
IRLZ34NPbF
1000
100
10
1000
100
10
VGS
15V
VGS
15V
TOP
TOP
12V
12V
10V
8.0V
6.0V
4.0V
3.0V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
BOTTOM 2.5V
2.5V
1
1
2.5V
20µs PULSE WIDTH
20µs PULSE WIDTH
T
= 25°C
T
= 175°C
J
J
0.1
0.1
0.1
0.1
A
A
1
10
100
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
3.0
2.5
2.0
1.5
1.0
0.5
0.0
1000
I
= 27A
D
100
10
1
T = 25°C
J
T = 175°C
J
V DS= 25V
20µs PULSE WIDTH
V
= 10V
GS
0.1
A
10A
2
3
4
5
6
7
8
9
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
T , Junction Temperature (°C)
VGS , Gate-to-Source Voltage (V)
J
Fig 4. Normalized On-Resistance
Fig 3. Typical Transfer Characteristics
Vs. Temperature
IRLZ34NPbF
15
12
9
1400
I
= 16A
V
C
C
C
= 0V,
f = 1MHz
D
GS
iss
rss
oss
= C + C
,
C
SHORTED
gs
gd
ds
= C
gd
V
V
= 44V
= 28V
1200
1000
800
600
400
200
0
DS
DS
= C + C
C
ds
gd
iss
C
oss
6
C
rss
3
FOR TEST CIRCUIT
SEE FIGURE 13
0
A
A
1
10
100
0
4
8
12
16
20
24
28
32
V
, Drain-to-Source Voltage (V)
Q
, Total Gate Charge (nC)
DS
G
Fig 5. Typical Capacitance Vs.
Fig 6. Typical Gate Charge Vs.
Drain-to-Source Voltage
Gate-to-Source Voltage
1000
1000
100
10
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
100
10
1
10µs
T = 175°C
J
T = 25°C
100µs
J
1ms
T
T
= 25°C
= 175°C
C
J
10ms
Single Pulse
V
GS
= 0V
A
1
A
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Source-to-Drain Voltage (V)
DS
SD
Fig 7. Typical Source-Drain Diode
Fig 8. Maximum Safe Operating Area
Forward Voltage
IRLZ34NPbF
40
30
20
10
0
RD
VDS
VGS
D.U.T.
RG
+VDD
-
5.0V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
25
50
75
100
125
150
175
°
T , Case Temperature ( C)
C
10%
V
GS
t
t
r
t
t
f
Fig 9. Maximum Drain Current Vs.
d(on)
d(off)
Case Temperature
Fig 10b. Switching Time Waveforms
10
D = 0.50
0.20
1
0.10
0.05
P
2
DM
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
0.1
t
1
t
2
Notes:
1. Duty factor D = t / t
1
2. Peak T =P
x Z
+ T
thJC C
J
DM
0.01
0.00001
0.0001
0.001
0.01
0.1
t , Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
IRLZ34NPbF
250
200
150
100
50
L
I
D
V
DS
TOP
6.6A
11A
BOTTOM 16A
D.U.T.
R
+
-
G
V
DD
I
5.0 V
AS
t
p
0.01Ω
Fig 12a. Unclamped Inductive Test Circuit
V
= 25V
50
DD
0
A
175
V
(BR)DSS
25
75
100
125
150
Starting T , Junction Temperature (°C)
t
J
p
V
DD
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
V
DS
I
AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
.3µF
Q
G
+
5.0 V
V
DS
D.U.T.
-
Q
Q
GD
GS
V
GS
V
G
3mA
I
I
D
G
Charge
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
IRLZ34NPbF
Peak Diode Recovery dv/dt Test Circuit
+
-
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T
+
-
-
+
RG
• dv/dt controlled by RG
+
-
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VDD
Driver Gate Drive
P.W.
P.W.
Period
Period
D =
V
=10V
*
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
IRLZ34NPbF
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
10.54 (.415)
3.78 (.149)
- B -
10.29 (.405)
2.87 (.113)
2.62 (.103)
4.69 (.185)
4.20 (.165)
3.54 (.139)
1.32 (.052)
1.22 (.048)
- A -
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
LEAD ASSIGNMENTS
1.15 (.045)
MIN
HEXFET
IGBTs, CoPACK
2- DRAIN
3- SOURCE
1
2
3
1- GATE
1- GATE
2- COLLECTOR
3- EMITTER
4- COLLECTOR
4- DRAIN
14.09 (.555)
13.47 (.530)
4.06 (.160)
3.55 (.140)
0.93 (.037)
0.69 (.027)
0.55 (.022)
0.46 (.018)
3X
3X
1.40 (.055)
3X
1.15 (.045)
0.36 (.014)
M
B A M
2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
NOTES:
1
2
DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
CONTROLLING DIMENSION : INCH
3
4
OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
TO-220AB Part Marking Information
E XAMPLE: THIS IS AN IRF1010
LOT CODE 1789
PART NUMBER
AS S EMBLED ON WW 19, 1997
IN T HE AS S E MBLY LINE "C"
INTERNATIONAL
RE CTIFIER
LOGO
Note: "P" in assembly line
position indicates "Lead-Free"
DATE CODE
YEAR 7 = 1997
WEEK 19
AS SE MBLY
LOT CODE
LINE C
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.11/03
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/
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