Q67000-A9283 [INFINEON]
5-A H-Bridge for DC-Motor Applications; 5 -A H桥的直流电机的应用
| 型号： | Q67000-A9283 |
| 厂家： | 
Infineon |
| 描述： | 5-A H-Bridge for DC-Motor Applications |
| 文件： | 总23页 (文件大小：204K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
5-A H-Bridge for DC-Motor Applications
TLE 5205-2
1
Overview
Features
1.1
• Delivers up to 5 A continuous 6 A peak current
• Optimized for DC motor management applications
• Operates at supply voltages up to 40 V
• Very low RDS ON; typ. 200 mΩ @ 25 °C per switch
• Output full short circuit protected
• Overtemperature protection with hysteresis
and diagnosis
P-TO220-7-11
• Short circuit and open load diagnosis
with open drain error flag
• Undervoltage lockout
• CMOS/TTL compatible inputs with hysteresis
• No crossover current
P-DSO-20-12
• Internal freewheeling diodes
• Wide temperature range; − 40 °C < Tj < 150 °C
Type
Ordering Code Package
TLE 5205-2
Q67000-A9283 P-TO220-7-11
P-TO263-7-1
TLE 5205-2GP Q67006-A9237 P-DSO-20-12
TLE 5205-2G
TLE 5205-2S
Q67006-A9325 P-TO263-7-1
Q67000-A9324 P-TO220-7-12
Description
P-TO220-7-12
The TLE 5205-2 is an integrated power H-bridge with
DMOS output stages for driving DC-Motors. The part is
built using the Infineon multi-technology process SPT® which allows bipolar and CMOS
control circuitry plus DMOS power devices to exist on the same monolithic structure.
Operation modes forward (cw), reverse (ccw), brake and high impedance are invoked
from just two control pins with TTL/CMOS compatible levels. The combination of an
extremely low RDS ON and the use of a power IC package with low thermal resistance and
high thermal capacity helps to minimize system power dissipation. A blocking capacitor
at the supply voltage is the only external circuitry due to the integrated freewheeling
diodes.
Data Sheet
1
2001-06-19
TLE 5205-2
Overview
1.2
Pin Configuration (top view)
TLE 5205-2
TLE 5205-2GP
GND
N.C.
N.C.
N.C.
N.C.
VS
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
GND
N.C.
N.C.
N.C.
N.C.
VS
Q1
Q2
EF
N.C.
IN2
IN1
1
2
3
4
5
6
7
GND
GND
AEP01680
TLE 5205-2S
EF
GND
VS
OUT1
IN1
IN2
OUT2
AEP01990
TLE 5205-2G
1
2
3
4
5
6
7
1
2
3
4
5
6
7
OUT1 IN1
EF
IN2
GND
OUT2
VS
AEP01991
OUT1
EF
IN1
IN2
OUT2
GND
VS
AEP02513
Figure 1
Data Sheet
2
2001-06-19
TLE 5205-2
Overview
1.3
Pin Definitions and Functions
Pin No.
P-TO220 P-DSO
Pin No.
Symbol
OUT1
EF
Function
1
2
3
4
5
7
8
9
Output of Channel 1; Short-circuit protected;
integrated freewheeling diodes for inductive loads.
Error Flag; TTL/CMOS compatible output
for error detection; (open drain)
IN1
Control Input 1;
TTL/CMOS compatible
1, 10,
11, 20
GND
IN2
Ground;
internally connected to tab
12
Control Input 2;
TTL/CMOS compatible
6
7
6, 15
14
VS
Supply Voltage; block to GND
OUT2
Output of Channel 2; Short-circuit protected;
integrated freewheeling diodes for inductive loads.
–
2, 3, 4, 5, N.C.
16, 17, 18,
19
Not Connected
Data Sheet
3
2001-06-19
TLE 5205-2
Overview
1.4
Functional Block Diagram
V
S
6
2
EF
Error Flag
Diagnosis and Protection Circuit 1
1
OUT1
IN
OUT
3
5
IN1
IN2
1
2
1
2
0
0
1
1
0
1
0
1
1
0
0
Z
0
1
0
Z
7
OUT2
Diagnosis and Protection Circuit 2
4
AEB02394
GND
Figure 2 Block Diagram
Data Sheet
4
2001-06-19
TLE 5205-2
Overview
1.5
Circuit Description
Input Circuit
The control inputs consist of TTL/CMOS-compatible schmitt-triggers with hysteresis.
Buffer amplifiers are driven by this stages.
Output Stages
The output stages consist of a DMOS H-bridge. Integrated circuits protect the outputs
against short-circuit to ground and to the supply voltage. Positive and negative voltage
spikes, which occur when switching inductive loads, are limited by integrated
freewheeling diodes.
A monitoring circuit for each output transistor detects whether the particular transitor is
active and in this case prevents the corresponding source transistor (sink transistor) from
conducting in sink operation (source operation). Therefore no crossover currents can
occur.
1.6
Input Logic Truth Table
Functional Truth Table
IN1
L
IN2
L
OUT1 OUT2 Comments
H
L
L
Z
L
H
L
Z
Motor turns clockwise
L
H
Motor turns counterclockwise
Brake; both low side transistors turned-ON
Open circuit detection
H
L
H
H
Notes for Output Stage
Symbol
Value
L
Low side transistor is turned-ON
High side transistor is turned-OFF
H
Z
High side transistor is turned-ON
Low side transistor is turned-OFF
High side transistor is turned-OFF
Low side transistor is turned-OFF
Data Sheet
5
2001-06-19
TLE 5205-2
Overview
1.7
Monitoring Functions
Undervoltage lockout (UVLO):
When VS reaches the switch on voltage VS ON the IC becomes active with a hysteresis.
All output transistors are switched off if the supply voltage VS drops below the switch off
value VS OFF.
1.8
Protective Function
Various errors like short-circuit to + VS, ground or across the load are detected. All faults
result in turn-OFF of the output stages after a delay of 50 µs and setting of the error flag
EF to ground. Changing the inputs resets the error flag.
a. Output Shorted to Ground Detection
If a high side transistor is switched on and its output is shorted to ground, the output
current is internally limited. After a delay of 50 µs all outputs will be switched-OFF and
the error flag is set.
b. Output Shorted to + VS Detection
If a low side transistor is switched on and its output is shorted to the supply voltage,
the output current is internally limited. After a delay of 50 µs all outputs will be
switched-OFF and the error flag is set.
c. Overload Detection
An internal circuit detects if the current through the low side transistor exceeds the
trippoint ISDL. In this case all outputs are turned off after 50 µs and the error flag is set.
d. Overtemperature Protection
At a junction temperature higher than 150 °C the thermal shutdown turns-OFF, all four
output stages commonly and the error flag is set with a delay.
e. Open Load Detection
The output Q1 has a 10 kΩ pull-up resistor and the output Q2 has a 10 kΩ pull-down
resistor. If E1 and E2 are high, all output power stages are turned-OFF. In case of no
load between Q1 and Q2 the output voltage Q1 is VS and Q2 is ground. This state will
be detected by two comparators and an error flag will be set after a delay time of
50 µs. Changing the inputs resets the error flip flop.
Data Sheet
6
2001-06-19
TLE 5205-2
Overview
=
V
EH
Pull UP
10 k
Ω
EF
Pull
Down
10 k
=
V
&
EL
50 µs
RS
FF
Ω
AES02395
Figure 3 Simplified Schematic for Open Load Detection
Data Sheet
7
2001-06-19
TLE 5205-2
Diagnosis
2
Diagnosis
Various errors as listed in the table “Diagnosis” are detected. Short circuits and overload
result in turning off the output stages after a delay tdSD and setting the error flag
simultaneously [EF = L]. Changing the inputs to a state where the fault is not detectable
resets the error flag (input toggling) with the exception of short circuit from OUT1 to
OUT2 (load short circuit).
Flag
IN1 IN2 OUT1 OUT2 EF Remarks
Nr.
0
0
1
1
0
1
0
1
H
L
L
Z
L
H
L
Z
1
1
1
0
Not detectable
Not detectable
Not detectable
1
2
3
4
Open circuit between OUT1 and OUT2
0
0
1
1
0
1
0
1
VS/2
VS/2
L
VS/2
VS/2
L
0
0
1
1
5
6
7
8
Short circuit from OUT1 to OUT2
Short circuit from OUT1 to GND
Short circuit from OUT2 to GND
Short circuit from OUT1 to VS
Not detectable
Not detectable
Z
Z
0
0
1
1
0
1
0
1
GND
GND
GND
GND
L
H
L
L
0
1
1
1
9
Not detectable 10
Not detectable 11
Not detectable 12
0
0
1
1
0
1
0
1
H
L
L
L
GND
GND
GND
GND
1
0
1
1
Not detectable 13
14
Not detectable 15
Not detectable 16
0
0
1
1
0
1
0
1
VS
VS
VS
VS
L
1
0
0
1
Not detectable 17
H
H
H
18
19
Not detectable 20
0
0
1
1
0
1
0
1
H
L
H
H
VS
VS
VS
VS
0
1
0
1
21
Not detectable 22
23
Short circuit from OUT2 to VS
Not detectable 24
Overtemperature or undervoltage
0
0
1
1
0
1
0
1
Z
Z
Z
Z
Z
Z
Z
Z
0
0
0
0
25
26
27
28
IN: 0 = Logic LOW OUT: Z = Output in tristate condition
EF: 1 = No error
0 = Error
1 = Logic HIGH
= VS /2 due to internal Pull-up/down resistors
L = Output in sink condition
H = Output in source condition
Data Sheet
8
2001-06-19
TLE 5205-2
Electrical Characteristics
3
Electrical Characteristics
3.1
Absolute Maximum Ratings
– 40 °C < Tj < 150 °C
Parameter
Symbol Limit Values Unit
min. max.
Remarks
Voltages
Supply voltage
VS
– 0.3 40
V
V
V
V
–
– 1
40
7
t < 0.5 s; IS > – 5 A
0 V < VS < 40 V
–
Logic input voltage
VIN1, 2
VEF
– 0.3
– 0.3
Diagnostics output voltage
7
Currents of DMOS-Transistors and Freewheeling Diodes
Output current (cont.)
Output current (peak)
Output current (peak)
IOUT1, 2 – 5
IOUT1, 2 – 6
5
6
–
A
A
A
–
tp < 100 ms; T = 1 s
IOUT1, 2
–
tp < 50 µs; T = 1 s;
internally limitted;
see overcurrent
Temperatures
Junction temperature
Storage temperature
Tj
– 40
– 50
150
150
°C
°C
–
–
Tstg
Thermal Resistances
Junction case
RthjC
RthjA
–
3
K/W
P-TO220-7-11/12,
P-TO263-7-1
Junction ambient
–
–
–
–
65
75
5
K/W
K/W
K/W
K/W
P-TO220-7-11/12
P-TO263-7-1
Junction case
RthjC
RthjA
P-DSO-20-12
P-DSO-20-12
Junction ambient
50
Note: Maximum ratings are absolute ratings; exceeding any one of these values may
cause irreversible damage to the integrated circuit.
Data Sheet
9
2001-06-19
TLE 5205-2
Electrical Characteristics
3.2
Operating Range
Parameter
Symbol Limit Values Unit
min. max.
Remarks
Supply voltage
VS
VUV ON 40
V
After VS rising
above VUV ON
Supply voltage increasing
Supply voltage decreasing
Logic input voltage
– 0.3 VUV ON
– 0.3 VUV OFF
V
Outputs in tristate
condition
V
VIN1, 2
Tj
– 0.3
– 40
7
V
–
–
Junction temperature
150
°C
3.3
6 V < VS < 18 V; IN1 = IN2 = HIGH
OUT1, 2 = 0 A (No load); – 40 °C < Tj < 150 °C; unless otherwise specified
Electrical Characteristics
I
Parameter
Symbol
Limit Values
Unit Test Condition
min. typ. max.
Current Consumption
Quiescent current
IS
–
–
10
mA IN1 = IN2 = LOW;
VS = 13.2 V
Under Voltage Lockout
UV-Switch-ON voltage
UV-Switch-OFF voltage
UV-ON/OFF-Hysteresis
VUV ON
–
5.3
4.7
0.6
6
V
V
V
VS increasing
VS decreasing
VUV ON – VUV OFF
VUV OFF 3.5
VUV HY 0.2
5.6
–
Data Sheet
10
2001-06-19
TLE 5205-2
Electrical Characteristics
3.3
6 V < VS < 18 V; IN1 = IN2 = HIGH
OUT1, 2 = 0 A (No load); – 40 °C < Tj < 150 °C; unless otherwise specified
Electrical Characteristics (cont’d)
I
Parameter
Symbol
Limit Values
Unit Test Condition
min. typ. max.
Outputs OUT1, 2
Static Drain-Source-On Resistance
Source
RDS ON H
–
–
220
350
mΩ 6 V < VS < 18 V
Tj = 25 °C
IOUT = – 3 A
–
500
500
mΩ 6 V < VS < 18 V
350
mΩ
V
S ON < VS ≤ 6 V
Tj = 25 °C
VS ON < VS ≤ 6 V
–
800
350
mΩ
Sink
OUT = 3 A
RDS ON L
230
mΩ 6 V < VS < 18 V
Tj = 25 °C
I
–
500
600
mΩ 6 V < VS < 18 V
400
mΩ
V
S ON < VS ≤ 6 V
Tj = 25 °C
VS ON < VS ≤ 6 V
–
1000 mΩ
Note: Values of RDS ON for VS ON < VS ≤ 6 V are guaranteed by design.
Overcurrent
Source shutdown trippoint
Sink shutdown trippoint
Shutdown delay time
– ISDH
–
–
10
–
A
A
A
A
A
A
µs
Tj = – 40 °C
Tj = 25 °C
Tj = 150 °C
Tj = – 40 °C
Tj = 25 °C
Tj = 150 °C
–
–
8
6
–
–
ISDL
–
–
10
–
–
8
6
–
–
tdSD
25
50
80
Data Sheet
11
2001-06-19
TLE 5205-2
Electrical Characteristics
3.3
6 V < VS < 18 V; IN1 = IN2 = HIGH
OUT1, 2 = 0 A (No load); – 40 °C < Tj < 150 °C; unless otherwise specified
Electrical Characteristics (cont’d)
I
Parameter
Symbol
Limit Values
Unit Test Condition
min. typ. max.
Short Circuit Current Limitation
Source current
Sink current
– ISCH
–
–
–
–
20
15
A
A
t < tdSD
t < tdSD
ISCL
Open Circuit
Pull up resistor
5
10
10
2.5
2.4
50
20
20
3
kΩ
kΩ
V
–
–
–
–
–
RUP
Pull down resistor
Switching threshold H
Switching threshold L
Detection delay time
5
RDOWN
VEH
2
2
3
V
VEH
25
80
µs
tdSD
Output Delay Times (Device Active for t > 1 ms)
Source ON
td ON H
td ON L
td OFF H
td OFF L
–
–
–
–
10
10
2
20
20
5
µs
µs
µs
µs
I
OUT = – 3 A
resistive load
OUT = 3 A
resistive load
OUT = – 3 A
resistive load
OUT = 3 A
resistive load
Sink ON
I
Source OFF
Sink OFF
I
2
5
I
Data Sheet
12
2001-06-19
TLE 5205-2
Electrical Characteristics
3.3
6 V < VS < 18 V; IN1 = IN2 = HIGH
OUT1, 2 = 0 A (No load); – 40 °C < Tj < 150 °C; unless otherwise specified
Electrical Characteristics (cont’d)
I
Parameter
Symbol
Limit Values
Unit Test Condition
min. typ. max.
Output Switching Times (Device Active for t > 1 ms)
Source ON
tON H
tON L
tOFF H
tOFF L
–
–
–
–
15
30
10
5
µs
µs
µs
µs
I
OUT = – 3 A
resistive load
OUT = 3 A
resistive load
OUT = – 3 A
resistive load
OUT = 3 A
Sink ON
5
I
Source OFF
Sink OFF
2
I
2
5
I
resistive load
Clamp Diodes
Forward Voltage
High-side
Low-side
VFH
VFL
–
–
1
1.5
1.5
V
V
IF = 3 A
IF = 3 A
1.1
Leakage Current
Source
Sink
ILKH
ILKL
– 100 – 50
–
µA
µA
OUT1 = VS
–
50
100
OUT2 = GND
Logic
Control Inputs IN 1, 2
H-input voltage threshold
L-input voltage
VINH
VINL
VINHY
IINH
2.8
–
2.5
1.7
0.8
0
–
V
–
1.2
1.2
2
V
–
Hysteresis of input voltage
H-input current
0.4
– 2
V
–
µA
µA
VIN = 5 V
VIN = 0 V
L-input current
IINL
– 10 – 4
0
Data Sheet
13
2001-06-19
TLE 5205-2
Electrical Characteristics
3.3
6 V < VS < 18 V; IN1 = IN2 = HIGH
OUT1, 2 = 0 A (No load); – 40 °C < Tj < 150 °C; unless otherwise specified
Electrical Characteristics (cont’d)
I
Parameter
Symbol
Limit Values
Unit Test Condition
min. typ. max.
Error Flag Output EF
Low output voltage
Leakage current
VEFL
IEFL
–
–
0.25 0.5
V
IEF = 3 mA
VEF = 7 V
–
10
µA
Thermal Shutdown
Thermal shutdown junction
temperature
TjSD
TjSO
150
120
175
200
170
°C
°C
–
–
Thermal switch-on junction
temperature
–
Temperature hysteresis
Shutdown delay time
∆T
–
30
50
–
K
–
–
tdSD
25
80
µs
Note: Values of thermal shutdown are guaranteed by design.
Data Sheet
14
2001-06-19
TLE 5205-2
Electrical Characteristics
Ι
; Ι
S
FU
4700 µF
63 V
470 nF
OUT1
6
Ι
Ι
Ι
EF
2
3
5
V
Ι
Ι
S
OUT1
EF
1
7
IN1
IN2
R
V
S
Load
TLE 5205-2
IN1
IN2
OUT2
OUT2
V
EF
V
IN1
GND
4
V
V
V
OUT2
IN2
OUT1
Ι
FL
AES02396
Figure 4 Test Circuit
Overcurrent
Short Circuit
Open Circuit
IOUT
ISD
ISC
IOC
Data Sheet
15
2001-06-19
TLE 5205-2
Electrical Characteristics
VIN
V
5
_
<
tr = tf 100 ns
50%
t
t
0
Ι OUT
Source
tdONH
tdOFFH
A
3
80%
50%
20%
80%
50%
20%
0
tONH
tOFFH
Ι OUT
Sink
tOFFL
tONL
A
3
80%
80%
50%
20%
50%
20%
tdOFFL
t
0
tdONL
AET01994
Figure 5 Switching Time Definitions
+ 5 V
+V
S
100 µF
2 k
Ω
6
2
3
5
V
S
EF
1
7
OUT1
OUT2
Ι
Ι
= 3 A
N
100 nF
µP
M
TLE 5205-2
IN1
IN2
= 6 A
BL
GND
4
AES02397
Figure 6 Application Circuit
Data Sheet
16
2001-06-19
TLE 5205-2
Electrical Characteristics
IN1, 2
Ι SCH
Ι SDH
Ι OUT1, 2
VOUT1, 2
RShort x Ι SCH
VFL
t dSD
EF
AED01997
Figure 7 Timing Diagram for Output Shorted to Ground
IN1, 2
Ι SCL
Ι SDL
Ι OUT1, 2
VOUT1, 2
VS
RShort x Ι SCL
VFU
t dSD
EF
AED01998
Figure 8 Timing Diagram for Output Shorted to VS
Data Sheet
17
2001-06-19
TLE 5205-2
Electrical Characteristics
Diagrams
Quiescent Current IS (Active)
versus Junction Temperature Tj
Static Drain-Source ON-Resistance
versus Junction Temperature Tj
AED02399
AED02398
0.6
7
mA
R
ON
Ι
S
0.5
0.4
0.3
0.2
0.1
0
6
5
4
3
2
Low Side Transistor
V
= 18 V
S
High Side Transistor
V
= 6 V
S
1
-50
0
50
100
150
C
-50
0
50
100
150
C
T
T
j
j
Input Switching Thresholds VINH, L
versus Junction Temperature Tj
Clamp Diode Forward Voltage VF
versus Junction Temperature Tj
AED02400
AED02401
3.0
1.3
1.2
1.1
1.0
0.9
0.8
0.7
V
V
V
F
INH, L
INH
2.5
2.0
1.5
1.0
0.5
0
High Side Transistor
V
INL
Low Side Transistor
-50
0
50
100
150
-50
0
50
100
150
C
C
T
T
j
j
Data Sheet
18
2001-06-19
TLE 5205-2
Electrical Characteristics
Overcurrent Shutdown Threshold ISD
versus Junction Temperature Tj
Switching Threshold VEH, VEH
versus Junction Temperature Tj
AED02402
AED02404
12
3.0
Ι
V
,V
EL
SD
EH
10
2.8
2.6
2.4
2.2
2.0
1.8
Low Side Transistor
8
V
V
EH
EL
High Side Transistor
6
4
2
0
-50
0
50
100
150
C
-50
0
50
100
150
C
T
T
j
j
Error-Flag Saturation Output Voltage
VEF versus Junction Temperature Tj
AED02403
0.6
V
EF
0.5
0.4
0.3
0.2
0.1
0
-50
0
50
100
150
C
T
j
Data Sheet
19
2001-06-19
TLE 5205-2
Package Outlines
4
Package Outlines
P-TO220-7-11
(Plastic Transistor Single Outline Package)
±0.2
10
A
±0.2
9.9
4.4
8.51)
1.27±0.1
0.05
0...0.3
C
7x 0.6 ±0.1
0.5±0.1
3.9±0.4
2.4
0...0.15
6x 1.27
M
0.25
A C
8.4±0.4
1)
Typical
Metal surface min. X=7.25, Y=12.3
All metal surfaces tin plated, except area of cut.
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book “Package Information”.
Dimensions in mm
2001-06-19
Data Sheet
20
TLE 5205-2
Package Outlines
P-DSO-20-12
(Plastic Dual Small Outline Package)
1)
±0.15
11
B
1.2 -0.3
2.8
+0.07
-0.02
0.25
±0.1
15.74
6.3
1.27
Heatsink
0.1
0.4 +0.13
±0.15
0.95
M
0.25 A 20x
±0.3
14.2
M
0.25
B
20
11
1
1 x 45˚
10
Index Marking
1)
±0.15
15.9
A
1) Does not include plastic or metal protrusion of 0.15 max. per side
GPS05791
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book “Package Information”.
Dimensions in mm
2001-06-19
SMD = Surface Mounted Device
Data Sheet
21
TLE 5205-2
Package Outlines
P-TO263-7-1 Option E3180
(Plastic Transistor Single Outline Package)
4.4
±0.2
10
±0.1
1.27
0...0.3
A
B
8.5 1)
0.05
2.4
0.1
0...0.15
7x0.6±0.1
0.5±0.1
6x 1.27
M
0.25
A B
8
˚
max.
0.1
B
1)
Typical
Metal surface min. X=7.25, Y=6.9
All metal surfaces tin plated, except area of cut.
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book “Package Information”.
Dimensions in mm
SMD = Surface Mounted Device
Data Sheet
22
2001-06-19
TLE 5205-2
Package Outlines
P-TO220-7-12
(Plastic Transistor Single Outline Package)
±0.2
10
A
B
±0.2
9.9
4.4
8.51)
1.27±0.1
0...0.3
0.05
2.4
C
±0.1
0.5
0...0.15
2.4
7x 0.6 ±0.1
6x 1.27
M
0.25
A B C
1)
Typical
Metal surface min. X=7.25, Y=12.3
All metal surfaces tin plated, except area of cut.
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book “Package Information”.
Dimensions in mm
2001-06-19
Data Sheet
23
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