SP000917596 [INFINEON]

Small Signal Field-Effect Transistor,;
SP000917596
型号: SP000917596
厂家: Infineon    Infineon
描述:

Small Signal Field-Effect Transistor,

文件: 总9页 (文件大小:197K)
中文:  中文翻译
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2N7002DW  
OptiMOSSmall-Signal-Transistor  
Features  
Product Summary  
V DS  
60  
3
V
• Dual N-channel  
R DS(on),max  
V GS=10 V  
V GS=4.5 V  
Ω
• Enhancement mode  
• Logic level  
4
• Avalanche rated  
I D  
0.3  
A
• Fast switching  
• Qualified according to AEC Q101  
PG-SOT363  
• 100% lead-free; RoHS compliant  
6
5
4
• Halogen-free according to IEC61249-2-21  
1
2
3
Type  
Package  
Tape and Reel Information  
Marking  
HalogenFree Packing  
Yes Non Dry  
2N7002DW PG-SOT363 H6327: 3000 pcs/reel  
X8s  
Parameter 1)  
Value  
Symbol Conditions  
Unit  
I D  
T A=25 °C  
T A=70 °C  
Continuous drain current  
0.30  
0.24  
A
I D,pulse  
T A=25 °C  
Pulsed drain current  
1.2  
1.3  
E AS  
I D=0.3 A, R GS=25 Ω  
Avalanche energy, single pulse  
mJ  
I D=0.3 A, V DS=48 V,  
di /dt =200 A/µs,  
Reverse diode dv /dt  
dv /dt  
6
kV/µs  
V
T
j,max=150 °C  
V GS  
Gate source voltage  
±20  
ESD class  
JESD22-A114 (HBM)  
class 0 (<250V)  
0.5  
P tot  
T A=25 °C  
Power dissipation  
W
T j, T stg  
Operating and storage temperature  
-55 ... 150  
55/150/56  
°C  
IEC climatic category; DIN IEC 68-1  
1) Remark: one of both transistors in operation.  
Rev.2.2  
page 1  
2011-06-16  
2N7002DW  
Unit  
Values  
typ.  
Parameter  
Symbol Conditions  
min.  
max.  
Thermal characteristics  
Thermal resistance,  
junction - minimal footprint2)  
R thJA  
-
-
250 K/W  
Electrical characteristics, at T j=25 °C, unless otherwise specified  
Static characteristics  
V (BR)DSS V GS= 0 V, I D=250 µA  
Drain-source breakdown voltage  
Gate threshold voltage  
60  
1.5  
-
-
2.1  
-
-
V
V GS(th)  
V DS=VGS, I D=250 µA  
2.5  
0.1  
V DS=60 V, V GS=-10 V,  
T j=25 °C  
I D (off)  
Drain-source leakage current  
µA  
V
V
DS=60 V,  
-
-
5
GS=0 V, T j=150 °C  
I GSS  
V GS=20 V, V DS=0 V  
Gate-source leakage current  
-
-
1
10  
4
nA  
R DS(on) V GS=4.5 V, I D=0.25 A  
Drain-source on-state resistance  
2.0  
1.6  
0.36  
Ω
V
GS=10 V, I D=0.5 A  
-
3
|V DS|>2|I D|R DS(on)max  
I D=0.24 A  
,
g fs  
Transconductance  
0.2  
-
S
2) Perfomed on a 40x40mm2 FR4 PCB with both sided Cu sense-force traces, each 1mm wide, 70μm thick and 20mm  
long.  
Rev.2.2  
page 2  
2011-06-16  
2N7002DW  
Unit  
Values  
typ.  
Parameter  
Symbol Conditions  
min.  
max.  
Dynamic characteristics  
Input capacitance  
Output capacitance  
Reverse transfer capacitance  
Turn-on delay time  
Rise time  
C iss  
-
-
-
-
-
-
-
13  
4.1  
2.0  
3.0  
3.3  
5.5  
3.1  
20  
pF  
ns  
V GS=0 V, V DS=25 V,  
f =1 MHz  
C oss  
Crss  
t d(on)  
t r  
6
3
4.5  
5
V
DD=30 V, V GS=10 V,  
I D=0.5 A, R G=6 Ω  
t d(off)  
t f  
Turn-off delay time  
Fall time  
9
5
Gate Charge Characteristics  
Gate to source charge  
Gate to drain charge  
Gate charge total  
Q gs  
-
-
-
-
0.05  
0.2  
0.4  
4.0  
0.1  
0.4  
0.6  
-
nC  
Q gd  
V
V
DD=48 V, I D=0.5 A,  
GS=0 to 10 V  
Q g  
V plateau  
Gate plateau voltage  
V
A
Reverse Diode  
I S  
Diode continous forward current  
Diode pulse current  
-
-
-
-
0.3  
1.2  
T A=25 °C  
I S,pulse  
V GS=0 V, I F=0.5 A,  
T j=25 °C  
V SD  
Diode forward voltage  
-
0.96  
1.2  
V
t rr  
Reverse recovery time  
-
-
8.5  
2.4  
13  
4
ns  
V R=30 V, I F=0.5 A,  
di F/dt =100 A/µs  
Q rr  
Reverse recovery charge  
nC  
Rev.2.2  
page 3  
2011-06-16  
2N7002DW  
1 Power dissipation  
2 Drain current  
P
tot=f(T A)  
I D=f(T A); V GS10 V  
0.35  
0.3  
0.5  
0.4  
0.3  
0.2  
0.1  
0.25  
0.2  
0.15  
0.1  
0.05  
0
0
0
40  
80  
120  
160  
0
40  
80  
120  
160  
T A [°C]  
T A [°C]  
3 Safe operating area  
I D=f(V DS); T A=25 °C; D =0  
parameter: t p  
4 Max. transient thermal impedance  
Z thJA=f(t p)  
parameter: D =t p/T  
101  
103  
limited by on-state  
resistance  
1 µs  
100  
10-1  
10-2  
0.5  
10 µs  
102  
0.2  
100 µs  
1 ms  
0.1  
0.05  
0.02  
single pulse  
10 ms  
DC  
0.01  
101  
100  
10-3  
1
10-5 10-4 10-3 10-2 10-1 100 101 102 103  
10  
100  
V DS [V]  
t p [s]  
Rev.2.2  
page 4  
2011-06-16  
2N7002DW  
5 Typ. output characteristics  
I D=f(V DS); T j=25 °C  
6 Typ. drain-source on resistance  
R DS(on)=f(I D); T j=25 °C  
parameter: V GS  
parameter: V GS  
6
0.6  
5 V  
7 V  
10 V  
5
0.5  
4.5 V  
2.9 V  
3.2 V  
3.5 V  
4 V  
4 V  
4
3
2
1
0
0.4  
0.3  
0.2  
0.1  
0
3.5 V  
4.5 V  
5 V  
7 V  
10 V  
3.2 V  
2.9 V  
0
0.1  
0.2  
0.3  
0.4  
0.5  
0
1
2
3
4
5
V DS [V]  
ID [A]  
7 Typ. transfer characteristics  
8 Typ. forward transconductance  
I D=f(V GS); |V DS|>2|I D|R DS(on)max  
g fs=f(I D); T j=25 °C  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0
0.5  
0.45  
0.4  
0.35  
0.3  
0.25  
0.2  
0.15  
0.1  
0.05  
0
0
1
2
3
4
5
0.00  
0.10  
0.20  
ID [A]  
0.30  
0.40  
V GS [V]  
Rev.2.2  
page 5  
2011-06-16  
2N7002DW  
9 Drain-source on-state resistance  
10 Typ. gate threshold voltage  
V GS(th)=f(T j); V DS=VGS; I D=250 µA  
parameter: I D  
R
DS(on)=f(T j); I D=0.3 A; V GS=10 V  
6.0  
5.0  
3.2  
2.8  
2.4  
2
98 %  
typ  
4.0  
98 %  
3.0  
1.6  
2 %  
1.2  
0.8  
0.4  
0
2.0  
typ  
1.0  
0.0  
-60  
-20  
20  
60  
100  
140  
-60  
-20  
20  
60  
100  
140  
T j [°C]  
T j [°C]  
11 Typ. capacitances  
12 Forward characteristics of reverse diode  
I F=f(V SD  
C =f(V DS); V GS=0 V; f =1 MHz; Tj=25°C  
)
parameter: T j  
102  
150 °C, 98%  
100  
10-1  
10-2  
150 °C  
25 °C  
Ciss  
25 °C, 98%  
101  
Coss  
Crss  
100  
10-3  
0
0
10  
20  
30  
0.4  
0.8  
V SD [V]  
1.2  
1.6  
V DS [V]  
Rev.2.2  
page 6  
2011-06-16  
2N7002DW  
13Avalanche characteristics  
AS =f(t AV ); R GS =25  
14 Typ. gate charge  
V GS=f(Q gate); I D=0.5 A pulsed  
parameter: V DD  
I
parameter: TJ(start)  
100  
10  
9
8
30 V  
25 °C  
7
100 °C  
10-1  
125 °C  
12 V  
48 V  
6
5
4
3
2
1
0
10-2  
10-3  
100  
101  
102  
103  
0
0.1  
0.2  
0.3  
0.4  
0.5  
tAV [µs]  
Q gate [nC]  
15 Drain-source breakdown voltage  
V
BR(DSS)=f(T j); I D=250 µA  
70  
65  
60  
55  
50  
-40  
0
40  
80  
120  
160  
T j [°C]  
Rev.2.2  
page 7  
2011-06-16  
2N7002DW  
SOT363  
Package Outline:  
Footprint:  
Packing:  
Rev.2.2  
page 8  
2011-06-16  
2N7002DW  
Published by  
Infineon Technologies AG  
81726 Munich, Germany  
© 2008 Infineon Technologies AG  
All Rights Reserved.  
Legal Disclaimer  
The information given in this document shall in no event be regarded as a guarantee of  
conditions or characteristics. With respect to any examples or hints given herein, any typical  
values stated herein and/or any information regarding the application of the device,  
Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind,  
including without limitation, warranties of non-infringement of intellectual property rights  
of any third party.  
Information  
For further information on technology, delivery terms and conditions and prices, please  
contact the nearest Infineon Technologies Office (www.infineon.com).  
Warnings  
Due to technical requirements, components may contain dangerous substances. For information  
on the types in question, please contact the nearest Infineon Technologies Office.  
Infineon Technologies components may be used in life-support devices or systems only with  
the express written approval of Infineon Technologies, if a failure of such components can  
reasonably be expected to cause the failure of that life-support device or system or to affect  
the safety or effectiveness of that device or system. Life support devices or systems are  
intended to be implanted in the human body or to support and/or maintain and sustain  
and/or protect human life. If they fail, it is reasonable to assume that the health of the user  
or other persons may be endangered.  
Rev.2.2  
page 9  
2011-06-16  

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