IS31FL3737-QFLS4-TR [ISSI]
LED Driver,;型号: | IS31FL3737-QFLS4-TR |
厂家: | INTEGRATED SILICON SOLUTION, INC |
描述: | LED Driver, 驱动 接口集成电路 |
文件: | 总28页 (文件大小:911K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
IS31FL3737
12×12 DOTS MATRIX LED DRIVER
WITH INDIVIDUAL AUTO BREATH FUNCTION
July 2016
GENERAL DESCRIPTION
FEATURES
The IS31FL3737 is a general purpose 12×12 LEDs
matrix driver with 1/12 cycle rate. The device can be
programmed via an I2C compatible interface. Each
LED can be dimmed individually with 8-bit PWM data
which allowing 256 steps of linear dimming.
Supply voltage range: 2.7V to 5.5V
12 current source outputs for row control
12 switch current inputs for column scan control
Up to 144 LEDs (12×12) in dot matrix
Programmable 12×12 (48 RGBs) matrix size with
de-ghost function
1MHz I2C-compatible interface
Selectable 3 Auto Breath Modes for each dot
Auto Breath Loop Features interrupt pin inform
MCU Auto Breath Loop completed
Auto Breath offers 128 steps gamma current,
interrupt and state look up registers
IS31FL3737 features 3 Auto Breathing Modes which
are noted as ABM-1, ABM-2 and ABM-3. For each
Auto Breathing Mode, there are 4 timing characters
which include current rising / holding / falling / off time
and 3 loop characters which include Loop-Beginning /
Loop-Ending / Loop-Times. Every LED can be
configured to be any Auto Breathing Mode or No-
Breathing Mode individually.
256 steps Global Current Setting
Individual on/off control
Additionally each LED open and short state can be
detected, IS31FL3737 store the open or short
information in Open-Short Registers. The Open-Short
Registers allowing MCU to read out via I2C
compatible interface. Inform MCU whether there are
LEDs open or short and the locations of open or short
LEDs.
Individual 256 PWM control steps
Individual Auto Breath Mode select
Individual open and short error detect function
Cascade for synchronization of chips
QFN-40 (5mm×5mm) package
The IS31FL3737 operates from 2.7V to 5.5V and
features a very low shutdown and operational current.
APPLICATIONS
IS31FL3737 is available in QFN-40 (5mm×5mm)
package. It operates from 2.7V to 5.5V over the
temperature range of -40°C to +125°C.
Mobile phones and other hand-held devices for
LED display
Gaming device (Keyboard, Mouse etc.)
LED in white goods application
TYPICAL APPLICATION CIRCUIT
VCC_5V
VIO/MCU
32
*Note2
19
PVCC
PVCC
VCC
VIO
CS1 CS2 CS3 CS4 CS5 CS6 CS7 CS8 CS9 CS10 CS11 CS12
0.47μF 0.1μF
0.47μF
22μF/10V
26
L
K
J
0.47μF 0.1μF
0.47μF 0.1μF
SW12
SW11
SW10
SW9
SW8
SW7
SW6
SW5
SW4
SW3
SW2
SW1
28
27
31
CS12
CS11
VIO/MCU
I
100kΩ 4.7kΩ 4.7kΩ
16
15
CS2
CS1
H
G
F
E
D
C
B
A
34
35
37
38
39
SDA
SCL
INTB
SDB
IS31FL3737
Micro
Controller
14
13
SW12
SW11
IICRST
100kΩ 100kΩ
2
1
33
30
SW2
SW1
SYNC
RSET
R
20kΩ
EXT
36
40
4,11
29
ADDR
GND
PGND
AGND
1
2
3
4
5
6
7
8
9
10
11
12
Figure 1 Typical Application Circuit (12×12)
Note 1: For the mobile applications the IC should be placed far away from the mobile antenna in order to prevent the EMI.
Note 2: Electrolytic/Tantalum Capacitor may considerable for high current application to avoid audible noise interference.
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Rev. A, 07/19/2016
IS31FL3737
TYPICAL APPLICATION CIRCUIT (CONTINUED)
VCC_5V
VIO/MCU
*Note4
19
32
PVCC
PVCC
VCC
VIO
CS1 CS2 CS3 CS4 CS5 CS6 CS7 CS8 CS9 CS10 CS11 CS12
22μF/10V
0.47μF 0.1μF
0.47μF
26
L
K
J
0.47μF 0.1μF
0.47μF 0.1μF
SW12
SW11
SW10
SW9
SW8
SW7
SW6
SW5
SW4
SW3
SW2
SW1
28
27
31
CS12
CS11
VIO/MCU
I
100kΩ 4.7kΩ 4.7kΩ
16
15
CS2
CS1
H
G
F
E
D
C
B
A
34
35
37
38
39
SDA
SCL
INTB
SDB
IS31FL3737
Micro
Controller
14
13
SW12
SW11
IICRST
100kΩ 100kΩ
2
1
33
30
SW2
SW1
SYNC
RSET
R
20kΩ
EXT
36
40
4,11
29
ADDR
GND
PGND
AGND
1
2
3
4
5
6
7
8
9
10
11
12
Figure 2 Typical Application Circuit (RGB)
Note 3: For the mobile applications the IC should be placed far away from the mobile antenna in order to prevent the EMI.
Note 4: Electrolytic/Tantalum Capacitor may considerable for high current application to avoid audible noise interference.
VBattery
ADDR
ADDR
SDA
ADDR
SCL
ADDR
VIO
100kΩ 1kΩ 1kΩ
SDA
SDA
SDA
SCL
SDA
SDA
SCL
SDA
SDA
SCL
SDA
SCL
INTB
SDB
SCL
SCL
SCL
SCL
Micro
Controller
INTB
SDB
INTB
SDB
INTB
SDB
INTB
SDB
SDB
SDB
SDB
IICRST
IICRST
IICRST
IICRST
IICRST
IICRST
IICRST
IICRST
100kΩ 100kΩ
SYNC
SYNC
SYNC
SYNC
Master
Slave 1
Slave 2
Slave 3
Figure 3 Typical Application Circuit (Four Parts Synchronization-Work)
Note 5: One part is configured as master mode, all the other 3 parts configured as slave mode. Work as master mode or slave mode specified
by Configuration Register (Function register, address 00h). Master part output master clock, and all the other parts which work as slave input
this master clock.
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Rev. A, 07/19/2016
IS31FL3737
PIN CONFIGURATION
Package
Pin Configuration (Top View)
SW1
SW2
SW3
PGND
SW4
SW5
SW6
SW7
SW8
1
2
3
4
5
6
7
8
9
30 RSET
29 AGND
28 CS12
27 CS11
26 PVCC
25 CS10
24 CS9
QFN-40
23 CS8
22 CS7
SW9 10
21 CS6
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Rev. A, 07/19/2016
IS31FL3737
PIN DESCRIPTION
No.
Pin
Description
1~3,5~10,
12~14
SW1~SW12
PGND
Switch pin for LED matrix scanning.
Power GND.
4,11
15~18,20~25,
27,28
CS1~CS12
Current Source.
19,26
29
PVCC
AGND
Power for current source.
Analog GND.
Input terminal used to connect an external resistor.
This regulates current source DC current value.
30
RSET
31
32
VCC
VIO
Power for analog and digital circuits.
Input logic reference voltage.
Synchronize pin. It is used for more than one part
work synchronize. If it is not used please float this pin.
33
SYNC
34
35
36
SDA
I2C compatible serial data.
I2C compatible serial clock.
I2C address setting.
SCL
ADDR
Interrupt output pin. Register F0h sets the function of
the INTB pin and active low when the interrupt event
happens. Can be NC (float) if interrupt function no
used.
37
INTB
38
39
40
SDB
Shutdown the chip when pull to low.
Reset I2C when pull high, need to pull down when
normal operation.
IICRST
GND
Connect to GND.
Thermal Pad Need to connect to GND pins.
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Rev. A, 07/19/2016
IS31FL3737
ORDERING INFORMATION
Industrial Range: -40°C to +125°C
Order Part No.
Package
QTY/Reel
IS31FL3737-QFLS4-TR
QFN-40, Lead-free
2500
Copyright © 2016 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any
time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are
advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the
product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not
authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
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Rev. A, 07/19/2016
IS31FL3737
ABSOLUTE MAXIMUM RATINGS
Supply voltage, VCC
-0.3V ~ +6.0V
-0.3V ~ VCC+0.3V
150°C
-65°C ~ +150°C
-40°C ~ +125°C
24.96°C/W
±8kV
Voltage at any input pin
Maximum junction temperature, TJMAX
Storage temperature range, TSTG
Operating temperature range, TA
Thermal resistance, junction to ambient, θJA
ESD (HBM)
ESD (CDM)
±1kV
Note:
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only
and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the specifications is
not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
The following specifications apply for VCC = 3.6V, TA = 25°C, unless otherwise noted.
Symbol
Parameter
Conditions
Min.
Typ.
Max. Unit
VCC Supply voltage
2.7
5.5
3
V
ICC
Quiescent power supply current
VSDB = VCC, all LEDs off
VSDB = 0V
2
2
mA
5
ISD
Shutdown current
μA
VSDB = VCC, Configuration Register
written “0000 0000
2
5
Maximum constant current of
CS1~CS12
IOUT
ILED
RSET=20kΩ
39
42
45
mA
Average current on each LED
ILED = LOUT/12.75
RSET=20kΩ, GCC=255,
PWM = 255
3.06
3.29
250
3.53 mA
Current sink headroom voltage
SW1~SW12
ISINK = 504mA (Note 1,2)
ISOURCE = 42mA (Note 1)
350
mV
200
VHR
Current source headroom voltage
CS1~C12
150
128
tSCAN Period of scanning
Non-overlap blanking time during
tNOL scan, the SWy and CSx are all off
during this time
115
7.2
140
µs
µs
8
8.75
Logic Electrical Characteristics (SDA, SCL, ADDR1, ADDR2, SYNC, SDB)
VIL
VIH
Logic “0” input voltage
Logic “1” input voltage
VIO=3.6V
VIO=3.6V
VIO=3.6V
GND
0.2VIO
VIO
V
V
0.75VIO
VHYS Input Schmitt trigger hysteresis
0.2
V
VOL Logic “0” output voltage for SYNC IOL = 8mA
VOH Logic “1” output voltage for SYNC IOH = 8mA
0.4
V
0.75VIO
V
IIL
Logic “0” input current
Logic “1” input current
VINPUT = 0V (Note 3)
VINPUT = VIO (Note 3)
5
5
nA
nA
IIH
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Rev. A, 07/19/2016
IS31FL3737
DIGITAL INPUT SWITCHING CHARACTERISTICS (NOTE 3)
Fast Mode
Typ.
Fast Mode Plus
Max. Min. Typ. Max.
Symbol
Parameter
Units
Min.
fSCL
tBUF
Serial-clock frequency
-
400
-
-
1000 kHz
Bus free time between a STOP and a START
condition
1.3
0.5
-
μs
tHD, STA Hold time (repeated) START condition
tSU, STA Repeated START condition setup time
tSU, STO STOP condition setup time
tHD, DAT Data hold time
0.6
0.6
0.6
-
-
-
-
-
-
-
-
0.26
0.26
0.26
-
-
-
-
-
-
-
-
μs
μs
μs
μs
ns
μs
μs
tSU, DAT Data setup time
100
1.3
0.7
50
tLOW SCL clock low period
0.5
0.26
tHIGH SCL clock high period
Rise time of both SDA and SCL signals,
receiving
tR
-
-
300
300
-
-
120 ns
120 ns
Fall time of both SDA and SCL signals,
receiving
tF
Note 1: In case of REXT = 20kΩ, Global Current Control Register (PG3, 01h) written “1111 1111”, GCC = “1111 1111”.
Note 2: All LEDs are on and PWM = “1111 1111”, GCC = “1111 1111”.
Note 3: Guaranteed by design.
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Rev. A, 07/19/2016
IS31FL3737
FUNCTIONAL BLOCK DIAGRAM
SYNC
INTB
SDB
RSET
Bias
SSD
Mode
PVCC
VCC
Bandgap
OSC
Control
Interrupt
Auto Breath
Mode Selection
144 Bytes
Auto
Breath
Control
Sequence
Auto Breath Mode
Timing Setting 3
Groups
SDA
SCL
I2C
Interface
ADDR
VIO
Pointer
PWM 144 Bytes
LED On/Off
CS1~CS12
12 Current Source
12 Current Sink
SW1~SW12
IICRST
Global Current
256 Steps
Pull-down/up
Ghost
Resistor Selection
Eliminating
Open/Short
PGND
AGND
GND
Open/Short
Interrupt
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Rev. A, 07/19/2016
IS31FL3737
DETAILED DESCRIPTION
IS31FL3737 has received the address correctly, then
it holds the SDA line low during the SCL pulse. If the
SDA line is not low, then the master should send a
“STOP” signal (discussed later) and abort the transfer.
I2C INTERFACE
The IS31FL3737 uses a serial bus, which conforms to
the I2C protocol, to control the chip’s functions with
two wires: SCL and SDA. The IS31FL3737 has a 7-bit
slave address (A7:A1), followed by the R/W bit, A0.
Set A0 to “0” for a write command and set A0 to “1” for
a read command. The value of bits A4:A1 are decided
by the connection of the ADDR pin.
Following acknowledge of IS31FL3737, the register
address byte is sent, most significant bit first.
IS31FL3737 must generate another acknowledge
indicating that the register address has been received.
Then 8-bit of data byte are sent next, most significant
bit first. Each data bit should be valid while the SCL
level is stable high. After the data byte is sent, the
IS31FL3737 must generate another acknowledge to
indicate that the data was received.
The complete slave address is:
Table 1 Slave Address:
ADDR
A7:A5
101
A4:A1
A0
0/1
GND
SCL
SDA
VCC
0000
0101
1010
1111
The “STOP” signal ends the transfer. To signal
“STOP”, the SDA signal goes high while the SCL
signal is high.
ADDRESS AUTO INCREMENT
ADDR connected to GND, (A4:A1)= 0000;
ADDR connected to VCC, (A4:A1)= 1111;
ADDR connected to SCL, (A4:A1)= 0101;
ADDR connected to SDA, (A4:A1)= 1010;
To write multiple bytes of data into IS31FL3737, load
the address of the data register that the first data byte
is intended for. During the IS31FL3737 acknowledge
of receiving the data byte, the internal address pointer
will increment by one. The next data byte sent to
IS31FL3737 will be placed in the new address, and so
on. The auto increment of the address will continue as
long as data continues to be written to IS31FL3737
(Figure 7).
The SCL line is uni-directional. The SDA line is bi-
directional (open-collector) with a pull-up resistor
(typically 1kΩ). The maximum clock frequency
specified by the I2C standard is 1MHz. In this
discussion, the master is the microcontroller and the
slave is the IS31FL3737.
READING OPERATION
FEh, F1h and 18h~47h of page 0 can be read.
The timing diagram for the I2C is shown in Figure 4.
The SDA is latched in on the stable high level of the
SCL. When there is no interface activity, the SDA line
should be held high.
To read the FEh and F1h, after IIC start condition, the
bus master must send the IS31FL3737 device
____
address with the R/W bit set to “0”, followed by the
register address (FEh or F1h) which determines which
register is accessed. Then restart I2C, the bus master
The “START” signal is generated by lowering the SDA
signal while the SCL signal is high. The start signal will
alert all devices attached to the I2C bus to check the
incoming address against their own chip address.
should send the IS31FL3737 device address with the
____
R/W bit set to “1”. Data from the register defined by
the command byte is then sent from the IS31FL3737
to the master (Figure 8).
The 8-bit chip address is sent next, most significant bit
first. Each address bit must be stable while the SCL
level is high.
To read the 18h~47h of page 0, the FDh should write
with 00h before follow the Figure 8 sequence to read
the data, that means, when you want to read 18h~47h
of page 0, the FDh should point to page 0 first and
you can read the page 0 data.
After the last bit of the chip address is sent, the master
checks for the IS31FL3737’s acknowledge. The
master releases the SDA line high (through a pull-up
resistor). Then the master sends an SCL pulse. If the
SDA
tSU,DAT
t
HD,DAT
t
SU,STA
t
HD,STA
t
SU,STO
t
BUF
tLOW
S
t
HIGH
R
P
SCL
tHD,STA
t
R
t
F
Start Condition
Restart Condition
Figure 4 Interface timing
Stop Condition Start Condition
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Rev. A, 07/19/2016
IS31FL3737
SDA
SCL
Data Line Stable
Data Valid
Change of Data
Allowed
Figure 5 Bit transfer
1
2
3
4
5
6
7
8
9
A
1
2
3
4
5
6
7
8
9
A
1
2
3
4
5
6
7
8
9
A
SDA
SCL
A7 A6 A5 A4 A3 A2 A1 A0
A7 A6 A5 A4 A3 A2 A1 A0
D7 D6 D5 D4 D3 D2 D1 D0
P
S
Ack
by
IS31FL3737
Ack
by
IS31FL3737
Ack
by
Stop
by
IS31FL3737 Address Byte
Register Address Byte
Data Byte
IS31FL3737 Master
Figure 6 Writing to IS31FL3737 (Typical)
1
2
3
4
5
6
7
8
9
A
1
2
3
4
5
6
7
8
9
A
1
2
3
4
5
6
7
8
9
A
SDA
SCL
A7 A6 A5 A4 A3 A2 A1 A0
A7 A6 A5 A4 A3 A2 A1 A0
D7 D6 D5 D4 D3 D2 D1 D0
S
Start
by
Master
Ack
by
IS31FL3737
Ack
by
IS31FL3737
Ack
by
IS31FL3737
IS31FL3737 Address Byte
Register Address Byte
Data 1 Byte
9
A
1
2
3
4
5
6
7
8
9
A
1
2
3
4
5
6
7
8
9
A
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
P
Ack
by
IS31FL3737
Ack
by
IS31FL3737
Ack
by
Stop
by
Data (n-1) Byte
Data n Byte
IS31FL3737 Master
Figure 7 Writing to IS31FL3737 (Automatic address increment)
SCL
1
1
2
0
3
1
4
5
6
7
8
1
2
3
4
5
6
7
8
1
1
2
0
3
1
4
5
6
7
8
1
2
3
4
5
6
7
8
Micro Controller
Register Data Byte
Acknowledge From
IS31FL3737
Acknowledge From
IS31FL3737
Acknowledge From
IS31FL3737
No Acknowledge From Master
SDA
S
ADDR
0
A
Register Address Byte
A
P
S
ADDR
1
A
1
P
Port Snapshot
Port Snapshot
R
Port Snapshot
Port Snapshot
W
S = Start Condition
P = Stop Condition
Figure 8 Reading from IS31FL3737
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Rev. A, 07/19/2016
IS31FL3737
REGISTER DEFINITION-1
Address
FDh
Name
Command Register
Function
Table R/W
Default
Available Page 0 to Page 3 Registers
2
3
W
xxxx xxxx
FEh
Command Register Write lock To lock/unlock Command Register
R/W
0000 0000
F0h
F1h
Interrupt Mask Register
Interrupt Status Register
Configure the interrupt function
Show the interrupt status
4
5
W
R
REGISTER CONTROL
Configure
Command Register
(FDh)
Configure
Other Register
(FEh, F0h, F1h)
Select
Response Register
0x00
0x01
0x02
0x03
Page One
LED Control
Register
Page Three
Auto Breath Mode
Register
Page Two
PWM Register
Page Four
Function Register
Configure
Configure
Configure
Configure
Frame Register
Frame Register
Frame Register
Function Register
Configuration Register
(00h)
LED On/Off Register
(00h~17h)
LED Open Register
(18h~2Fh)
LED Short Register
(30h~47h)
Auto Breath Mode Register
(00h~BDh)
PWM Register (00h~BDh)
Reset Register
(11h)
Table 2 FDh Command Register (Write Only)
Data
Function
0000 0000
0000 0001
0000 0010
0000 0011
Others
Point to Page 0 (PG0, LED Control Register is available)
Point to Page 1 (PG1, PWM Register is available)
Point to Page 2 (PG2, Auto Breath Mode Register is available)
Point to Page 3 (PG3, Function Register is available)
Reserved
Note: FDh is locked when power up, need to unlock this register before write command to it. See Table 3 for detail.
The Command Register should be configured first after writing in the slave address to choose the available register. Then write data in the
choosing register. Power up default state is “0000 0000”.
For example, when write “0000 0001” in the Command Register (FDh), the data which writing after will be stored in the Auto breath mode
Register. Write new data can configure other registers.
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Rev. A, 07/19/2016
IS31FL3737
Table 3 FEh Command Register Write Lock
(Read/Write)
Table 5 F1h Interrupt Status Register
Bit
D7:D5
-
D4
D3
D2
D1 D0
Bit
D7:D0
Name
ABM3 ABM2 ABM1 SB OB
Name
CRWL
Default 000
0
0
0
0
0
Default
0000 0000 (FDh write disable)
Show the interrupt status for IC.
To select the PG0~PG3, need to unlock this register
first, with the purpose to avoid misoperation of this
register. When FEh is written with 0xC5, FDh is
allowed to modify once, after the FDh is modified the
FEh will reset to be 0x00 at once.
ABM3 Auto Breath Mode 3 Finish Bit
0
1
ABM3 not finish
ABM3 finish
ABM2 Auto Breath Mode 2 Finish Bit
CRWL Command Register Write Lock
0x00 FDh write disable
0xC5 FDh write enable once
0
1
ABM2 not finish
ABM2 finish
ABM1 Auto Breath Mode 1 Finish Bit
Table 4 F0h Interrupt Mask Register
0
1
ABM1 not finish
ABM1 finish
Bit
D7:D4
D3
D2
D1
D0
Name
-
IAC
0
IAB
0
IS
0
IO
0
SB
0
Short Bit
No short
Default
0000
1
Short happens
Configure the interrupt function for IC.
OB
0
1
Open Bit
No open
Open happens
IAC
0
1
Auto Clear Interrupt Bit
Interrupt could not auto clear
Interrupt auto clear when INTB stay low
exceeds 8ms
IAB
0
1
Auto Breath Interrupt Bit
Disable auto breath loop finish interrupt
Enable auto breath loop finish interrupt
IS
0
1
Dot Short Interrupt Bit
Disable dot short interrupt
Enable dot short interrupt
IO
0
1
Dot Open Interrupt Bit
Disable dot open interrupt
Enable dot open interrupt
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IS31FL3737
REGISTER DEFINITION-2
Address
Name
Function
Table R/W
Default
PG0 (0x00): LED Control Register
00h ~ 17h LED On/Off Register
18h ~ 2Fh LED Open Register
30h ~ 47h LED Short Register
Set on or off state for each LED
Store open state for each LED
Store short state for each LED
7
8
9
W
R
0000 0000
R
PG0 (0x01): PWM Register
00h~BDh PWM Register
Set PWM duty for LED
10
11
W
W
xxxx xxxx
xxxx xx00
PG2 (0x02): Auto Breath Mode Register
00h~BDh Auto Breath Mode Register Set operating mode of each dot
PG3 (0x03) : Function Register
00h
01h
Configuration Register
Configure the operation mode
Set the global current
13
14
W
W
Global Current Control
Register
Auto Breath Control
Register 1 of ABM-1
Set fade in and fade out time for breath
function of ABM-1
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
15
16
17
18
15
16
17
18
15
16
17
W
W
W
W
W
W
W
W
W
W
W
Auto Breath Control
Register 2 of ABM-1
Set the hold and off time for breath
function of ABM-1
Auto Breath Control
Register 3 of ABM-1
Set loop characters of ABM-1
Set loop characters of ABM-1
Auto Breath Control
Register 4 of ABM-1
Auto Breath Control
Register 1 of ABM-2
Set fade in and fade out time for breath
function of ABM-2
Auto Breath Control
Register 2 of ABM-2
Set the hold and off time for breath
function of ABM-2
Auto Breath Control
Register 3 of ABM-2
Set loop characters of ABM-2
Set loop characters of ABM-2
0000 0000
Auto Breath Control
Register 4 of ABM-2
Auto Breath Control
Register 1 of ABM-3
Set fade in and fade out time for breath
function of ABM-3
Auto Breath Control
Register 2 of ABM-3
Set the hold and off time for breath
function of ABM-3
Auto Breath Control
Register 3 of ABM-3
Set loop characters of ABM-3
Auto Breath Control
Register 4 of ABM-3
0Dh
0Eh
0Fh
Set loop characters of ABM-3
18
-
W
W
W
Time Update Register
Update the setting of 02h ~ 0Dh registers
Set the pull-up resistor for SWy
SWy Pull-Up Resistor
Selection Register
19
CSx Pull-Down Resistor
Selection Register
10h
11h
Set the pull-down resistor for CSx
Reset all register to POR state
20
-
W
R
Reset Register
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IS31FL3737
Table 6 Page 0 (PG0, 0x00): LED Control Register
LED Location
SW1(CS1~ CS6)
LED On/Off Register
LED Open Register LED Short Register
SW1(CS7~ CS12)
SW2(CS7~ CS12)
SW3(CS7~ CS12)
SW4(CS7~ CS12)
SW5(CS7~ CS12)
SW6(CS7~ CS12)
SW7(CS7~ CS12)
SW8(CS7~ CS12)
SW9(CS7~ CS12)
00h
02h
04h
06h
08h
0Ah
0Ch
0Eh
10h
12h
14h
16h
01h
03h
05h
07h
09h
0Bh
0Dh
0Fh
11h
13h
15h
17h
18h
1Ah
1Ch
1Eh
20h
22h
24h
26h
28h
2Ah
2Ch
2Eh
19h
1Bh
1Dh
1Fh
21h
23h
25h
27h
29h
2Bh
2Dh
2Fh
30h
32h
34h
36h
38h
3Ah
3Ch
3Eh
40h
42h
44h
46h
31h
33h
35h
37h
39h
3Bh
3Dh
3Fh
41h
43h
45h
47h
SW2(CS1~ CS6)
SW3(CS1~ CS6)
SW4(CS1~ CS6)
SW5(CS1~ CS6)
SW6(CS1~ CS6)
SW7(CS1~ CS6)
SW8(CS1~ CS6)
SW9(CS1~ CS6)
SW10(CS1~ CS6) SW10(CS7~ CS12)
SW11(CS1~ CS6) SW11(CS7~ CS12)
SW12(CS1~ CS6) SW12(CS7~ CS12)
Table 7 00h ~ 17h LED On/Off Register
Table 9 30h ~ 47h LED Short Register
Bit
D7:D6
D5:D0
Bit
D7:D6
D5:D0
Name
-
CCS6 : CCS1 or CCS12 : CCS7
00 0000
Name
-
ST6 : ST1 or ST12 : ST7
0000 0000
Default
00
Default
00
The LED On/Off Registers store the on or off state of
each LED in the Matrix.
The LED Short Registers store the short or normal
state of each LED in the Matrix.
CX-Y
0
1
LED State Bit
LED off
LED on
STx
0
1
LED Short Bit
LED normal
LED short
Table 8 18h ~ 2Fh LED Open Register
Bit
D7:D6
D5:D0
Name
-
OP6 : OP1 or OP12 : OP7
00 0000
Default
00
The LED Open Registers store the open or normal
state of each LED in the Matrix.
OPx
0
1
LED Open Bit
LED normal
LED open
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IS31FL3737
Page 1 (PG1, 0x01): PWM Register
PVCC
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
CS1 CS2 CS3 CS4 CS5 CS6 CS7 CS8 CS9
CS10 CS11 CS12
SW12
SW11
SW10
SW9
SW8
SW7
SW6
SW5
SW4
SW3
SW2
SW1
B0 B1 B2 B3 B4 B5 B8 B9 BA BB BC BD
A0 A1 A2 A3 A4 A5 A8 A9 AA AB AC AD
90 91 92 93 94 95 98 99 9A 9B 9C 9D
80 81 82 83 84 85 88 89 8A 8B 8C 8D
70 71 72 73 74 75 78 79 7A 7B 7C 7D
60 61 62 63 64 65 68 69 6A 6B 6C 6D
50 51 52 53 54 55 58 59 5A 5B 5C 5D
40 41 42 43 44 45 48 49 4A 4B 4C 4D
30 31 32 33 34 35 38 39 3A 3B 3C 3D
20 21 22 23 24 25 28 29 2A 2B 2C 2D
L
K
J
T12
T11
T10
T09
T08
T07
T06
T05
T04
T03
T02
T01
I
H
G
F
E
D
C
B
A
10 11 12 13 14 15
18 19 1A 1B 1C 1D
00 01 02 03 04 05 08 09 0A 0B 0C 0D
10 11 12
1
2
3
4
5
6
7
8
9
Figure 9 PWM Register
Table 10 00h ~ BDh PWM Register
Where Duty is the duty cycle of SWy,
128s
128s 8s
1
1
Bit
D7:D0
Duty
(2)
12 12.75
Name
PWM
IOUT is the output current of CSx (x=1~12),
Default
xxxx xxxx
840 GCC
Each dot has a byte to modulate the PWM duty in
256 steps.
IOUT
(3)
REXT
256
The value of the PWM Registers decides the
GCC is the Global Current Control register (PG3,
01h) value and REXT is the external resistor of RSET
pin. D[n] stands for the individual bit value, 1 or 0, in
location n.
average current of each LED noted ILED
.
ILED computed by Formula (1):
PWM
256
ILED
IOUT Duty
(1)
For example: if D7:D0 = 1011 0101 (0xB5, 181),
GCC=255. REXT=20kΩ (IOUT=42mA),
7
20 22 24 25 27
1
PWM
D[n] 2n
ILED
IOUT
2.34mA
256
12.75
n0
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IS31FL3737
Page 2 (PG2, 0x02): Auto Breath Mode Register
PVCC
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
CS1 CS2 CS3 CS4 CS5 CS6 CS7 CS8 CS9
CS10 CS11 CS12
SW12
SW11
SW10
SW9
SW8
SW7
SW6
SW5
SW4
SW3
SW2
SW1
B0 B1 B2 B3 B4 B5 B8 B9 BA BB BC BD
A0 A1 A2 A3 A4 A5 A8 A9 AA AB AC AD
90 91 92 93 94 95 98 99 9A 9B 9C 9D
80 81 82 83 84 85 88 89 8A 8B 8C 8D
70 71 72 73 74 75 78 79 7A 7B 7C 7D
60 61 62 63 64 65 68 69 6A 6B 6C 6D
50 51 52 53 54 55 58 59 5A 5B 5C 5D
40 41 42 43 44 45 48 49 4A 4B 4C 4D
30 31 32 33 34 35 38 39 3A 3B 3C 3D
20 21 22 23 24 25 28 29 2A 2B 2C 2D
L
K
J
T12
T11
T10
T09
T08
T07
T06
T05
T04
T03
T02
T01
I
H
G
F
E
D
C
B
A
10 11 12 13 14 15
18 19 1A 1B 1C 1D
00 01 02 03 04 05 08 09 0A 0B 0C 0D
10 11 12
1
2
3
4
5
6
7
8
9
Figure 10 Auto Breath Mode Selection Register
Table 11 00h ~ BDh Auto Breath Mode Register
Bit
D7:D2
D1:D0
Name
-
-
ABMS
00
Default
The Auto Breath Mode Register sets operating mode
of each dot.
ABMS Auto Breath Mode Selection Bit
00
01
10
11
PWM control mode
Select Auto Breath Mode 1 (ABM-1)
Select Auto Breath Mode 2 (ABM-2)
Select Auto Breath Mode 3 (ABM-3)
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IS31FL3737
Table 12 Page 3 (PG3, 0x03): Function Register
Register
00h
Name
Function
R/W
W
Default
Configuration Register
Configure the operation mode
Global Current Control
Register
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
Set the global current
W
W
W
W
W
W
W
W
W
W
W
W
Auto Breath Control
Register 1 of ABM-1
Set fade in and fade out time for breath function
of ABM-1
Auto Breath Control
Register 2 of ABM-1
Set the hold and off time for breath function of
ABM-1
Auto Breath Control
Register 3 of ABM-1
Set loop characters of ABM-1
Set loop characters of ABM-1
Auto Breath Control
Register 4 of ABM-1
Auto Breath Control
Register 1 of ABM-2
Set fade in and fade out time for breath function
of ABM-2
Auto Breath Control
Register 2 of ABM-2
Set the hold and off time for breath function of
ABM-2
Auto Breath Control
Register 3 of ABM-2
Set loop characters of ABM-2
Set loop characters of ABM-2
0000
0000
Auto Breath Control
Register 4 of ABM-2
Auto Breath Control
Register 1 of ABM-3
Set fade in and fade out time for breath function
of ABM-3
Auto Breath Control
Register 2 of ABM-3
Set the hold and off time for breath function of
ABM-3
Auto Breath Control
Register 3 of ABM-3
Set loop characters of ABM-3
Auto Breath Control
Register 4 of ABM-3
0Dh
0Eh
0Fh
Set loop characters of ABM-3
W
W
W
Time Update Register
Update the setting of 02h ~ 0Dh registers
Set the pull-up resistor for SWy
SWy Pull-Up Resistor
Selection Register
CSx Pull-Down Resistor
Selection Register
10h
11h
Set the pull-down resistor for CSx
Reset all register to POR state
W
R
Reset Register
Table 13 00h Configuration Register
When OSD set high, open/short detection will be
trigger once, the user could trigger OS detection
again by set OSD from 0 to 1.
Bit
Name SYNC
Default 00
D7:D6 D5:D3
D2
D1
D0
When B_EN enable, those dots select working in
ABM-x mode will start to run the pre-established
timing. If it is disabled, all dots work in PWM mode.
Following Figure 16 to enable the Auto Breath mode
-
OSD
0
B_EN
0
SSD
0
000
The Configuration Register sets operating mode of
IS31FL3737.
When SSD is '0', IS31FL3737 works in software
shutdown mode and to normal operate the SSD bit
should set to '1'.
When SYNC bits are set to '01', the IS31FL3737 is
configured as the master clock source and the
SYNC pin will generate a clock signal distributed to
the clock slave devices. To be configured as a clock
slave device and accept an external clock input the
slave device’s SYNC bits must be set to ‘10’.
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Rev. A, 07/19/2016
IS31FL3737
SYNC Synchronize Configuration
00/11 High Impedance
100
101
110
111
3.36s
6.72s
13.44s
26.88s
01
10
Master
Slave
OSD Open/Short Detection Enable Bit
T2
T2 Setting
0
1
Disable open/short detection
Enable open/short detection
0000 0s
0001 0.21s
0010 0.42s
0011 0.84s
0100 1.68s
0101 3.36s
0110 6.72s
B_EN Auto Breath Enable
0
1
PWM Mode Enable
Auto Breath Mode Enable
SSD
0
1
Software Shutdown Control
Software shutdown
Normal operation
0111
1000
Others Unavailable
13.44s
26.88s
Table 14 01h Global Current Control Register
Table 16 03h, 07h, 0Bh Auto Breath Control
Register 2 of ABM-x
Bit
D7:D0
Bit
D7:D5
D4:D1
D0
Name
GCCx
Name
T3
T4
-
Default
0000 0000
Default
000
0000
0
The Global Current Control Register modulates all
CSx (x=1~12) DC current which is noted as IOUT in
256 steps.
Auto Breath Control Register 2 set the T3&T4 time in
Auto Breath Mode.
IOUT is computed by the Formula (3):
T3
T3 Setting
0.21s
0.42s
0.84s
1.68s
3.36s
6.72s
13.44s
26.88s
840 GCC
IOUT
(3)
000
001
010
011
100
101
110
111
REXT
256
7
GCC
D[n] 2n
n0
Where D[n] stands for the individual bit value, 1 or 0,
in location n, REXT is the external resistor of RSET pin.
For example: if D7:D0 = 1011 0101,
20 22 24 25 27 840
T4
0000 0s
T4 Setting
IOUT
256
REXT
0001 0.21s
0010 0.42s
0011 0.84s
0100 1.68s
0101 3.36s
0110 6.72s
Table 15 02h, 06h, 0Ah Auto Breath Control
Register 1 of ABM-x
Bit
D7:D5
D4:D1
D0
Name
T1
T2
-
0111
1000 26.88s
1001 53.76s
1010 107.52s
Others Unavailable
13.44s
Default
000
0000
0
Auto Breath Control Register 1 set the T1&T2 time in
Auto Breath Mode.
T1
T1 Setting
0.21s
0.42s
0.84s
1.68s
000
001
010
011
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Rev. A, 07/19/2016
IS31FL3737
Table 17 04h, 08h, 0Ch Auto Breath Control
Register 3 of ABM-x
Table 18 05h, 09h, 0Dh Auto Breath Control
Register 4 of ABM-x
Bit
D7:D6
D5:D4
D3:D0
Bit
D7:D0
Name
LE
00
LB
00
LTA
Name
LTB
Default
0000
Default
0000 0000
Total loop times= LTA ×256 + LTB.
Total loop times= LTA ×256 + LTB.
For example, if LTA=2, LTB=100, the total loop times
For example, if LTA=2, LTB=100, the total loop times
is 256×2+100= 612 times.
is 256×2+100= 612 times.
For the counting of breathing times, do follow Figure
16 to enable the Auto Breath Mode.
LTB
0-7 Bits Of Loop Times
If the loop start from T4,
0000 0000
0000 0001
0000 0010
…
Endless loop
1
2
…
255
T4->T1->T2->T3(1)->T4->T1->T2->T3(2)->T4->T1-
>... and so on.
If the loop not start from T4,
1111 1111
Tx->T3(1) ->T4->T1->T2->T3(2)->T4-> T1->... and
so on.
0Eh Time Update Register (02h~0Dh)
If the loop ends at off state (End of T3), the LED will
be off state at last. If the loop ends at on state (End
of T1), the LED will run an extra T4&T1, which are
not included in loop.
The data sent to the time registers (02h~0Dh) will be
stored in temporary registers. A write operation of
“0000 0000” data to the Time Update Register is
required to update the registers (02h~0Dh). Please
follow Figure 16 to enable the Auto Breath mode and
update the time parameters.
LB
00
01
10
11
Loop Beginning Time
Loop begin from T1
Loop begin from T2
Loop begin from T3
Loop begin from T4
Table 19 0Fh SWy Pull-Up Resistor Selection
Register
Bit
D7:D3
D2:D0
LE
00
01
Loop End Time
Loop end at off state (End of T3)
Loop end at on state (End of T1)
Name
-
PUR
000
Default
00000
Set pull-up resistor for SWy.
LTA
8-11 Bits Of Loop Times
0000 Endless loop
PUR
000
001
010
011
100
101
110
111
SWy Pull-up Resistor Selection Bit
No pull-up resistor
0.5kΩ
1.0kΩ
2.0kΩ
4.0kΩ
8.0kΩ
16kΩ
32kΩ
0001
0010
…
1
2
…
15
1111
T1
T2
T3
T4
T1
1 Loop
Table 20 10h CSx Pull-Down Resistor Selection
Register
Figure 11 Auto Breathing Function
Bit
D7:D3
D2:D0
Name
-
PDR
000
Default
00000
Set the pull-down resistor for CSx.
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Rev. A, 07/19/2016
IS31FL3737
PDR
000
001
010
011
100
101
110
111
CSx Pull-down Resistor Selection Bit
No pull-down resistor
0.5kΩ
1.0kΩ
2.0kΩ
4.0kΩ
8.0kΩ
16kΩ
32kΩ
11h Reset Register
Once user read the Reset Register, IS31FL3737 will
reset all the IS31FL3737 registers to their default
value. On initial power-up, the IS31FL3737 registers
are reset to their default values for a blank display.
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Rev. A, 07/19/2016
IS31FL3737
APPLICATION INFORMATION
SW1
SW2
SW3
SW4
SW5
SW6
SW7
SW8
SW9
SW10
SW11
SW12
CS1
00h
10h
20h
30h
40h
50h
60h
70h
80h
90h
A0h
B0h
00h
CS12
0Dh
1Dh
2Dh
3Dh
4Dh
5Dh
6Dh
7Dh
8Dh
9Dh
ADh
BDh
0Dh
tSCAN=128µs
tNOL=8µs
Scanning cycle T=1.632ms((128+8)×12)
De-Ghost time
I
OUT=840/REXT×GCC/256
PWM Duty is variable from 0/256~255/256
Figure 12 Scanning Timing
(GCC=0~255)
PWM CONTROL
SCANING TIMING
After setting the IOUT and GCC, the brightness of each
LEDs (LED average current (ILED)) can be modulated
with 256 steps by PWM Register, as described in
Formula (1).
As shown in Figure 12, the SW1~SW12 is turned on
by serial, LED is driven 12 by 12 within the SWy
(x=1~12) on time (SWy, y=1~12) is sink and pull low
when LED on) , including the non-overlap blanking
time during scan, the duty cycle of SWy (active low,
y=1~12) is:
PWM
256
ILED
IOUT Duty
(1)
128s
128s 8s
1
1
Where PWM is PWM Registers (PG1, 00h~BDh) data
showing in Table 10.
Duty
(2)
12 12.75
For example, in Figure 1, REXT = 20kΩ, if PWM=255,
and GCC=255, then
Where 128μs is tSCAN, the period of scanning and 8μs
is tNOL, the non-overlap time.
EXTERNAL RESISTOR (REXT
)
255 840 255
1
ILED
3.29mA
The output current for each CSx can be can be set by
a single external resistor, REXT, as described in
Formula (3).
256 20k 256 12.75
Writing new data continuously to the registers can
modulate the brightness of the LEDs to achieve a
breathing effect.
840 GCC
IOUT
(3)
LED AVERAGE CURRENT (ILED
)
REXT
256
As described in Formula (1), the LED average current
(ILED) is effected by 3 factors:
GCC is Global Current Control Register (PG3, 01h)
data showing in Table 14.
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Rev. A, 07/19/2016
IS31FL3737
1. REXT, resistor which is connected RSET pin and
GND. REXT sets the current of all CSx(x=1~12) based
on Formula (3).
configuration is defined by the breath cycle T. When
T=1s, choose 32 gamma steps, when T=2s, choose
64 gamma steps. The user must decide the final
number of gamma steps not only by the LED itself,
but also based on the visual performance of the
finished product.
2. Global Current Control Register (PG3, 01h). This
register adjusts all CSx (x=1~12) output currents by
256 steps as shown in Formula (3).
Table 22 64 Gamma Steps with 256 PWM Steps
3. PWM Registers (PG1, 00h~BFh), every LED has an
own PWM register. PWM Registers adjust individual
LED average current by 256 steps as shown in
Formula (1).
C(0)
0
C(1)
1
C(2)
2
C(3)
3
C(4)
4
C(5)
5
C(6)
6
C(7)
7
C(8)
8
C(9)
10
C(10) C(11) C(12) C(13) C(14) C(15)
12 14 16 18 20 22
GAMMA CORRECTION
C(16) C(17) C(18) C(19) C(20) C(21) C(22) C(23)
24 26 29 32 35 38 41 44
C(24) C(25) C(26) C(27) C(28) C(29) C(30) C(31)
47 50 53 57 61 65 69 73
C(32) C(33) C(34) C(35) C(36) C(37) C(38) C(39)
77 81 85 89 94 99 104 109
C(40) C(41) C(42) C(43) C(44) C(45) C(46) C(47)
114 119 124 129 134 140 146 152
C(48) C(49) C(50) C(51) C(52) C(53) C(54) C(55)
158 164 170 176 182 188 195 202
C(56) C(57) C(58) C(59) C(60) C(61) C(62) C(63)
In order to perform a better visual LED breathing effect
we recommend using a gamma corrected PWM value
to set the LED intensity. This results in a reduced
number of steps for the LED intensity setting, but
causes the change in intensity to appear more linear to
the human eye.
Gamma correction, also known as gamma
compression or encoding, is used to encode linear
luminance to match the non-linear characteristics of
display. Since the IS31FL3737 can modulate the
brightness of the LEDs with 256 steps, a gamma
correction function can be applied when computing
each subsequent LED intensity setting such that the
changes in brightness matches the human eye's
brightness curve.
209
216
223
230
237
244
251
255
256
224
192
160
128
96
Table 21 32 Gamma Steps with 256 PWM Steps
C(0)
0
C(1)
1
C(2)
2
C(3)
4
C(4)
6
C(5)
10
C(6)
13
C(7)
18
C(8)
22
C(9)
28
C(10) C(11) C(12) C(13) C(14) C(15)
33 39 46 53 61 69
C(16) C(17) C(18) C(19) C(20) C(21) C(22) C(23)
78 86 96 106 116 126 138 149
C(24) C(25) C(26) C(27) C(28) C(29) C(30) C(31)
64
32
161
173
186
199
212
226
240
255
0
0
8
16
24
32
40
48
56
64
256
Intensity Steps
Figure 14 Gamma Correction (64 Steps)
224
192
160
128
96
Note: The data of 32 gamma steps is the standard value and the
data of 64 gamma steps is the recommended value.
OPERATING MODE
Each dot of IS31FL3737 has two selectable operating
modes, PWM Mode and Auto Breath Mode.
64
PWM Mode
32
By setting the Auto Breath Mode Register bits of the
Page 2 (PG2, 00h~BFh) to “00”, or disable the B_EN
bit of Configure Register (PG3, 00h), the IS31FL3737
operates in PWM Mode. The brightness of each LED
can be modulated with 256 steps by PWM registers.
For example, if the data in PWM Register is “0000
0100”, then the PWM is the fourth step.
0
0
4
8
12
16
20
24
28
32
Intensity Steps
Figure 13 Gamma Correction (32 Steps)
Choosing more gamma steps provides for a more
continuous looking breathing effect. This is useful for
very long breathing cycles. The recommended
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IS31FL3737
Writing new data continuously to the registers can
modulate the brightness of the LEDs to achieve a
breathing effect.
By setting the OSD bit of the Configuration Register
(PG3, 00h) from "0" to “1”, the LED Open Register
and LED Short Register will start to store the
open/short information and after at least 2 scanning
cycle (3.264ms) the MCU can get the open/short
information by reading the 18h~2fh/30h~47h, for
those dots are turned off via LED On/Off Registers
(PG0, 00h~17h), the open/short data will not get
refreshed when setting the OSD bit of the
Auto Breath Mode
By setting the B_EN bit of the Configuration Register
(PG3, 00h) to “1”, breath function enables. When set
the B_EN bit to “0”, breath function disables.
By setting the Auto Breath Mode Register bits of the
Page 2 (PG2, 00h~BFh) to “01” (ABM-1), “10” (ABM-2)
or “11” (ABM-3), the IS31FL3737 operates in Auto
Breath Mode.
Configuration Register (PG3, 00h) from "0" to “1”.
The Global Current Control Register (PG3, 01h) need
to set to 0x01 in order to get the right open/short data.
IS31FL3737 has three auto breath modes, Auto Breath
Mode 1, Auto Breath Mode 2 and Auto Breath Mode 3.
Each ABM has T1, T2, T3 and T4, as shown below:
The detect action is one-off event and each time
before reading out the open/short information, the
OSD bit of the Configuration Register (PG3, 00h)
need to be set from "0" to “1” (clear before set
operation).
INTERRUPT CONTROL
IS31FL3737 has an INTB pin, by setting the Interrupt
Mask Register (F0h), it can be the flag of LED open,
LED short or the finish flag of ABM-1, ABM-2, and
ABM-3.
T1
T2
T3
T4
T1
1 Loop
Figure 15 Auto Breathing Function
For example, if the IO bit of the Interrupt Mask
Register (F0h) set to “1”, when LED open happens,
the INTB will pull be pulled low and the OB bit of
Interrupt Status Register (F1h) will store open status
at the same time.
T1/T3 is variable from 0.21s to 26.88s, T2/T4 is
variable from 0s to 26.88s, for each loop, the start
point can be T1~T4 and the stop point can be on state
(T2) and off state (T4), also the loop time can be set to
1~212 times or endless. Each LED can select ABM-
1~ABM-3 to work.
The INTB pin will be pulled high after reading the
Interrupt Status Register (F1h) operation or it will be
pulled high automatically after it stays low for 8ms
(Typ.) if the IAC bit of Interrupt Mask Register (F0h) is
set to “1”. The bits of Interrupt Status Register (F1h)
will be reset to “0” after INTB pin pulled high.
The setting of ABM-1~ABM-3 (PG2, 02h~0Dh) need to
write the 0Eh in PG3 to update before effective.
Write 02h~0Dh (PG3)
SYNCHRONIZE FUNCTION
SYNC bits of the Configuration Register (PG3, 00h)
sets SYNC pin input or output synchronize clock
signal. It is used for more than one part working
synchronize. When SYNC bits are set to “01”, SYNC
pin output synchronize clock to synchronize other
parts as master. When SYNC bits are set to “10”,
SYNC pin input synchronize clock and work
synchronization with this input signal as slave. When
SYNC bits are set to “00/11”, SYNC pin is high
impedance, and synchronize function is disabled.
SYNC bit default state is “00” and SYNC pin is high
impedance when power up.
Clear B_EN
(00h & 0B11111101)
Enable B_EN
(00h | 0B00000010)
Write “0000 0000” to
0Eh (PG3) to update
02h~0Dh (PG3)
DE-GHOST FUNCTION
Figure 16 Enable Auto Breath mode
The ‘ghost’ term is used to describe the behavior of
an LED that should be OFF but instead glows dimly
when another LED is turned ON. A ghosting effect
typically can occur when multiplexing LEDs. In matrix
architecture any parasitic capacitance found in the
constant-current outputs or the PCB traces to the
LEDs may provide sufficient current to dimly light an
LED to create a ghosting effect.
If not follow this flow, first loop’s start point may be
wrong
OPEN/SHORT DETECT FUNCTION
IS31FL3737 has open and short detect bit for each
LED.
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IS31FL3737
To prevent this LED ghost effect, the IS31FL3737 has
integrated pull-up resistors for each SWy (y=1~12) and
pull-down resistors for each CSx (x=1~12). Select the
right SWy pull-up resistor (PG3, 0Fh) and CSx pull-
down resistor (PG3, 10h) which eliminates the ghost
LED for a particular matrix layout configuration.
When operating the chip at high ambient
temperatures, or when driving maximum load current,
care must be taken to avoid exceeding the package
power dissipation limits. The maximum power
dissipation can be calculated using the following
Equation (5):
Typically, selecting the 32kΩ will be sufficient to
eliminate the LED ghost phenomenon.
125C 25C
(5)
PD(MAX )
RJA
The SWy pull-up resistors and CSx pull-down resistors
are active only when the CSx/SWy outputs are in the
OFF state and therefore no power is lost through these
resistors
125C 25C
24.96C /W
So,
PD(MAX )
4W
IIC RESET
Figure 17 shows the power derating of the
IS31FL3737 on a JEDEC boards (in accordance with
JESD 51-5 and JESD 51-7) standing in still air.
The IIC will be reset if the IICRST pin is pull-high,
when normal operating the IIC bus, the IICRST pin
need to keep low.
5
QFN-40
SHUTDOWN MODE
4
3
2
Shutdown mode can be used as a means of reducing
power consumption. During shutdown mode all
registers retain their data.
Software Shutdown
By setting SSD bit of the Configuration Register (PG3,
00h) to “0”, the IS31FL3737 will operate in software
shutdown mode. When the IS31FL3737 is in software
shutdown, all current sources are switched off, so that
the matrix is blanked. All registers can be operated.
Typical current consume is 3μA.
1
0
-40 -25 -10
5
20
35
50
65
80
95 110 125
Hardware Shutdown
Temperature (°C)
The chip enters hardware shutdown when the SDB pin
is pulled low. All analog circuits are disabled during
hardware shutdown, typical the current consume is
3μA.
Figure 17 Dissipation Curve
LAYOUT
As described in external resistor (REXT), the chip
consumes lots of power. Please consider below
factors when layout the PCB.
The chip releases hardware shutdown when the SDB
pin is pulled high. During hardware shutdown state
Function Register can be operated.
1. The VCC (PVCC, DVCC, AVCC, VIO) capacitors
need to close to the chip and the ground side should
well connected to the GND of the chip.
If VCC has risk drop below 1.75V but above 0.1V during
SDB pulled low, please re-initialize all Function
Registers before SDB pulled high.
2. REXT should be close to the chip and the ground
side should well connect to the GND of the chip.
POWER DISSIPATION
The power dissipation of the IS31FL3737 can
calculate as below:
3. The thermal pad should connect to ground pins and
the PCB should have the thermal pad too, usually this
pad should have 16 or 25 via thru the PCB to other
side’s ground area to help radiate the heat. About the
thermal pad size, please refer to the land pattern of
each package.
P3737=IPVCC×PVCC+ IQ×DVCC(AVCC) - IPVCC×VF(AVR) (4)
≈IPVCC×PVCC - IPVCC×V F(AVR)
≈IPVCC×(PVCC - VF(AVR)
)
4. The CSx pins maximum current is 42mA
(REXT=20kΩ), and the SWy pins maximum current is
672mA (REXT=20kΩ), the width of the trace, SWy
should have wider trace then CSx.
Where IPVCC is the current of PVCC and VF(AVR) is the
average forward of all the LED.
For example, if REXT=20kΩ, GCC=255, PWM=255,
PVCC=5V, VF(AVR)=3.5V@42mA, then the
IPVCC=42mA×12×12/12.75=474.4mA.
5. In the middle of SDA and SCL trace, a ground line
is recommended to avoid the effect between these
two lines.
P3737=474.4mA ×(5V-3.5V)=0.806W
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IS31FL3737
CLASSIFICATION REFLOW PROFILES
Profile Feature
Pb-Free Assembly
Preheat & Soak
150°C
200°C
60-120 seconds
Temperature min (Tsmin)
Temperature max (Tsmax)
Time (Tsmin to Tsmax) (ts)
Average ramp-up rate (Tsmax to Tp)
3°C/second max.
Liquidous temperature (TL)
Time at liquidous (tL)
217°C
60-150 seconds
Peak package body temperature (Tp)*
Max 260°C
Time (tp)** within 5°C of the specified
classification temperature (Tc)
Max 30 seconds
Average ramp-down rate (Tp to Tsmax)
Time 25°C to peak temperature
6°C/second max.
8 minutes max.
Figure 18 Classification Profile
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Rev. A, 07/19/2016
IS31FL3737
PACKAGE INFORMATION
QFN-40
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Rev. A, 07/19/2016
IS31FL3737
RECOMMENDED LAND PATTERN
0.4
0.2
0.8
5.0
3.8
Note:
1. Land pattern complies to IPC-7351.
2. All dimensions in MM.
3. This document (including dimensions, notes & specs) is a recommendation based on typical circuit board manufacturing parameters. Since
land pattern design depends on many factors unknown (eg. user’s board manufacturing specs), user must determine suitability for use.
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Rev. A, 07/19/2016
IS31FL3737
REVISION HISTORY
Revision
Detail Information
Date
0A
0B
A
Initial release
1 Update Figure 1, 2
2 Correct a spell mistake in page 1
3 update the IOUT / ILED limitation
2016.05.09
2016.06.28
2016.07.19
Update I2C READING OPERATIOON section and Figure 8
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