MDP1723TH [MGCHIP]
Single N-channel Trench MOSFET 40V, 120A, 2.3m(ohm);
| 型号： | MDP1723TH |
| 厂家： | 
MagnaChip |
| 描述： | Single N-channel Trench MOSFET 40V, 120A, 2.3m(ohm) |
| 文件： | 总6页 (文件大小：1151K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MDP1723
Single N-channel Trench MOSFET 40V, 120A, 2.3mΩ
General Description
Features
The MDP1723 uses advanced MagnaChip’s MOSFET
Technology, which provides high performance in on-state
resistance, fast switching performance and excellent
quality. MDP1723 is suitable device for Synchronous
Rectification For Server and general purpose applications.
VDS = 40V
ID = 120A @VGS = 10V
RDS(ON)
< 2.3 mΩ @VGS = 10V
100% UIL Tested
100% Rg Tested
D
G
TO-220
S
Absolute Maximum Ratings (Ta = 25oC)
Characteristics
Drain-Source Voltage
Symbol
Rating
40
Unit
V
VDSS
VGSS
Gate-Source Voltage
±20
V
TC=25oC (Silicon Limited)
191
TC=25oC (Package Limited)
TC=100oC
120
Continuous Drain Current (1)
ID
A
120
Pulsed Drain Current
IDM
480
TC=25oC
138.9
55.6
162.0
-55~150
Power Dissipation
PD
W
TC=100oC
Single Pulse Avalanche Energy (2)
EAS
mJ
oC
Junction and Storage Temperature Range
TJ, Tstg
Thermal Characteristics
Characteristics
Thermal Resistance, Junction-to-Ambient (1)
Thermal Resistance, Junction-to-Case
Symbol
RθJA
Rating
50.0
Unit
oC/W
RθJC
0.9
1
Oct. 2014. Version 1.0
MagnaChip Semiconductor Ltd.
Ordering Information
Part Number
Temp. Range
Package
Packing
RoHS Status
MDP1723TH
-55~150oC
TO-220
Tube
Halogen Free
Electrical Characteristics (TJ =25oC)
Characteristics
Static Characteristics
Symbol
Test Condition
Min
Typ
Max
Unit
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Drain Cut-Off Current
BVDSS
VGS(th)
IDSS
ID = 250μA, VGS = 0V
VDS = VGS, ID = 250μA
VDS = 32V, VGS = 0V
VGS = ±20V, VDS = 0V
VGS = 10V, ID = 50A
VDS = 10V, ID = 50A
40
-
-
-
V
2.0
4.0
1.0
±0.1
2.3
-
-
-
-
-
-
μA
Gate Leakage Current
IGSS
-
Drain-Source ON Resistance
Forward Transconductance
Dynamic Characteristics
Total Gate Charge
RDS(ON)
gfs
1.9
111
mΩ
S
Qg
Qgs
Qgd
Ciss
Crss
Coss
td(on)
tr
-
-
-
-
-
-
-
-
-
-
-
88.3
22.9
-
-
-
-
-
-
-
-
-
-
-
VDS = 20V, ID = 50A,
VGS = 10V
Gate-Source Charge
nC
pF
Gate-Drain Charge
16.5
Input Capacitance
5755.0
203.3
1830.0
24.3
VDS = 20V, VGS = 0V,
f = 1.0MHz
Reverse Transfer Capacitance
Output Capacitance
Turn-On Delay Time
Rise Time
14.7
VGS = 10V, VDS =20V,
ID = 50A , RG = 3.0Ω
ns
Turn-Off Delay Time
td(off)
tf
84.8
Fall Time
42.7
Gate Resistance
Rg
f=1 MHz
3.0
Ω
Drain-Source Body Diode Characteristics
Source-Drain Diode Forward Voltage
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
VSD
trr
IS = 50A, VGS = 0V
-
-
-
0.9
1.2
V
55.7
82.0
ns
nC
IF = 50A, dl/dt = 100A/μs
Qrr
Note :
1. Surface mounted FR-4 board by JEDEC (jesd51-7). Continuous current at TC=25℃ is silicon limited
2. EAS is tested at starting Tj = 25℃, L = 1.0mH, IAS = 18.0A, VGS = 10V.
2
Oct. 2014. Version 1.0
MagnaChip Semiconductor Ltd.
4
3
2
1
0
10 V
5.0 V
90
80
70
60
50
40
30
20
10
0
6.0 V
4.5 V
VGS = 10V
4.0 V
3.5 V
0
10
20
30
40
50
60
70
80
90
100
110
0
1
2
3
4
5
ID, Drain Current [A]
VDS, Drain-Source Voltage [V]
Fig.2 On-Resistance Variation with
Drain Current and Gate Voltage
Fig.1 On-Region Characteristics
2.5
2.0
1.5
1.0
0.5
0.0
20
18
16
14
12
10
8
※ Notes :
1. VGS = 10 V
2. ID = 50 A
※ Notes :
ID = 50A
6
TA = 25
℃
4
2
0
4
5
6
7
8
9
10
-50
-25
0
25
50
75
100
125
150
VGS, Gate to Source Volatge [V]
TJ, Junction Temperature [oC]
Fig.3 On-Resistance Variation with
Temperature
Fig.4 On-Resistance Variation with
Gate to Source Voltage
※ Notes :
VGS = 0V
90
80
70
60
50
40
30
20
10
0
* Notes :
VDS = 10V
100
10
1
TA=25oC
TA=25
℃
0
1
2
3
4
5
6
7
8
0.0
0.3
0.6
0.9
1.2
1.5
VSD, Source-Drain voltage [V]
VGS, Gate-Source Voltage [V]
Fig.5 Transfer Characteristics
Fig.6 Body Diode Forward Voltage
Variation with Source Current and
Temperature
3
Oct. 2014. Version 1.0
MagnaChip Semiconductor Ltd.
10
8
9000
8000
7000
6000
5000
4000
3000
2000
1000
0
※ Note : ID = 50A
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
VDS = 50V
Crss = Cgd
Ciss
6
Coss
4
※ Notes ;
1. VGS = 0 V
2. f = 1 MHz
2
Crss
0
0
5
10
15
20
25
30
35
40
0
10
20
30
40
50
60
70
80
90
100
QG, Total Gate Charge [nC]
VDS, Drain-Source Voltage [V]
Fig.7 Gate Charge Characteristics
Fig.8 Capacitance Characteristics
200
180
160
140
120
100
80
103
102
101
100
10-1
100 us
Package Limited
1 ms
Operation in This Area
is Limited by R DS(on)
10 ms
100 ms
DC
60
40
Single Pulse
TJ=Max rated
TC=25oC
20
0
25
10-1
100
101
102
50
75
100
125
150
TC, Case Temperature [ ]
℃
VDS, Drain-Source Voltage [V]
Fig.10 Maximum Drain Current vs.
Case Temperature
Fig.9 Maximum Safe Operating Area
100
10-1
10-2
10-3
10-4
10-5
D=0.5
0.2
0.1
0.05
0.02
0.01
※ Notes :
Duty Factor, D=t1/t2
PEAK TJ = PDM * Zθ JC* Rθ (t) + TC
single pulse
JC
10-5
10-4
10-3
10-2
10-1
100
101
t1, Rectangular Pulse Duration [sec]
Fig.11 Transient Thermal Response
Curve
4
Oct. 2014. Version 1.0
MagnaChip Semiconductor Ltd.
Package Dimension
3 Leads, TO-220
Dimensions are in millimeters unless otherwise specified
5
Oct. 2014. Version 1.0
MagnaChip Semiconductor Ltd.
DISCLAIMER:
The Products are not designed for use in hostile environments, including, without limitation, aircraft, nuclear power
generation, medical appliances, and devices or systems in which malfunction of any Product can reasonably be
expected to result in a personal injury. Seller’s customers using or selling Seller’s products for use in such
applications do so at their own risk and agree to fully defend and indemnify Seller.
MagnaChip reserves the right to change the specifications and circuitry without notice at any time. MagnaChip does not consider responsibility
for use of any circuitry other than circuitry entirely included in a MagnaChip product.
Semiconductor Ltd.
is a registered trademark of MagnaChip
6
Oct. 2014. Version 1.0
MagnaChip Semiconductor Ltd.
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