APT4M120K [MICROSEMI]

N-Channel MOSFET; N沟道MOSFET


型号：	APT4M120K
厂家：	Microsemi
描述：	N-Channel MOSFET N沟道MOSFET
文件：	总4页 (文件大小：254K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

APT4M120K

1200V, 4A, 4.00Ω Max

N-Channel MOSFET

Power MOS 8^™is a high speed, high voltage N-channel switch-mode power MOSFET.

A proprietary planar stripe design yields excellent reliability and manufacturability. Low

switching loss is achieved with low input capacitance and ultra low C_rss"Miller" capaci-

tance. The intrinsic gate resistance and capacitance of the poly-silicon gate structure

help control slew rates during switching, resulting in low EMI and reliable paralleling,

even when switching at very high frequency. Reliability in ﬂyback, boost, forward, and

other circuits is enhanced by the high avalanche energy capability.

TO-220

APT4M120K

Single die MOSFET

FEATURES

TYPICAL APPLICATIONS

• PFC and other boost converter

• Fast switching with low EMI/RFI

• Buck converter

• Low R_DS(on)

• Two switch forward (asymmetrical bridge)

• Single switch forward

• Flyback

• Ultra low C_rssfor improved noise immunity

• Low gate charge

• Avalanche energy rated

• RoHS compliant

• Inverters

Absolute Maximum Ratings

Symbol Parameter

Unit

Ratings

Continuous Drain Current @ T_C= 25°C

I_D

Continuous Drain Current @ T_C= 100°C

Pulsed Drain Current ¹

I_DM

V_GS

E_AS

I_AR

±30

310

Gate-Source Voltage

Single Pulse Avalanche Energy ²

Avalanche Current, Repetitive or Non-Repetitive

Thermal and Mechanical Characteristics

Symbol Characteristic

Min

Typ

Max

225

Unit

P_D

Total Power Dissipation @ T_C= 25°C

R_θJC

0.56

Junction to Case Thermal Resistance

°C/W

°C

R_θCS

0.11

Case to Sink Thermal Resistance, Flat, Greased Surface

T_J,T_STG

-55

150

300

Operating and Storage Junction Temperature Range

T_L

Soldering Temperature for 10 Seconds (1.6mm from case)

0.22

6.2

W_T

Package Weight

in·lbf

N·m

Torque

Mounting Torque ( TO-220 Package), 6-32 or M3 screw

1.1

Microsemi Website - http://www.microsemi.com

Static Characteristics

T = 25°C unless otherwise speciﬁed

APT4M120K

Parameter

Test Conditions

Min

Typ

Max

Unit

Symbol

V_BR(DSS)

= 0V, I = 250µA

Drain-Source Breakdown Voltage

Breakdown Voltage Temperature Coefﬁcient

Drain-Source On Resistance ³

Gate-Source Threshold Voltage

Threshold Voltage Temperature Coefﬁcient

1200

∆V_BR(DSS)/∆T_J

Reference to 25°C, I = 250µA

V/°C

Ω

1.41

3.32

= 10V, I = 2A

R_DS(on)

V_GS(th)

4.00

= V_DS, I = 1mA

∆V_GS(th)/∆T_J

mV/°C

-10

= 1200V

= 0V

T = 25°C

100

500

I_DSS

I_GSS

Zero Gate Voltage Drain Current

Gate-Source Leakage Current

µA

T = 125°C

= ±30V

±100

Dynamic Characteristics

T = 25°C unless otherwise speciﬁed

Symbol

Parameter

Test Conditions

Min

Typ

4.5

Max

Unit

g_fs

= 50V, I = 2A

Forward Transconductance

Input Capacitance

C_iss

C_rss

C_oss

1385

= 0V, V = 25V

Reverse Transfer Capacitance

Output Capacitance

f = 1MHz

100

C_o(cr)

Effective Output Capacitance, Charge Related

Effective Output Capacitance, Energy Related

= 0V, V = 0V to 800V

C_o(er)

Q_g

Q_gs

Q_gd

t_d(on)

Total Gate Charge

Gate-Source Charge

Gate-Drain Charge

Turn-On Delay Time

Current Rise Time

Turn-Off Delay Time

Current Fall Time

= 0 to 10V, I = 2A,

= 600V

7.4

4.4

6.9

Resistive Switching

V = 800V, I = 2A

t_r

t_d(off)

t_f

= 4.7Ω ⁶, V

= 15V

Source-Drain Diode Characteristics

Symbol

Parameter

Test Conditions

Min

Typ

Max

Unit

Continuous Source Current

(Body Diode)

MOSFET symbol

showing the

integral reverse p-n

junction diode

(body diode)

I_S

Pulsed Source Current

(Body Diode) ¹

I_SM

V_SD

t_rr

= 2A, T = 25°C, V

= 0V

Diode Forward Voltage

Reverse Recovery Time

Reverse Recovery Charge

1.0

= 2A, V = 100V

1150

µC

Q_rr

di_SD/dt = 100A/µs, T = 25°C

≤ 2A, di/dt ≤1000A/µs, V = 800V,

V/ns

dv/dt

Peak Recovery dv/dt

T = 125°C

Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature.

Starting at T_J= 25°C, L = 155.0mH, R_G= 4.7Ω, I_AS= 2A.

Pulse test: Pulse Width < 380µs, duty cycle < 2%.

C_o(cr)is deﬁned as a ﬁxed capacitance with the same stored charge as C_OSSwith V_DS= 67% of V_(BR)DSS.

C_o(er)is deﬁned as a ﬁxed capacitance with the same stored energy as C_OSSwith V_DS= 67% of V_(BR)DSS. To calculate C_o(er)for any value of

V_DSless than V_(BR)DSS,use this equation: C_o(er)= -6.30E-8/V_DS^2 + 7.65E-9/V_DS+ 1.09E-11.

R_Gis external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452)

Microsemi reserves the right to change, without notice, the speciﬁcations and information contained herein.

APT4M120K

4.0

3.5

3.0

2.5

2.0

1.5

1.0

= 10V

= 125°C

_GS= 6, 7, 8 & 9V

T_J= -55°C

T_J= 25°C

4.5V

T_J= 125°C

0.5

T_J= 150°C

, DRAIN-TO-SOURCE VOLTAGE (V)

DS(ON)

Figure 1, Output Characteristics

Figure 2, Output Characteristics

3.0

2.5

2.0

1.5

1.0

NORMALIZED TO

= 10V 2A

V_DS> I_D(ON)

x R_DS(ON)MAX.

250µSEC. PULSE TEST

@ <0.5 % DUTY CYCLE

T_J= -55°C

T_J= 25°C

T_J= 125°C

0.5

-55 -25

25 50 75 100 125 150

T , JUNCTION TEMPERATURE (°C)

, GATE-TO-SOURCE VOLTAGE (V)

Figure 3, R

vs Junction Temperature

Figure 4, Transfer Characteristics

DS(ON)

2,000

1,000

C_iss

T_J= -55°C

T_J= 25°C

100

T_J= 125°C

C_oss

C_rss

0.5

1.0

1.5

2.0

200

V , DRAIN-TO-SOURCE VOLTAGE (V)

400

600

800 1000 1200

I , DRAIN CURRENT (A)

Figure 5, Gain vs Drain Current

Figure 6, Capacitance vs Drain-to-Source Voltage

= 2A

V_DS= 240V

V_DS= 600V

T_J= 25°C

V_DS= 960V

T_J= 150°C

0.2

, SOURCE-TO-DRAIN VOLTAGE (V)

0.4

0.6

0.8

1.0

1.2

Q , TOTAL GATE CHARGE (nC)

Figure 7, Gate Charge vs Gate-to-Source Voltage

Figure 8, Reverse Drain Current vs Source-to-Drain Voltage

APT4M120K

13µs

ds(on)

13µs

100µs

1ms

100µs

10ms

1ms

_J= 150°C

_C= 25°C

ds(on)

100ms

DC line

10ms

Scaling for Different Case & Junction

Temperatures:

100ms

DC line

_J= 125°C

_C= 75°C

_D= I_{D(T = 25°C)}*(T - T_C)/125

0.1

100

1200

100

1200

, DRAIN-TO-SOURCE VOLTAGE (V)

Figure 9, Forward Safe Operating Area

Figure 10, Maximum Forward Safe Operating Area

T_J(°C)

T_C(°C)

Z_EXTare the external thermal

impedances: Case to sink,

sink to ambient, etc. Set to

zero when modeling only

the case to junction.

0.239

0.323

Dissipated Power

(Watts)

0.0025

0.124

Figure 11, Transient Thermal Impedance Model

0.60

0.50

0.40

0.30

0.20

D = 0.9

0.7

0.5

Note:

0.3

= Pulse Duration

SINGLE PULSE

Duty Factor D =

0.10

0.1

Peak T = P

x Z

+ T

θJC C

0.05

10^-5

10^-4

10^-3

10^-2

10^-1

1.0

RECTANGULAR PULSE DURATION (seconds)

Figure 12. Maximum Effective Transient Thermal Impedance Junction-to-Case vs Pulse Duration

TO-220 (K) Package Outline

e3 100% Sn Plated

10.66 (.420)

9.66 (.380)

1.39 (.055)

0.51 (.020)

5.33 (.210)

4.83 (.190)

Drain

6.85 (.270)

5.85 (.230)

4.08 (.161) Dia.

3.54 (.139)

3.42 (.135)

2.54 (.100)

12.192 (.480)

9.912 (.390)

3.683 (.145)

MAX.

14.73 (.580)

12.70 (.500)

Gate

0.50 (.020)

0.41 (.016)

Drain

Source

2.92 (.115)

2.04 (.080)

1.01 (.040) 3-Plcs.

0.83 (.033)

1.77 (.070) 3-Plcs.

1.15 (.045)

2.79 (.110)

2.29 (.090)

4.82 (.190)

3.56 (.140)

5.33 (.210)

4.83 (.190)

Dimensions in Millimeters and (Inches)

Microsemi's products are covered by one or more of U.S.patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522 5,262,336 6,503,786

APT4M120K [MICROSEMI]

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