MMBF0202PLT1 [MOTOROLA]
P-CHANNEL ENHANCEMENT-MODE TMOS MOSFET; P沟道增强型MOSFET TMOS
| 型号： | MMBF0202PLT1 |
| 厂家： | 
MOTOROLA |
| 描述： | P-CHANNEL ENHANCEMENT-MODE TMOS MOSFET |
| 文件： | 总6页 (文件大小：193K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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by MMBF0202PLT1/D
SEMICONDUCTOR TECHNICAL DATA
Motorola Preferred Device
P–CHANNEL
ENHANCEMENT–MODE
TMOS MOSFET
Part of the GreenLine Portfolio of devices with energy–con-
serving traits.
r
= 1.4 OHM
DS(on)
These miniature surface mount MOSFETs utilize Motorola’s High
Cell Density, HDTMOS process. Low r
assures minimal
DS(on)
power loss and conserves energy, making this device ideal for use
in small power management circuitry. Typical applications are
dc–dc converters, power management in portable and battery–
powered products such as computers, printers, PCMCIA cards,
cellular and cordless telephones.
3
3 DRAIN
1
2
CASE 318–07, Style 21
SOT–23 (TO–236AB)
•
•
Low r
Provides Higher Efficiency and Extends Battery Life
Miniature SOT–23 Surface Mount Package Saves Board Space
DS(on)
1
GATE
2 SOURCE
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
Rating
Drain–to–Source Voltage
Symbol
V
Value
20
Unit
Vdc
Vdc
DSS
Gate–to–Source Voltage — Continuous
V
GS
± 20
Drain Current — Continuous @ T = 25°C
I
I
300
240
750
mAdc
A
D
D
Drain Current — Continuous @ T = 70°C
A
Drain Current — Pulsed Drain Current (t ≤ 10 µs)
I
p
DM
(1)
Total Power Dissipation @ T = 25°C
P
225
– 55 to 150
625
mW
°C
A
D
Operating and Storage Temperature Range
Thermal Resistance — Junction–to–Ambient
T , T
J
stg
R
°C/W
°C
θJA
Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds
T
260
L
DEVICE MARKING
P3
(1) Mounted on G10/FR4 glass epoxy board using minimum recommended footprint.
ORDERING INFORMATION
Device
Reel Size
Tape Width
Quantity
3000
MMBF0202PLT1
MMBF0202PLT3
7″
12 mm embossed tape
12 mm embossed tape
13″
10,000
GreenLine is a trademark of Motorola, Inc.
HDTMOS is a trademark of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
Thermal Clad is a registered trademark of the Berquist Company.
Preferred devices are Motorola recommended choices for future use and best overall value.
(Replaces MMBF0202P/D)
Motorola, Inc. 1995
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
A
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain–to–Source Breakdown Voltage
V
20
—
—
Vdc
(BR)DSS
(V
GS
= 0 Vdc, I = 10 µA)
D
Zero Gate Voltage Drain Current
I
µAdc
DSS
(V
DS
(V
DS
= 16 Vdc, V
= 16 Vdc, V
= 0 Vdc)
= 0 Vdc, T = 125°C)
—
—
—
—
1.0
10
GS
GS
J
Gate–Body Leakage Current (V
GS
= ± 20 Vdc, V
DS
= 0)
I
—
—
±100
nAdc
GSS
(1)
ON CHARACTERISTICS
Gate Threshold Voltage
V
1.0
1.7
2.4
Vdc
GS(th)
(V
DS
= V , I = 250 µAdc)
GS
D
Static Drain–to–Source On–Resistance
r
Ohms
DS(on)
(V
GS
(V
GS
= 10 Vdc, I = 200 mAdc)
—
—
0.9
2.0
1.4
3.5
D
= 4.5 Vdc, I = 50 mAdc)
D
Forward Transconductance (V
DS
= 10 Vdc, I = 200 mAdc)
g
—
600
—
mMhos
pF
D
FS
DYNAMIC CHARACTERISTICS
Input Capacitance
(V
DS
(V
DS
DG
= 5.0 V)
= 5.0 V)
= 5.0 V)
C
—
—
—
50
45
20
—
—
—
iss
Output Capacitance
C
oss
Transfer Capacitance
(V
C
rss
(2)
SWITCHING CHARACTERISTICS
Turn–On Delay Time
t
—
—
—
—
—
2.5
1.0
—
—
—
—
—
ns
d(on)
(V
= –15 Vdc,
= 75 Ω, I = 200 mAdc,
Rise Time
DD
t
r
R
V
L
D
Turn–Off Delay Time
Fall Time
t
16
d(off)
= –10 V, R = 6.0 Ω)
G
GEN
t
f
8.0
Gate Charge (See Figure 5)
(V
DS
= 16 V, V
I
= 10 V,
= 200 mA)
Q
2700
pC
GS
T
D
SOURCE–DRAIN DIODE CHARACTERISTICS
Continuous Current
I
—
—
—
—
—
0.3
0.75
—
A
V
S
Pulsed Current
I
SM
(2)
Forward Voltage
V
SD
1.5
(1) Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2%.
(2) Switching characteristics are independent of operating junction temperature.
2
Motorola Small–Signal Transistors, FETs and Diodes Device Data
TYPICAL ELECTRICAL CHARACTERISTICS
1.0
0.8
0.6
0.4
0.2
1.0
5 V
T
= –55°C
C
25°C
V
= 10, 9, 8, 7, 6 V
4 V
0.8
0.6
0.4
0.2
0
GS
125°C
3 V
0
0
2
4
6
8
0
1
2
3
4
V
, GATE–TO–SOURCE VOLTAGE (VOLTS)
V , DRAIN–TO–SOURCE VOLTAGE (VOLTS)
DS
GS
Figure 1. Transfer Characteristics
Figure 2. On–Region Characteristics
5
4
3
2
1
0
5
4
3
2
1
0
200 mA
V
= 4.5 V
= 10 V
200
50 mA
GS
V
GS
0
100
300
400
500
0
–5
–10
–15
–20
I
, DRAIN CURRENT (AMPS)
V , GATE–TO–SOURCE VOLTAGE (VOLTS)
GS
D
Figure 3. On–Resistance versus Drain Current
Figure 4. On–Resistance versus
Gate–to–Source Voltage
16
1.20
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
14
12
10
8
I
= 200 mA
I = 250 µA
D
D
2160
V
= 10 V
DS
V
= 16 V
6
DS
590
4
2
0
0
230
690
2270
3500
–50
–25
0
25
50
75
C)
100
125
150
Q , TOTAL GATE CHARGE (pC)
g
TEMPERATURE (
°
Figure 5. Gate Charge
Figure 6. Threshold Voltage Variance
Over Temperature
Motorola Small–Signal Transistors, FETs and Diodes Device Data
3
TYPICAL ELECTRICAL CHARACTERISTICS
1.30
1.25
1.20
1.15
1.10
1.05
1.00
0.95
0.90
0.85
140
120
V
= 4.5 V @ 50 mA
GS
100
80
V
= 10 V @ 200 mA
GS
60
40
C
C
iss
oss
20
0
C
rss
0.80
–50
–25
0
25
50
75
100
C)
125
150
0
5
10
15
20
T , JUNCTION TEMPERATURE (
°
V
, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
J
DS
Figure 7. On–Resistance versus
Junction Temperature
Figure 8. Capacitance
10
1.0
T
= 150°C
–55°C
J
0.1
25°C
0.01
0.001
0
1
2
3
4
4.5
SOURCE–TO–DRAIN FORWARD VOLTAGE (VOLTS)
Figure 9. Source–to–Drain Forward Voltage
versus Continuous Current (I )
S
4
Motorola Small–Signal Transistors, FETs and Diodes Device Data
INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must
be the correct size to insure proper solder connection
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
0.037
0.95
0.037
0.95
0.079
2.0
0.035
0.9
0.031
0.8
inches
mm
SOT–23
SOT–23 POWER DISSIPATION
The power dissipation of the SOT–23 is a function of the
SOLDERING PRECAUTIONS
drain pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power dissipation.
Power dissipation for a surface mount device is determined
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within a
short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
by T
, the maximum rated junction temperature of the
, the thermal resistance from the device junction to
J(max)
die, R
θJA
ambient, and the operating temperature, T . Using the
A
values provided on the data sheet for the SOT–23 package,
P
can be calculated as follows:
D
• Always preheat the device.
• The delta temperature between the preheat and soldering
should be 100°C or less.*
T
– T
A
J(max)
P
=
D
R
θJA
• When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering method,
the difference shall be a maximum of 10°C.
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
the equation for an ambient temperature T of 25°C, one can
calculate the power dissipation of the device which in this
A
• The soldering temperature and time shall not exceed
260°C for more than 10 seconds.
case is 225 milliwatts.
• When shifting from preheating to soldering, the maximum
temperature gradient shall be 5°C or less.
150°C – 25°C
556°C/W
P
=
= 225 milliwatts
D
• After soldering has been completed, the device should be
allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and result
in latent failure due to mechanical stress.
The 556°C/W for the SOT–23 package assumes the use
of the recommended footprint on a glass epoxy printed circuit
board to achieve a power dissipation of 225 milliwatts. There
are other alternatives to achieving higher power dissipation
from the SOT–23 package. Another alternative would be to
use a ceramic substrate or an aluminum core board such as
Thermal Clad . Using a board material such as Thermal
Clad, an aluminum core board, the power dissipation can be
doubled using the same footprint.
• Mechanical stress or shock should not be applied during
cooling.
* Soldering a device without preheating can cause excessive
thermal shock and stress which can result in damage to the
device.
Motorola Small–Signal Transistors, FETs and Diodes Device Data
5
PACKAGE DIMENSIONS
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIUMUM LEAD THICKNESS INCLUDES
LEAD FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS OF
BASE MATERIAL.
A
L
3
INCHES
MIN MAX
MILLIMETERS
S
C
B
DIM
A
B
C
D
G
H
J
MIN
2.80
1.20
0.89
0.37
1.78
0.013
0.085
0.45
0.89
2.10
0.45
MAX
3.04
1.40
1.11
0.50
2.04
0.100
0.177
0.60
1.02
2.50
0.60
1
2
0.1102 0.1197
0.0472 0.0551
0.0350 0.0440
0.0150 0.0200
0.0701 0.0807
0.0005 0.0040
0.0034 0.0070
0.0180 0.0236
0.0350 0.0401
0.0830 0.0984
0.0177 0.0236
V
G
K
L
S
H
J
D
V
K
STYLE 21:
PIN 1. GATE
2. SOURCE
3. DRAIN
CASE 318–07
SOT–23 (TO–236AB)
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MMBF0202PLT1/D
◊
相关型号：
MMBF0202PLT1G
300mA, 20V, P-CHANNEL, Si, SMALL SIGNAL, MOSFET, TO-236, LEAD FREE, CASE 318-08, 3 PIN
ONSEMI
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