UPD8870CY_技术文档

DATA SHEET

MOS INTEGRATED CIRCUIT

µPD8870

10680 PIXELS × 3 COLOR CCD LINEAR IMAGE SENSOR

DESCRIPTION

The µPD8870 is a color CCD (Charge Coupled Device) linear image sensor which changes optical images to

electrical signal and has the function of color separation.

The µPD8870 has 3 rows of 10680 pixels, and each row has a double-sided readout type of charge transfer

register. And it has reset feed-through level clamp circuits and voltage amplifiers. Therefore, it is suitable for 1200

dpi/A4 color image scanners, color facsimiles and so on.

FEATURES

• Valid photocell : 10680 pixels × 3

• Photocell pitch : 4 µm

• Photocell size

• Line spacing

• Color filter

• Resolution

:

: 4 × 4 µm²

: 48 µm (12 lines) Red line - Green line, Green line - Blue line

: Primary colors (red, green and blue), pigment filter (with light resistance 10⁷lx•hour)

: 48 dot/mm A4 (210 × 297 mm) size (shorter side)

1200 dpi US letter (8.5” × 11”) size (shorter side)

• Drive clock level : CMOS output under 5 V operation

• Data rate

: 10 MHz Max.

: +12 V

• Power supply

• On-chip circuits : Reset feed-through level clamp circuits

:: Voltage amplifiers

ORDERING INFORMATION

Part Number

Package

CCD linear image sensor 32-pin plastic DIP (10.16 mm (400))

µPD8870CY

The information in this document is subject to change without notice. Before using this document, please

confirm that this is the latest version.

Not all devices/types available in every country. Please check with local NEC representative for

availability and additional information.

Document No. S15328EJ2V0DS00 (2nd edition)

Date Published September 2002 NS CP (K)

Printed in Japan

The mark

shows major revised points.

2001

µPD8870

BLOCK DIAGRAM

φ

1

2L

2

VOD

GND GND GND

29

1

4

16

28

22

19

CCD analog shift register

Transfer gate

φ

TG1

(Blue)

18

17

15

V

(Blue)

OUT

1

Photocell

(Blue)

30

31

32

······

Transfer gate

CCD analog shift register

Transfer gate

φ

TG2

(Green)

V

OUT

2

Photocell

(Green)

Transfer gate

CCD analog shift register

Transfer gate

φ

TG3

(Red)

V

(Red)

OUT

3

Photocell

(Red)

Transfer gate

CCD analog shift register

3

2

5

14

11

φ

1

φ

2

φ

RB

1L

CLB

2

Data Sheet S15328EJ2V0DS

µPD8870

PIN CONFIGURATION (Top View)

CCD linear image sensor 32-pin plastic DIP (10.16 mm (400))

• µPD8870CY

Ground

GND

1

2

3

4

5

6

7

8

9

32

31

30

29

28

V

φ

OUT

OD

3

2

1

Output signal 3 (Red)

Reset gate clock

φ

Output signal 2 (Green)

Output signal 1 (Blue)

Output drain voltage

Last stage shift register clock 2

Internal connection

No connection

RB

Reset feed-through level

clamp clock

φ

CLB

GND

Ground

Last stage shift register clock 1

Internal connection

No connection

φ

2L

1L

IC

27 IC

26 IC

25 NC

24 NC

23 NC

NC

No connection

NC 10

No connection

φ

2

11

22

Shift register clock 2

Internal connection

Shift register clock 1

1

Shift register clock 1

Internal connection

Shift register clock 2

IC 12

IC 13

21 IC

20 IC

φ

2

14

15

19

18

17

φ

1

Transfer gate clock 3

(for Red)

Transfer gate clock 1

(for Blue)

φ

TG1

TG2

TG3

Transfer gate clock 2

(for Green)

GND 16

Ground

Cautions 1. Leave pins 6, 7, 12, 13, 20, 21, 26, 27 (IC) unconnected.

2. Connect the No connection pins (NC) to GND.

PHOTOCELL STRUCTURE DIAGRAM

PHOTOCELL ARRAY STRUCTURE DIAGRAM

(Line spacing)

4 µm

Blue photocell array

Green photocell array

Red photocell array

µ

2 m

12 lines

(48 m)

2 m

µ

Channel stopper

µ

12 lines

(48 m)

µ

Aluminum

shield

3

Data Sheet S15328EJ2V0DS

µPD8870

ABSOLUTE MAXIMUM RATINGS (T^A= +25°C)

Parameter

Output drain voltage

Symbol

Ratings

−0.3 to +15

−0.3 to +8

Unit

V

V^OD

Shift register clock voltage

Reset gate clock voltage

V^φ¹, V^φ², V^φ^1L, V^φ^2L

V

V^φ^RB

V

Reset feed-through level clamp clock

voltage

V^φ^CLB

V

Transfer gate clock voltage

Operating ambient temperature^Note

Storage temperature

V^φ^TG1to V^φ^TG3

−0.3 to +8

0 to +60

V

T^A

°C

T^stg

−40 to +70

Note

Use at the condition without dew condensation.

Caution Product quality may suffer if the absolute maximum rating is exceeded even momentarily for any

parameter. That is, the absolute maximum ratings are rated values at which the product is on the

verge of suffering physical damage, and therefore the product must be used under conditions that

ensure that the absolute maximum ratings are not exceeded.

RECOMMENDED OPERATING CONDITIONS (T^A= +25°C)

Parameter

Output drain voltage

Symbol

Min.

11.4

4.75

−0.3

4.5

Typ.

12.0

5.0

0

Max.

12.6

5.5

Unit

V

V^OD

Shift register clock high level

Shift register clock low level

Reset gate clock high level

Reset gate clock low level

V^φ^1H, V^φ^2H, V^φ^1LH, V^φ^2LH

V

V^φ^1L, V^φ^2L, V^φ^1LL, V^φ^2LL

+0.3

5.5

V

V^φ^RBH

V^φ^RBL

V^φ^CLBH

5.0

0

V

−0.3

4.5

+0.5

5.5

V

Reset feed-through level clamp clock

high level

5.0

V

Reset feed-through level clamp clock

low level

V^φ^CLBL

−0.3

0

+0.5

V

Note

Transfer gate clock high level

Transfer gate clock low level

Data rate

V^φ^TG1Hto V^φ^TG3H

V^φ^TG1Lto V^φ^TG3L

f^φ^RB

4.5

−0.3

−

V^φ^1H

V

0

+0.15

2.0

10.0

MHz

Note When Transfer gate clock high level (Vφ ^TG1Hto Vφ ^TG3H) is higher than Shift register clock high level (Vφ ^1H),

Image lag can increase.

4

Data Sheet S15328EJ2V0DS

µPD8870

ELECTRICAL CHARACTERISTICS

T^A= +25°C, V^OD= 12 V, data rate (fφ ^RB) = 2 MHz, storage time = 5.5 ms, input signal clock = 5 V^p-p,

light source : 3200 K halogen lamp + C-500S (infrared cut filter, t = 1 mm) + HA-50 (heat absorbing filter, t = 3 mm)

Parameter

Saturation voltage

Saturation exposure

Symbol

V^sat

Test Conditions

Min.

Typ.

3.2

Max.

−

Unit

V

3.0

Red

SER

SEG

SEB

PRNU

ADS

DSNU

P^W

−

0.889

0.970

1.455

6

−

lx•s

%

Green

Blue

−

Photo response non-uniformity

Average dark signal

V^OUT= 1.0 V

−

20

4.0

480

1.00

4.68

4.29

2.86

7.0

−

Light shielding

−

0.2

mV

mW

kΩ

Dark signal non-uniformity

Power consumption

−

1.0

−

360

0.35

3.60

3.30

2.20

1.5

Output impedance

Z^O

−

2.52

2.31

1.54

−

Response

Red

R^R

V/lx•s

%

Green

Blue

R^G

R^B

Image lag

Offset level ^{Note 1}

Output fall delay time ^{Note 2}

Total transfer efficiency

Register imbalance

Response peak

IL

V^OUT= 1.0 V

V^OS

t^d

4.0

−

5.5

V

V^OUT= 1.0 V, t1’, t2’ = 5 ns

V^OUT= 1.0 V, data rate = 10 MHz

V^OUT= 1.0 V

25

ns

TTE

RI

92

−

98

−

%

1.0

4.0

−

%

Red

−

630

540

460

3200

−300

1.0

nm

Green

Blue

−

nm

−

nm

Dynamic range

DR1

V^sat/DSNU

−

times

mV

DR2

V^sat/σ CDS

−

Reset feed-through noise ^{Note 1}

Random noise (CDS)

RFTN

σ CDS

Light shielding

−1000

−

+500

−

Notes 1. Refer to TIMING CHART 2, 3.

2. When each fall time of φ 1L and φ 2L (t1’, t2’) is the Typ. value (refer to TIMING CHART 2, 3).

5

Data Sheet S15328EJ2V0DS

µPD8870

INPUT PIN CAPACITANCE (T^A= +25°C, V^OD= 12 V)

Parameter

Symbol

C^φ¹

Pin name

φ 1

Pin No.

11

19

14

22

5

Min.

−

Typ.

400

10

Max.

Unit

pF

Shift register clock pin capacitance 1

−

Shift register clock pin capacitance 2

Last stage shift register clock pin capacitance

Reset gate clock pin capacitance

C^φ²

φ 2

−

C^φ^L

φ 1L

−

φ 2L

28

2

−

10

C^φ^RB

φ RB

−

10

Reset feed-through level clamp clock pin capacitance C^φ^CLB

Transfer gate clock pin capacitance C^φ^TG

φ CLB

φ TG1

φ TG2

φ TG3

3

−

10

18

17

15

−

100

−

Remark Pin 11 and 19 (φ 1), 14 and 22 (φ 2) are each connected inside of the device.

6

Data Sheet S15328EJ2V0DS

µPD8870

TIMING CHART 2 (Bit clamp mode, for each color)

t1

t2

90%

φ

1

2

10%

90%

10%

t1'

t2'

90%

10%

φ

1L

2L

90%

10%

t5

t6

t5

t6

t3

t4

t8

t3

t4

t8

90%

10%

φ

RB

t9

t10

t11

t9

t10

t11

t7

90%

10%

φ

CLB

td

RFTN

VOUT

VOS

10%

Symbol

Min.

Typ.

25

Max.

Unit

ns

t1, t2

0

−

t1’, t2’

t3

5

20

30

0

−5 ^Note

20

0

100

150

25

t4

t5, t6

t7

25

t8

100

25

t9, t10

t11

5

25

Note Min. of t7 shows that the φ RB and φ CLB overlap each other.

90%

φ

RB

t7

90%

φ

CLB

9

Data Sheet S15328EJ2V0DS

µPD8870

TIMING CHART 3 (Line clamp mode, for each color)

t1

t2

90%

φ

1

2

10%

90%

10%

t1'

t2'

90%

10%

φ

1L

2L

90%

10%

t5

t6

t5

t6

t3

t4

t3

t4

90%

10%

φ

RB

"H"

φ

CLB

td

RFTN

VOUT

VOS

10%

Symbol

Min.

0

Typ.

25

Max.

Unit

ns

t1, t2

−

t1’, t2’

t3

0

5

ns

20

30

0

100

150

25

ns

t4

ns

t5, t6

ns

10

Data Sheet S15328EJ2V0DS

µPD8870

TIMING CHART 4

t13

t12

t14

90%

10%

t15

φ

TG1 to φ TG3

t16

90%

φ

1

2

90%

t17

φ

RB

t18

90%

φ

CLB

(Line clamp mode)

Symbol

Min.

5000

0

Typ.

10000

50

Max.

Unit

ns

t12

50000

t13, t14

t15, t16

t17, t18

−

ns

900

200

1000

400

ns

Remark Inverse pulse of the φ TG1 to φ TG3 can be used as φ CLB.

φ 1, φ 2 cross points

φ

2

1

2 V or more

φ 1, φ 2L cross points

φ

1

2 V or more

0.5 V or more

φ

2L

φ 1L, φ 2 cross points

φ

2

2 V or more

0.5 V or more

φ

1L

Remark Adjust cross points (φ 1, φ 2), (φ 1, φ 2L) and (φ 1L, φ 2) with input resistance of each pin.

11

Data Sheet S15328EJ2V0DS

µPD8870

DEFINITIONS OF CHARACTERISTIC ITEMS

1. Saturation voltage : V^sat

Output signal voltage at which the response linearity is lost.

2. Saturation exposure : SE

Product of intensity of illumination (lx) and storage time (s) when saturation of output voltage occurs.

3. Photo response non-uniformity : PRNU

The output signal non-uniformity of all the valid pixels when the photosensitive surface is applied with the light

of uniform illumination. This is calculated by the following formula.

x

∆

PRNU (%) =

× 100

x : maximum of x − x 

x

∆

j

10680

xj

Σ

j = 1

x =

10680

: Output voltage of valid pixel number j

xj

VOUT

x

Register Dark

DC level

∆

x

4. Average dark signal : ADS

Average output signal voltage of all the valid pixels at light shielding. This is calculated by the following

formula.

10680

d

j

Σ

j = 1

ADS (mV) =

10680

d

j

: Dark signal of valid pixel number j

12

Data Sheet S15328EJ2V0DS

µPD8870

5. Dark signal non-uniformity : DSNU

Absolute maximum of the difference between ADS and voltage of the highest or lowest output pixel of all the

valid pixels at light shielding. This is calculated by the following formula.

DSNU (mV) : maximum of d

j

− ADS j = 1 to 10680

dj

: Dark signal of valid pixel number j

V

OUT

ADS

Register Dark

DC level

DSNU

6. Output impedance : Z^O

Impedance of the output pins viewed from outside.

7. Response : R

Output voltage divided by exposure (lx•s).

Note that the response varies with a light source (spectral characteristic).

8. Image lag : IL

The rate between the last output voltage and the next one after read out the data of a line.

φ

TG

Light

ON

OFF

V

OUT

V1

VOUT

V

1

IL (%) =

× 100

OUT

V

13

Data Sheet S15328EJ2V0DS

µPD8870

9. Register imbalance : RI

The rate of the difference between the averages of the output voltage of Odd and Even pixels, against the

average output voltage of all the valid pixels.

n

2

n

∑

(V2j –1 – V2j)

j = 1

RI (%) =

× 100

n

1

n

∑

V

j

j = 1

n : Number of valid pixels

Vj : Output voltage of valid pixel number j

10. Random noise (CDS) : σ CDS

Random noise σ CDS is defined as the standard deviation of a valid pixel output signal with 100 times (=100

lines) data sampling at dark (light shielding). σ CDS is calculated by the following procedure.

1. One valid photocell in one reading is fixed as measurement point.

2. The output level is measured during the reset feed-through period which is averaged over 100 ns to get

“VDⁱ”.

3. The output level is measured during the video output time averaged over 100 ns to get “VOⁱ”.

4. The correlated double sampling output is defined by the following formula.

VCDSⁱ= VDⁱ– VOⁱ

5. Repeat the above procedure (1 to 4) for 100 times (= 100 lines).

6. Calculate the standard deviation σ CDS using the following formula equation.

100

(VCDSi – V)²

1

Σ

σ

CDS (mV) =

, V =

VCDSi

₁₀₀Σ

i = 1

100

Reset feed-through

Video output

14

Data Sheet S15328EJ2V0DS

µPD8870

STANDARD CHARACTERISTIC CURVES (Reference Value)

DARK OUTPUT TEMPERATURE

CHARACTERISTIC

STORAGE TIME OUTPUT VOLTAGE

CHARACTERISTIC (T^A= +25°C)

8

2

4

2

1

0.5

0.25

0.2

0.1

0

10

20

30

40

50

1

5

10

Operating Ambient Temperature T

A

(°C)

Storage Time (ms)

TOTAL SPECTRAL RESPONSE CHARACTERISTICS

(without infrared cut filter and heat absorbing filter) (T = +25°C)

A

100

80

R

B

G

60

40

20

G

B

0

400

500

600

700

800

Wavelength (nm)

15

Data Sheet S15328EJ2V0DS

µPD8870

APPLICATION CIRCUIT EXAMPLE

+5 V

µ

PD8870

+

1

2

32

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

GND

V

OUT

3

2

1

B3

B2

B1

10

µ

F/16 V 0.1 µF

47

Ω

φ

V

RB

+12 V

+5 V

3

φ

CLB

10

Ω

4

GND

V

OD

+

150

Ω

5

φ

1L

2L

IC

6

0.1 µF 47 µF/25 V

IC

7

IC

+

8

NC

10

µ

F/16 V

0.1 µF

9

150 Ω

10

11

12

13

14

15

16

φ

2L

4.7

Ω

4.7 Ω

φ

2

1

2

IC

4.7

Ω

4.7 Ω

φ

2

φ

1

φ

TG1

TG2

TG3

TG

GND

Cautions 1. Leave pins 6, 7, 12, 13, 20, 21, 26, 27 (IC) unconnected.

2. Connect the No connection pins (NC) to GND.

Remark The inverters shown in the above application circuit example are the 74HC04 (data rate < 2 MHz) or the

74AC04 (2 MHz ≤ data rate < 10 MHz).

B1 to B3 EQUIVALENT CIRCUIT

12 V

+

µ

47 F/25 V

100 Ω

CCD

V^OUT

2SC945

2 kΩ

100 Ω

16

Data Sheet S15328EJ2V0DS

µPD8870

PACKAGE DRAWING

µ

PD8870CY

CCD-LINEAR IMAGE SENSOR 32-PIN PLASTIC DIP (10.16 mm (400) )

(Unit : mm)

55.2 0.5

54.8 0.5

1st valid pixel

1

6.15 0.3

32

17

16

1

46.7

2.0

12.6 0.5

4.1 0.5

10.16 0.20

1.02 0.15

4.55 0.5

2

(1.80)

3

2.58 0.3

0.46 0.1

2.54 0.25

(5.42)

0.25 0.05

+0.7

10.16

−0.2

4.21 0.5

Name

Dimensions

Refractive index

Plastic cap

52.2×6.4×0.7

1.5

1 1st valid pixel

The center of the pin1

2 The surface of the CCD chip

3 The bottom of the package

The top of the cap

The surface of the CCD chip

32C-1CCD-PKG6-1

17

Data Sheet S15328EJ2V0DS

µPD8870

RECOMMENDED SOLDERING CONDITIONS

When soldering this product, it is highly recommended to observe the conditions as shown below.

If other soldering processes are used, or if the soldering is performed under different conditions, please make sure

to consult with our sales offices.

Type of Through-hole Device

µPD8870CY : CCD linear image sensor 32-pin plastic DIP (10.16 mm (400))

Process

Conditions

Partial heating method

Pin temperature : 300 °C or below, Heat time : 3 seconds or less (per pin)

Cautions 1. During assembly care should be taken to prevent solder or flux from contacting the plastic

cap. The optical characteristics could be degraded by such contact.

2. Soldering by the solder flow method may have deleterious effects on prevention of plastic cap

soiling and heat resistance. So the method cannot be guaranteed.

18

Data Sheet S15328EJ2V0DS

µPD8870

NOTES ON HANDLING THE PACKAGES

1

DUST AND DIRT PROTECTING

The optical characteristics of the CCD will be degraded if the cap is scratched during cleaning. Don’t either

touch plastic cap surface by hand or have any object come in contact with plastic cap surface. Should dirt

stick to a plastic cap surface, blow it off with an air blower. For dirt stuck through electricity ionized air is

recommended. And if the plastic cap surface is grease stained, clean with our recommended solvents.

CLEANING THE PLASTIC CAP

Care should be taken when cleaning the surface to prevent scratches.

We recommend cleaning the cap with a soft cloth moistened with one of the recommended solvents below.

Excessive pressure should not be applied to the cap during cleaning. If the cap requires multiple cleanings it is

recommended that a clean surface or cloth be used.

RECOMMENDED SOLVENTS

The following are the recommended solvents for cleaning the CCD plastic cap.

Use of solvents other than these could result in optical or physical degradation in the plastic cap.

Please consult your sales office when considering an alternative solvent.

Solvents

Ethyl Alcohol

Symbol

EtOH

MeOH

IPA

Methyl Alcohol

Isopropyl Alcohol

N-methyl Pyrrolidone

NMP

2

MOUNTING OF THE PACKAGE

The application of an excessive load to the package may cause the package to warp or break, or cause chips

to come off internally. Particular care should be taken when mounting the package on the circuit board. Don't

have any object come in contact with plastic cap. You should not reform the lead frame. We recommended to

use a IC-inserter when you assemble to PCB.

Also, be care that the any of the following can cause the package to crack or dust to be generated.

1. Applying heat to the external leads for an extended period of time with soldering iron.

2. Applying repetitive bending stress to the external leads.

3. Rapid cooling or heating

3

4

OPERATE AND STORAGE ENVIRONMENTS

Operate in clean environments. CCD image sensors are precise optical equipment that should not be subject

to mechanical shocks. Exposure to high temperatures or humidity will affect the characteristics. So avoid

storage or usage in such conditions.

Keep in a case to protect from dust and dirt. Dew condensation may occur on CCD image sensors when the

devices are transported from a low-temperature environment to a high-temperature environment. Avoid such

rapid temperature changes.

For more details, refer to our document "Review of Quality and Reliability Handbook" (C12769E)

ELECTROSTATIC BREAKDOWN

CCD image sensor is protected against static electricity, but destruction due to static electricity is sometimes

detected. Before handling be sure to take the following protective measures.

1. Ground the tools such as soldering iron, radio cutting pliers of or pincer.

2. Install a conductive mat or on the floor or working table to prevent the generation of static electricity.

3. Either handle bare handed or use non-chargeable gloves, clothes or material.

4. Ionized air is recommended for discharge when handling CCD image sensor.

5. For the shipment of mounted substrates, use box treated for prevention of static charges.

6. Anyone who is handling CCD image sensors, mounting them on PCBs or testing or inspecting PCBs on

which CCD image sensors have been mounted must wear anti-static bands such as wrist straps and ankle

straps which are grounded via a series resistance connection of about 1 MΩ.

19

Data Sheet S15328EJ2V0DS

µPD8870

[MEMO]

20

Data Sheet S15328EJ2V0DS

µPD8870

[MEMO]

21

Data Sheet S15328EJ2V0DS

µPD8870

[MEMO]

22

Data Sheet S15328EJ2V0DS

µPD8870

NOTES FOR CMOS DEVICES

1

PRECAUTION AGAINST ESD FOR SEMICONDUCTORS

Note:

Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and

ultimately degrade the device operation. Steps must be taken to stop generation of static electricity

as much as possible, and quickly dissipate it once, when it has occurred. Environmental control

must be adequate. When it is dry, humidifier should be used. It is recommended to avoid using

insulators that easily build static electricity. Semiconductor devices must be stored and transported

in an anti-static container, static shielding bag or conductive material. All test and measurement

tools including work bench and floor should be grounded. The operator should be grounded using

wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need

to be taken for PW boards with semiconductor devices on it.

2

HANDLING OF UNUSED INPUT PINS FOR CMOS

Note:

No connection for CMOS device inputs can be cause of malfunction. If no connection is provided

to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence

causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels

of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry. Each unused

pin should be connected to V^DDor GND with a resistor, if it is considered to have a possibility of

being an output pin. All handling related to the unused pins must be judged device by device and

related specifications governing the devices.

3

STATUS BEFORE INITIALIZATION OF MOS DEVICES

Note:

Power-on does not necessarily define initial status of MOS device. Production process of MOS

does not define the initial operation status of the device. Immediately after the power source is

turned ON, the devices with reset function have not yet been initialized. Hence, power-on does

not guarantee out-pin levels, I/O settings or contents of registers. Device is not initialized until the

reset signal is received. Reset operation must be executed immediately after power-on for devices

having reset function.

23

Data Sheet S15328EJ2V0DS

µPD8870

•

The information in this document is current as of September, 2002. The information is subject to

change without notice. For actual design-in, refer to the latest publications of NEC's data sheets or

data books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all

products and/or types are available in every country. Please check with an NEC sales representative

for availability and additional information.

•

No part of this document may be copied or reproduced in any form or by any means without prior

written consent of NEC. NEC assumes no responsibility for any errors that may appear in this document.

NEC does not assume any liability for infringement of patents, copyrights or other intellectual property rights of

third parties by or arising from the use of NEC semiconductor products listed in this document or any other

liability arising from the use of such products. No license, express, implied or otherwise, is granted under any

patents, copyrights or other intellectual property rights of NEC or others.

•

Descriptions of circuits, software and other related information in this document are provided for illustrative

purposes in semiconductor product operation and application examples. The incorporation of these

circuits, software and information in the design of customer's equipment shall be done under the full

responsibility of customer. NEC assumes no responsibility for any losses incurred by customers or third

parties arising from the use of these circuits, software and information.

While NEC endeavours to enhance the quality, reliability and safety of NEC semiconductor products, customers

agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To minimize

risks of damage to property or injury (including death) to persons arising from defects in NEC

semiconductor products, customers must incorporate sufficient safety measures in their design, such as

redundancy, fire-containment, and anti-failure features.

NEC semiconductor products are classified into the following three quality grades:

"Standard", "Special" and "Specific". The "Specific" quality grade applies only to semiconductor products

developed based on a customer-designated "quality assurance program" for a specific application. The

recommended applications of a semiconductor product depend on its quality grade, as indicated below.

Customers must check the quality grade of each semiconductor product before using it in a particular

application.

"Standard": Computers, office equipment, communications equipment, test and measurement equipment, audio

and visual equipment, home electronic appliances, machine tools, personal electronic equipment

and industrial robots

"Special": Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster

systems, anti-crime systems, safety equipment and medical equipment (not specifically designed

for life support)

"Specific": Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life

support systems and medical equipment for life support, etc.

The quality grade of NEC semiconductor products is "Standard" unless otherwise expressly specified in NEC's

data sheets or data books, etc. If customers wish to use NEC semiconductor products in applications not

intended by NEC, they must contact an NEC sales representative in advance to determine NEC's willingness

to support a given application.

(Note)

(1) "NEC" as used in this statement means NEC Corporation and also includes its majority-owned subsidiaries.

(2) "NEC semiconductor products" means any semiconductor product developed or manufactured by or for

NEC (as defined above).

M8E 00. 4


型号：	UPD8870CY
厂家：	NEC
描述：	暂无描述传感器图像传感器 CD
文件：	总24页 (文件大小：178K)
中文：	中文翻译
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