74AVC4T3144GU12-Q100 [NEXPERIA]
4-bit dual-supply buffer/level translator; 3-stateProduction;
| 型号： | 74AVC4T3144GU12-Q100 |
| 厂家： | 
Nexperia |
| 描述： | 4-bit dual-supply buffer/level translator; 3-stateProduction |
| 文件： | 总22页 (文件大小：277K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74AVC4T3144-Q100
4-bit dual-supply buffer/level translator; 3-state
Rev. 1 — 15 November 2019
Product data sheet
1. General description
The 74AVC4T3144-Q100 is a 4-bit, dual-supply level translating buffer with 3-state outputs. It
features four data inputs (An and B4), four data outputs (YBn and YA4), and an output enable
input (OE). The device is configured to translate three inputs from VCC(A) to VCC(B) and one input
from VCC(B) to VCC(A). OE, An and YA4 are referenced to VCC(A) and YBn and B4 are referenced to
VCC(B). A HIGH on OE causes the outputs to assume a high-impedance OFF-state.
The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry
disables outputs, preventing any damaging backflow current through the device when it is powered
down. In suspend mode when either VCC(A) or VCC(B) are at GND level, all outputs are in the high-
impedance OFF-state.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100
(Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
•
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Wide supply voltage range:
•
•
•
•
•
VCC(A): 0.8 V to 3.6 V
VCC(B): 0.8 V to 3.6 V
Complies with JEDEC standards:
•
•
•
•
•
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-B (2.7 V to 3.6 V)
•
•
ESD protection:
•
•
MIL-STD-883, method 3015 Class 3B exceeds 8000 V
HBM JESD22-A114E Class 3B exceeds 8000 V
Maximum data rates:
•
•
•
•
•
•
380 Mbit/s (≥ 1.8 V to 3.3 V translation)
200 Mbit/s (≥ 1.1 V to 3.3 V translation)
200 Mbit/s (≥ 1.1 V to 2.5 V translation)
200 Mbit/s (≥ 1.1 V to 1.8 V translation)
150 Mbit/s (≥ 1.1 V to 1.5 V translation)
100 Mbit/s (≥ 1.1 V to 1.2 V translation)
•
•
•
•
Suspend mode
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
IOFF circuitry provides partial Power-down mode operation
Nexperia
74AVC4T3144-Q100
4-bit dual-supply buffer/level translator; 3-state
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
Description
Version
74AVC4T3144GU12-Q100 -40 °C to +125 °C
XQFN12 plastic, extremely thin quad flat
package; no leads; 12 terminals;
body 1.70 x 2.0 x 0.50 mm
SOT1174-1
4. Marking
Table 2. Marking codes
Type number
Marking code
74AVC4T3144GU12-Q100
Bd
5. Functional diagram
YB1
YB2
YB3
B4
V
V
CC(B)
CC(A)
OE
A1
A2
A3
YA4
aaa-027040
Fig. 1. Logic symbol
©
74AVC4T3144_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 1 — 15 November 2019
2 / 22
Nexperia
74AVC4T3144-Q100
4-bit dual-supply buffer/level translator; 3-state
6. Pinning information
6.1. Pinning
74AVC4T3144
terminal 1
index area
V
1
2
3
4
5
11
V
CC(B)
CC(A)
A1
10 YB1
A2
A3
9
8
7
YB2
YB3
YA4
B4
aaa-027873
Transparent top view
Fig. 2. Pin configuration XQFN12 (SOT1174-1)
6.2. Pin description
Table 3. Pin description
Symbol
Pin
Description
VCC(A)
1
supply voltage A (A1, A2, A3, YA4 and OE pins are referenced to VCC(A))
A1, A2, A3, B4
GND
2, 3, 4, 7
data input
6
ground (0 V)
YB1, YB2, YB3, YA4
OE
10, 9, 8, 5
data output
12
11
output enable input (active LOW)
VCC(B)
supply voltage B (YB1, YB2, YB3 and B4 pins are referenced to VCC(B))
7. Functional description
Table 4. Function table [1][2]
Supply voltage
VCC(A), VCC(B)
0.8 V to 3.6 V
0.8 V to 3.6 V
0.8 V to 3.6 V
GND[3]
Input
OE
L
Input
Output
An, B4
YBn, YA4
L
L
L
H
X
Z
H
Z
Z
H
X
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
[2] The A1, A2, A3, YA4 and OE pins are referenced to VCC(A); The YB1, YB2, YB3 and B4 pins are referenced to VCC(B)
.
[3] If at least one of VCC(A) or VCC(B) is at GND level, the device goes into suspend mode.
©
74AVC4T3144_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 1 — 15 November 2019
3 / 22
Nexperia
74AVC4T3144-Q100
4-bit dual-supply buffer/level translator; 3-state
8. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
VCC(A)
VCC(B)
IIK
Parameter
Conditions
Min
-0.5
-0.5
-50
-0.5
-50
-0.5
-0.5
-
Max
+4.6
+4.6
-
Unit
V
supply voltage A
supply voltage B
input clamping current
input voltage
V
VI < 0 V
mA
V
VI
[1]
+4.6
-
IOK
output clamping current
output voltage
VO < 0 V
mA
VO
Active mode
[1][2][3]
[1]
VCCO + 0.5 V
Suspend or 3-state mode
VO = 0 V to VCCO
ICC(A) or ICC(B)
+4.6
±50
100
-
V
IO
output current
[2]
mA
mA
mA
°C
ICC
IGND
Tstg
Ptot
supply current
-
ground current
-100
-65
-
storage temperature
total power dissipation
+150
250
Tamb = -40 °C to +125 °C
mW
[1] The minimum input voltage ratings and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] VCCO is the supply voltage associated with the output port.
[3] VCCO + 0.5 V should not exceed 4.6 V.
9. Recommended operating conditions
Table 6. Recommended operating conditions
Symbol
VCC(A)
VCC(B)
VI
Parameter
Conditions
Min
0.8
0.8
0
Max
3.6
Unit
V
supply voltage A
supply voltage B
input voltage
3.6
V
3.6
V
VO
output voltage
Active mode
[1]
[2]
0
VCCO
3.6
V
Suspend or 3-state mode
0
V
Tamb
ambient temperature
-40
-
+125
10
°C
ns/V
Δt/ΔV
input transition rise and fall rate
VCCI =0.8 V to 3.6 V
[1] VCCO is the supply voltage associated with the output port.
[2] VCCI is the supply voltage associated with the input port.
©
74AVC4T3144_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 1 — 15 November 2019
4 / 22
Nexperia
74AVC4T3144-Q100
4-bit dual-supply buffer/level translator; 3-state
10. Static characteristics
Table 7. Typical static characteristics at Tamb = 25 °C[1][2]
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Typ
Max
Unit
VOH
HIGH-level
VI = VIH or VIL
output voltage
IO = -1.5 mA; VCC(A) = VCC(B) = 0.8 V
VI = VIH or VIL
IO = 1.5 mA; VCC(A) = VCC(B) = 0.8 V
-
0.69
-
V
VOL
LOW-level
output voltage
-
-
0.07
-
V
II
input leakage
current
OE input; VI = 0 V or 3.6 V;
VCC(A) = VCC(B) = 0.8 V to 3.6 V
±0.025
±0.25
μA
IOZ
OFF-state
output current
A or B port; VO = 0 V or VCCO
VCC(A) = VCC(B) = 3.6 V
;
-
-
-
-
-
-
-
±0.5
±0.5
±0.5
±0.1
±0.1
2.0
±2.5
±2.5
±2.5
±1
μA
μA
μA
μA
μA
pF
pF
suspend mode A port; VO = 0 V or VCCO
VCC(A) = 3.6 V; VCC(B) = 0 V
;
;
suspend mode B port; VO = 0 V or VCCO
VCC(A) = 0 V; VCC(B) = 3.6 V
IOFF
power-off
A port; VI or VO = 0 V to 3.6 V; VCC(A) = 0 V;
leakage current VCC(B) = 0.8 V to 3.6 V
B port; VI or VO = 0 V to 3.6 V; VCC(B) = 0 V;
VCC(A) = 0.8 V to 3.6 V
±1
CI
input
capacitance
OE input; VI = 0 V or 3.3 V;
VCC(A) = VCC(B) = 3.3 V
-
CI/O
input/output
capacitance
A and B port; VO = 3.3 V or 0 V;
VCC(A) = VCC(B) = 3.3 V
4.0
-
[1] VCCO is the supply voltage associated with the output port.
[2] VCCI is the supply voltage associated with the data input port.
Table 8. Static characteristics[1][2]
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
-40 °C to +85 °C
-40 °C to +125 °C
Unit
Min
Max
Min
Max
VIH
HIGH-level
data input
input voltage
VCCI = 0.8 V
0.70VCCI
0.65VCCI
1.6
-
-
-
-
0.70VCCI
0.65VCCI
1.6
-
-
-
-
V
V
V
V
VCCI = 1.1 V to 1.95 V
VCCI = 2.3 V to 2.7 V
VCCI = 3.0 V to 3.6 V
2
2
OE input
VCC(A) = 0.8 V
0.70VCC(A)
-
-
-
-
0.70VCC(A)
-
-
-
-
V
V
V
V
VCC(A) = 1.1 V to 1.95 V
VCC(A) = 2.3 V to 2.7 V
VCC(A) = 3.0 V to 3.6 V
0.65VCC(A)
0.65VCC(A)
1.6
2
1.6
2
©
74AVC4T3144_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 1 — 15 November 2019
5 / 22
Nexperia
74AVC4T3144-Q100
4-bit dual-supply buffer/level translator; 3-state
Symbol Parameter
Conditions
-40 °C to +85 °C
-40 °C to +125 °C
Unit
Min
Max
Min
Max
VIL
LOW-level
data input
input voltage
VCCI = 0.8 V
-
-
-
-
0.30VCCI
0.35VCCI
0.7
-
-
-
-
0.30VCCI
0.35VCCI
0.7
V
VCCI = 1.1 V to 1.95 V
VCCI = 2.3 V to 2.7 V
VCCI = 3.0 V to 3.6 V
V
V
V
0.8
0.8
OE input
VCC(A) = 0.8 V
-
-
-
-
0.30VCC(A)
0.35VCC(A)
0.7
-
-
-
-
0.30VCC(A)
0.35VCC(A)
0.7
V
V
V
V
VCC(A) = 1.1 V to 1.95 V
VCC(A) = 2.3 V to 2.7 V
VCC(A) = 3.0 V to 3.6 V
0.8
0.8
VOH
HIGH-level
VI = VIH or VIL
output voltage
IO = -100 μA;
VCC(A) = VCC(B) = 0.8 V to 3.6 V
VCCO - 0.1
0.85
-
-
-
-
-
-
VCCO - 0.1
0.85
-
-
-
-
-
-
V
V
V
V
V
V
IO = -3 mA;
VCC(A) = VCC(B) = 1.1 V
IO = -6 mA;
VCC(A) = VCC(B) = 1.4 V
1.05
1.05
IO = -8 mA;
VCC(A) = VCC(B) = 1.65 V
1.2
1.2
IO = -9 mA;
VCC(A) = VCC(B) = 2.3 V
1.75
1.75
IO = -12 mA;
2.3
2.3
VCC(A) = VCC(B) = 3.0 V
VOL
LOW-level
VI = VIH or VIL
output voltage
IO = 100 μA;
VCC(A) = VCC(B) = 0.8 V to 3.6 V
-
-
-
-
-
-
-
-
0.1
0.25
0.35
0.45
0.55
0.7
-
-
-
-
-
-
-
-
0.1
0.25
0.35
0.45
0.55
0.7
V
IO = 3 mA;
VCC(A) = VCC(B) = 1.1 V
V
IO = 6 mA;
VCC(A) = VCC(B) = 1.4 V
V
IO = 8 mA;
VCC(A) = VCC(B) = 1.65 V
V
IO = 9 mA;
VCC(A) = VCC(B) = 2.3 V
V
IO = 12 mA;
VCC(A) = VCC(B) = 3.0 V
V
II
input leakage
current
OE input; VI = 0 V or 3.6 V;
VCC(A) = VCC(B) = 0.8 V to 3.6 V
±1
±5
μA
μA
IOZ
OFF-state
A or B port;
±5
±30
output current
VO = 0 V or VCCO;
VCC(A) = VCC(B) = 3.6 V
suspend mode A port;
-
-
±5
±5
-
-
±30
±30
μA
μA
VO = 0 V or VCCO
;
VCC(A) = 3.6 V; VCC(B) = 0 V
suspend mode B port;
VO = 0 V or VCCO
;
VCC(A) = 0 V; VCC(B) = 3.6 V
©
74AVC4T3144_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 1 — 15 November 2019
6 / 22
Nexperia
74AVC4T3144-Q100
4-bit dual-supply buffer/level translator; 3-state
Symbol Parameter
Conditions
-40 °C to +85 °C
-40 °C to +125 °C
Unit
Min
Max
Min
Max
IOFF
power-off
leakage
current
A port; VI or VO = 0 V to 3.6 V;
VCC(A) = 0 V; VCC(B) = 0.8 V to 3.6 V
-
±5
-
±30
μA
μA
B port; VI or VO = 0 V to 3.6 V;
-
±5
-
±30
VCC(B) = 0 V; VCC(A) = 0.8 V to 3.6 V
ICC
supply current
A port; VI = 0 V or VCCI; IO = 0 A
VCC(A) = 0.8 V to 3.6 V;
VCC(B) = 0.8 V to 3.6 V
-
-
10
8
-
-
55
50
μA
μA
VCC(A) = 1.1 V to 3.6 V;
VCC(B) = 1.1 V to 3.6 V
VCC(A) = 3.6 V; VCC(B) = 0 V
VCC(A) = 0 V; VCC(B) = 3.6 V
B port; VI = 0 V or VCCI; IO = 0 A
-
8
-
-
50
-
μA
μA
-2
-12
VCC(A) = 0.8 V to 3.6 V;
VCC(B) = 0.8 V to 3.6 V
-
-
10
8
-
55
50
-
μA
μA
μA
μA
μA
VCC(A) = 1.1 V to 3.6 V;
VCC(B) = 1.1 V to 3.6 V
-
-12
-
VCC(A) = 3.6 V;
VCC(B) = 0 V
-2
-
-
VCC(A) = 0 V;
VCC(B) = 3.6 V
8
50
70
A plus B port (ICC(A) + ICC(B));
-
20
-
IO = 0 A; VI = 0 V or VCCI
VCC(A) = 0.8 V to 3.6 V;
VCC(B) = 0.8 V to 3.6 V
;
A plus B port (ICC(A) + ICC(B));
-
-
16
-
-
65
μA
μA
IO = 0 A; VI = 0 V or VCCI
VCC(A) = 1.1 V to 3.6 V;
VCC(B) = 1.1 V to 3.6 V
;
ΔICC
additional
VI = 3.0 V; VCC(A) = VCC(B) = 3.6 V
500
650
supply current
[1] VCCO is the supply voltage associated with the output port.
[2] VCCI is the supply voltage associated with the data input port.
Table 9. Typical total supply current (ICC(A) + ICC(B)
)
VCC(A)
VCC(B)
0 V
0
Unit
0.8 V
0.1
0.1
0.1
0.1
0.1
0.3
1.6
1.2 V
0.1
0.1
0.1
0.1
0.1
0.1
0.8
1.5 V
0.1
0.1
0.1
0.1
0.1
0.1
0.4
1.8 V
2.5 V
3.3 V
0.1
1.6
0.8
0.4
0.2
0.1
0.1
0 V
0.1
0.1
0.1
0.1
0.1
0.1
0.2
0.1
0.3
0.1
0.1
0.1
0.1
0.1
μA
μA
μA
μA
μA
μA
μA
0.8 V
1.2 V
1.5 V
1.8 V
2.5 V
3.3 V
0.1
0.1
0.1
0.1
0.1
0.1
©
74AVC4T3144_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 1 — 15 November 2019
7 / 22
Nexperia
74AVC4T3144-Q100
4-bit dual-supply buffer/level translator; 3-state
11. Dynamic characteristics
Table 10. Typical power dissipation capacitance at VCC(A) = VCC(B) and Tamb = 25 °C [1][2]
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
VCC(A) = VCC(B)
Unit
0.8 V
0.2
1.2 V
0.2
1.5 V
0.2
1.8 V
0.2
2.5 V
0.3
3.3 V
CPD
power dissipation inputs An, B4
0.5
pF
capacitance
outputs YBn, YA4
9.3
9.5
9.6
9.7
9.9
11.2 pF
[1] CPD is used to determine the dynamic power dissipation (PD in μW).
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ(CL x VCC2 x fo) = sum of the outputs.
[2] fi = 10 MHz; VI = GND to VCC; tr = tf = 1 ns; CL = 0 pF; RL = ∞ Ω.
Table 11. Typical dynamic characteristics at VCC(A) = 0.8 V and Tamb = 25 °C [1]
Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 5; for wave forms see Fig. 3 and Fig. 4
Symbol Parameter
Conditions
VCC(B)
1.5 V
Unit
0.8 V
14.5
14.5
14.3
17.0
18.2
19.2
1.2 V
7.3
1.8 V
6.2
2.5 V
5.9
3.3 V
tpd
tdis
ten
propagation
delay
An to YBn
B4 to YA4
OE to YBn
OE to YA4
OE to YBn
OE to YA4
6.5
12.4
14.3
9.0
6.0
12.0
14.3
9.7
ns
ns
ns
ns
ns
ns
12.7
14.3
9.9
12.3
14.3
9.4
12.1
14.3
9.0
disable time
enable time
18.2
10.7
18.2
9.8
18.2
9.6
18.2
9.7
18.2
10.2
[1] tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH
.
Table 12. Typical dynamic characteristics at VCC(B) = 0.8 V and Tamb = 25 °C [1]
Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 5; for wave forms see Fig. 3 and Fig. 4
Symbol Parameter
Conditions
VCC(A)
1.5 V
Unit
0.8 V
14.5
14.5
14.3
17.0
18.2
19.2
1.2 V
12.7
7.3
1.8 V
12.3
6.2
2.5 V
12.1
5.9
3.3 V
12.0
6.0
tpd
tdis
ten
propagation
delay
An to YBn
B4 to YA4
OE to YBn
OE to YA4
OE to YBn
OE to YA4
12.4
6.5
ns
ns
ns
ns
ns
ns
disable time
5.5
4.1
4.0
3.0
3.5
13.8
5.6
13.4
4.0
13.1
3.2
12.9
2.4
12.7
2.2
enable time
14.6
14.1
13.9
13.7
13.6
[1] tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH
.
©
74AVC4T3144_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 1 — 15 November 2019
8 / 22
Nexperia
74AVC4T3144-Q100
4-bit dual-supply buffer/level translator; 3-state
Table 13. Dynamic characteristics for temperature range -40 °C to +85 °C [1]
Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 5; for wave forms see Fig. 3 and Fig. 4
Symbol Parameter
Conditions
VCC(B)
Unit
1.2 V ±0.1 V 1.5 V ±0.1 V 1.8 V ±0.15 V 2.5 V ±0.2 V 3.3 V ±0.3 V
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
VCC(A) = 1.1 V to 1.3 V
tpd
tdis
ten
propagation An to YBn
2.0
2.0
2.0
2.0
2.0
2.0
10.5
10.5
10.0
11.1
13.5
15.0
1.3
1.5
2.0
2.0
2.0
2.0
7.8
9.9
1.2
1.5
2.0
1.0
2.0
2.0
6.9
9.7
1.0
1.4
2.0
0.7
2.0
1.0
5.9
9.4
0.8
1.4
2.0
1.0
2.0
1.0
5.7 ns
9.3 ns
10.0 ns
8.0 ns
13.5 ns
7.4 ns
delay
B4 to YA4
disable time OE to YBn
OE to YA4
10.0
8.6
10.0
8.0
10.0
7.0
enable time OE to YBn
OE to YA4
13.5
11.0
13.5
9.4
13.5
7.8
VCC(A) = 1.4 V to 1.6 V
tpd
tdis
ten
propagation An to YBn
delay
1.5
1.3
1.0
2.0
1.0
2.0
9.9
7.8
1.0
1.0
1.0
1.5
1.0
1.4
7.1
7.1
6.0
7.5
7.5
7.9
1.0
0.9
1.0
0.9
1.0
1.3
6.0
6.9
6.0
7.2
7.5
7.7
0.5
0.8
1.0
0.4
1.0
1.1
4.8
6.6
6.0
6.2
7.5
6.4
0.5
0.6
1.0
0.4
1.0
1.1
4.3 ns
6.5 ns
6.0 ns
6.1 ns
7.5 ns
5.6 ns
B4 to YA4
disable time OE to YBn
OE to YA4
6.0
10.2
7.5
enable time OE to YBn
OE to YA4
14.4
VCC(A) = 1.65 V to 1.95 V
tpd
tdis
ten
propagation An to YBn
delay
1.5
1.2
0.5
2.0
1.0
1.5
9.7
6.9
0.9
1.0
0.5
1.5
1.0
1.2
6.9
6.0
5.7
7.0
6.7
7.2
0.8
0.8
0.5
0.8
1.0
1.2
5.7
5.7
5.7
6.9
6.7
6.9
0.5
0.5
0.5
0.2
1.0
0.8
4.5
5.5
5.7
5.8
6.7
5.4
0.3
0.5
0.5
0.2
1.0
0.6
4.0 ns
5.3 ns
5.7 ns
5.9 ns
6.7 ns
5.0 ns
B4 to YA4
disable time OE to YBn
OE to YA4
5.7
9.9
enable time OE to YBn
OE to YA4
6.7
13.9
VCC(A) = 2.3 V to 2.7 V
tpd
tdis
ten
propagation An to YBn
delay
1.4
1.0
0.2
2.0
0.6
1.5
9.4
5.9
0.8
0.5
0.2
1.5
0.6
1.0
6.6
4.8
4.0
6.7
4.5
6.8
0.5
0.5
0.2
0.7
0.6
1.0
5.5
4.5
4.0
6.3
4.5
6.0
0.4
0.4
0.2
0.2
0.6
0.8
4.2
4.2
4.0
5.0
4.5
4.6
0.2
0.3
0.2
0.2
0.6
0.6
3.7 ns
3.9 ns
4.0 ns
5.7 ns
4.5 ns
4.2 ns
B4 to YA4
disable time OE to YBn
OE to YA4
4.0
9.3
enable time OE to YBn
OE to YA4
4.5
13.6
VCC(A) = 3.0 V to 3.6 V
tpd
tdis
ten
propagation An to YBn
delay
1.4
0.8
0.2
2.0
0.5
1.5
9.3
5.7
0.6
0.5
0.2
1.5
0.5
1.0
6.5
4.3
4.5
6.4
4.0
6.7
0.5
0.3
0.2
0.7
0.5
1.0
5.3
4.0
4.5
6.1
4.0
5.9
0.3
0.2
0.2
0.2
0.5
0.7
3.9
3.7
4.5
4.8
4.0
4.4
0.2
0.2
0.2
0.2
0.5
0.5
3.5 ns
3.5 ns
4.5 ns
5.6 ns
4.0 ns
4.0 ns
B4 to YA4
disable time OE to YBn
OE to YA4
4.5
9.0
enable time OE to YBn
OE to YA4
4.0
13.4
[1] tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH
.
©
74AVC4T3144_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 1 — 15 November 2019
9 / 22
Nexperia
74AVC4T3144-Q100
4-bit dual-supply buffer/level translator; 3-state
Table 14. Dynamic characteristics for temperature range -40 °C to +125 °C [1]
Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 5; for wave forms see Fig. 3 and Fig. 4
Symbol Parameter
Conditions
VCC(B)
Unit
1.2 V ±0.1 V 1.5 V ±0.1 V 1.8 V ±0.15 V 2.5 V ±0.2 V 3.3 V ±0.3 V
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
VCC(A) = 1.1 V to 1.3 V
tpd
tdis
ten
propagation An to YBn
2.0
2.0
2.0
2.0
2.0
2.0
12.1
12.1
11.5
12.8
15.6
17.3
1.3
1.5
2.0
2.0
2.0
2.0
9.0
11.4
11.5
9.9
1.2
1.5
2.0
1.0
2.0
2.0
8.0
11.2
11.5
9.2
1.0
1.4
2.0
0.7
2.0
1.0
6.8
10.9
11.5
8.1
0.8
1.4
2.0
1.0
2.0
1.0
6.6 ns
10.7 ns
11.5 ns
9.2 ns
15.6 ns
8.6 ns
delay
B4 to YA4
disable time OE to YBn
OE to YA4
enable time OE to YBn
OE to YA4
15.6
12.7
15.6
10.9
15.6
9.0
VCC(A) = 1.4 V to 1.6 V
tpd
tdis
ten
propagation An to YBn
delay
1.5
1.3
1.0
2.0
1.0
2.0
11.4
9.0
1.0
1.0
1.0
1.5
1.0
1.4
8.2
8.2
6.9
8.7
8.7
9.1
1.0
0.9
1.0
0.9
1.0
1.3
6.9
8.0
6.9
8.3
8.7
8.9
0.5
0.8
1.0
0.4
1.0
1.1
5.6
7.6
6.9
7.2
8.7
7.4
0.5
0.6
1.0
0.4
1.0
1.1
5.0 ns
7.5 ns
6.9 ns
7.1 ns
8.7 ns
6.5 ns
B4 to YA4
disable time OE to YBn
OE to YA4
6.9
11.8
8.7
enable time OE to YBn
OE to YA4
16.6
VCC(A) = 1.65 V to 1.95 V
tpd
tdis
ten
propagation An to YBn
delay
1.5
1.2
0.5
2.0
1.0
1.5
11.2
8.0
0.9
1.0
0.5
1.5
1.0
1.2
8.0
6.9
6.6
8.1
7.8
8.3
0.8
0.8
0.5
0.8
1.0
1.2
6.6
6.6
6.6
8.0
7.8
8.0
0.5
0.5
0.5
0.2
1.0
0.8
5.2
6.4
6.6
6.7
7.8
6.3
0.3
0.5
0.5
0.2
1.0
0.6
4.6 ns
6.1 ns
6.6 ns
6.8 ns
7.8 ns
5.8 ns
B4 to YA4
disable time OE to YBn
OE to YA4
6.6
11.4
7.8
enable time OE to YBn
OE to YA4
16.0
VCC(A) = 2.3 V to 2.7 V
tpd
tdis
ten
propagation An to YBn
delay
1.4
1.0
0.2
2.0
0.6
1.5
10.9
6.8
0.8
0.5
0.2
1.5
0.6
1.0
7.6
5.6
4.6
7.8
5.2
7.9
0.5
0.5
0.2
0.7
0.6
1.0
6.4
5.2
4.6
7.3
5.2
6.9
0.4
0.4
0.2
0.2
0.6
0.8
4.9
4.9
4.6
5.8
5.2
5.3
0.2
0.3
0.2
0.2
0.6
0.6
4.3 ns
4.5 ns
4.6 ns
6.6 ns
5.2 ns
4.9 ns
B4 to YA4
disable time OE to YBn
OE to YA4
4.6
10.7
5.2
enable time OE to YBn
OE to YA4
15.7
VCC(A) = 3.0 V to 3.6 V
tpd
tdis
ten
propagation An to YBn
delay
1.4
0.8
0.2
2.0
0.5
1.5
10.7
6.6
0.6
0.5
0.2
1.5
0.5
1.0
7.5
5.0
5.2
7.4
4.6
7.8
0.5
0.3
0.2
0.7
0.5
1.0
6.1
4.6
5.2
7.1
4.6
6.8
0.3
0.2
0.2
0.2
0.5
0.7
4.5
4.3
5.2
5.6
4.6
5.1
0.2
0.2
0.2
0.2
0.5
0.5
4.1 ns
4.1 ns
5.2 ns
6.5 ns
4.6 ns
4.6 ns
B4 to YA4
disable time OE to YBn
OE to YA4
5.2
10.4
4.6
enable time OE to YBn
OE to YA4
15.5
[1] tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH
.
©
74AVC4T3144_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 1 — 15 November 2019
10 / 22
Nexperia
74AVC4T3144-Q100
4-bit dual-supply buffer/level translator; 3-state
11.1. Waveforms and test circuit
V
I
An, B4 input
GND
V
V
M
M
t
t
PHL
PLH
V
OH
V
V
YBn, YA4 output
M
M
V
OL
aaa-027042
Measurement points are given in Table 15.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 3. The data input (An, B4) to output (YBn, YA4) propagation delay times
V
I
V
OE input
M
GND
t
t
PZL
PLZ
V
CCO
output
LOW-to-OFF
OFF-to-LOW
V
M
V
OL
t
t
PZH
PHZ
V
OH
V
Y
output
V
HIGH-to-OFF
OFF-to-HIGH
M
GND
outputs
enabled
outputs
disabled
outputs
enabled
001aao075
Measurement points are given in Table 15.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 4. Enable and disable times
Table 15. Measurement points
Supply voltage
VCC(A), VCC(B)
0.8 V to 1.6 V
1.65 V to 2.7 V
3.0 V to 3.6 V
Input[1]
VM
Output[2]
VM
VX
VY
0.5VCCI
0.5VCCI
0.5VCCI
0.5VCCO
0.5VCCO
0.5VCCO
VOL + 0.1 V
VOL + 0.15 V
VOL + 0.3 V
VOH - 0.1 V
VOH - 0.15 V
VOH - 0.3 V
[1] VCCI is the supply voltage associated with the data input port.
[2] VCCO is the supply voltage associated with the output port.
©
74AVC4T3144_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 1 — 15 November 2019
11 / 22
Nexperia
74AVC4T3144-Q100
4-bit dual-supply buffer/level translator; 3-state
t
W
V
I
90 %
negative
pulse
V
V
V
M
M
10 %
0 V
t
t
r
f
t
t
f
r
V
I
90 %
positive
pulse
V
M
M
10 %
0 V
t
W
V
EXT
R
V
CC
L
V
V
O
I
G
DUT
R
T
C
L
R
L
001aae331
Test data is given in Table 16 .
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance.
VEXT = External voltage for measuring switching times.
Fig. 5. Test circuit for measuring switching times
Table 16. Test data
Supply voltage Input
Load
CL
VEXT
VCC(A), VCC(B)
VI[1]
Δt/ΔV[2]
RL
tPLH, tPHL
open
tPZH, tPHZ
GND
tPZL, tPLZ[3]
2VCCO
0.8 V to 1.6 V
VCCI
≤ 1.0 ns/V
≤ 1.0 ns/V
≤ 1.0 ns/V
15 pF
15 pF
15 pF
2 kΩ
2 kΩ
2 kΩ
1.65 V to 2.7 V VCCI
3.0 V to 3.6 V VCCI
open
GND
2VCCO
open
GND
2VCCO
[1] VCCI is the supply voltage associated with the data input port.
[2] dV/dt ≥ 1.0 V/ns
[3] VCCO is the supply voltage associated with the output port.
©
74AVC4T3144_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 1 — 15 November 2019
12 / 22
Nexperia
74AVC4T3144-Q100
4-bit dual-supply buffer/level translator; 3-state
11.2. Typical propagation delay characteristics
aaa-027875
aaa-027876
25
25
20
15
10
5
t
t
PLH
(ns)
PHL
(ns)
20
15
10
5
(1)
(2)
(6)
(3)
(5)
(4)
(1)
(2)
(3)
(4)
(5)
(6)
0
10
20
30
40
50
(pF)
60
0
10
20
30
40
50
(pF)
60
C
L
C
L
a. HIGH to LOW propagation delay (An to YBn)
b. LOW to HIGH propagation delay (An to YBn)
aaa-027877
aaa-027878
25
25
t
t
PLH
PHL
(ns)
(ns)
20
15
10
5
20
15
10
5
(1)
(2)
(3)
(4)
(5)
(6)
(1)
(2)
(3)
(4)
(6)
(5)
0
10
20
30
40
50
(pF)
60
0
10
20
30
40
50
(pF)
60
C
L
C
L
c. HIGH to LOW propagation delay (B4 to YA4)
d. LOW to HIGH propagation delay (B4 to YA4)
(1) VCC(B) = 0.8 V
(2) VCC(B) = 1.2 V
(3) VCC(B) = 1.5 V
(4) VCC(B) = 1.8 V
(5) VCC(B) = 2.5 V
(6) VCC(B) = 3.3 V
Fig. 6. Typical propagation delay versus load capacitance; Tamb = 25 °C; VCC(A) = 0.8 V
©
74AVC4T3144_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 1 — 15 November 2019
13 / 22
Nexperia
74AVC4T3144-Q100
4-bit dual-supply buffer/level translator; 3-state
aaa-027879
aaa-027880
10
10
t
t
PLH
PHL
(ns)
(ns)
8
6
4
2
0
8
6
4
2
0
(1)
(2)
(3)
(4)
(5)
(1)
(2)
(3)
(4)
(5)
0
10
20
30
40
50
(pF)
60
0
10
20
30
40
50
(pF)
60
C
L
C
L
a. HIGH to LOW propagation delay (An to YBn)
b. LOW to HIGH propagation delay (An to YBn)
aaa-027881
aaa-027882
8
8
t
t
PLH
PHL
(ns)
(ns)
7
6
5
4
3
2
7
6
5
4
3
2
(1)
(2)
(3)
(4)
(5)
(1)
(2)
(3)
(4)
(5)
0
10
20
30
40
50
(pF)
60
0
10
20
30
40
50
(pF)
60
C
L
C
L
c. HIGH to LOW propagation delay (B4 to YA4)
d. LOW to HIGH propagation delay (B4 to YA4)
(1) VCC(B) = 1.2 V
(2) VCC(B) = 1.5 V
(3) VCC(B) = 1.8 V
(4) VCC(B) = 2.5 V
(5) VCC(B) = 3.3 V
Fig. 7. Typical propagation delay versus load capacitance; Tamb = 25 °C; VCC(A) = 1.2 V
©
74AVC4T3144_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 1 — 15 November 2019
14 / 22
Nexperia
74AVC4T3144-Q100
4-bit dual-supply buffer/level translator; 3-state
aaa-027883
aaa-027884
8
8
t
t
PLH
PHL
(ns)
(ns)
6
4
2
0
6
4
2
0
(1)
(2)
(3)
(4)
(5)
(1)
(2)
(3)
(4)
(5)
0
10
20
30
40
50
(pF)
60
0
10
20
30
40
50
(pF)
60
C
L
C
L
a. HIGH to LOW propagation delay (An to YBn)
b. LOW to HIGH propagation delay (An to YBn)
aaa-027885
aaa-027886
6
6
t
t
PLH
PHL
(ns)
(ns)
5
4
3
2
5
4
3
2
(1)
(2)
(3)
(4)
(5)
(1)
(2)
(3)
(5)
(4)
0
10
20
30
40
50
(pF)
60
0
10
20
30
40
50
(pF)
60
C
L
C
L
c. HIGH to LOW propagation delay (B4 to YA4)
d. LOW to HIGH propagation delay (B4 to YA4)
(1) VCC(B) = 1.2 V
(2) VCC(B) = 1.5 V
(3) VCC(B) = 1.8 V
(4) VCC(B) = 2.5 V
(5) VCC(B) = 3.3 V
Fig. 8. Typical propagation delay versus load capacitance; Tamb = 25 °C; VCC(A) = 1.5 V
©
74AVC4T3144_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 1 — 15 November 2019
15 / 22
Nexperia
74AVC4T3144-Q100
4-bit dual-supply buffer/level translator; 3-state
aaa-027887
aaa-027888
6
7
t
t
PLH
PHL
(ns)
(ns)
5
4
3
2
1
0
6
5
4
3
2
1
(1)
(2)
(3)
(4)
(5)
(1)
(2)
(3)
(4)
(5)
0
10
20
30
40
50
(pF)
60
0
10
20
30
40
50
(pF)
60
C
L
C
L
a. HIGH to LOW propagation delay (An to YBn)
b. LOW to HIGH propagation delay (An to YBn)
aaa-027889
aaa-027890
5
5
t
t
PLH
PHL
(ns)
(ns)
4.5
4
4.5
4
(1)
(2)
(3)
(4)
(5)
3.5
3
3.5
3
(1)
(2)
(3)
(5)
(4)
2.5
2
2.5
2
0
10
20
30
40
50
(pF)
60
0
10
20
30
40
50
(pF)
60
C
L
C
L
c. HIGH to LOW propagation delay (B4 to YA4)
d. LOW to HIGH propagation delay (B4 to YA4)
(1) VCC(B) = 1.2 V
(2) VCC(B) = 1.5 V
(3) VCC(B) = 1.8 V
(4) VCC(B) = 2.5 V
(5) VCC(B) = 3.3 V
Fig. 9. Typical propagation delay versus load capacitance; Tamb = 25 °C; VCC(A) = 1.8 V
©
74AVC4T3144_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 1 — 15 November 2019
16 / 22
Nexperia
74AVC4T3144-Q100
4-bit dual-supply buffer/level translator; 3-state
aaa-027891
aaa-027892
7
7
t
t
PLH
PHL
(ns)
(ns)
6
5
4
3
2
1
6
5
4
3
2
1
(1)
(2)
(3)
(4)
(5)
(1)
(2)
(3)
(4)
(5)
0
10
20
30
40
50
(pF)
60
0
10
20
30
40
50
(pF)
60
C
L
C
L
a. HIGH to LOW propagation delay (An to YBn)
b. LOW to HIGH propagation delay (An to YBn)
aaa-027893
aaa-027894
5
5
t
t
PLH
PHL
(ns)
(ns)
4
3
2
1
4
3
2
1
(1)
(2)
(3)
(4)
(5)
(1)
(2)
(3)
(4)
(5)
0
10
20
30
40
50
(pF)
60
0
10
20
30
40
50
(pF)
60
C
L
C
L
c. HIGH to LOW propagation delay (B4 to YA4)
d. LOW to HIGH propagation delay (B4 to YA4)
(1) VCC(B) = 1.2 V
(2) VCC(B) = 1.5 V
(3) VCC(B) = 1.8 V
(4) VCC(B) = 2.5 V
(5) VCC(B) = 3.3 V
Fig. 10. Typical propagation delay versus load capacitance; Tamb = 25 °C; VCC(A) = 2.5 V
©
74AVC4T3144_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 1 — 15 November 2019
17 / 22
Nexperia
74AVC4T3144-Q100
4-bit dual-supply buffer/level translator; 3-state
aaa-027895
aaa-027896
7
7
t
t
PLH
PHL
(ns)
(ns)
6
5
4
3
2
1
6
5
4
3
2
1
(1)
(2)
(3)
(4)
(5)
(1)
(2)
(3)
(4)
(5)
0
10
20
30
40
50
(pF)
60
0
10
20
30
40
50
(pF)
60
C
L
C
L
a. HIGH to LOW propagation delay (An to YBn)
b. LOW to HIGH propagation delay (An to YBn)
aaa-027897
aaa-027898
5
5
t
t
PLH
PHL
(ns)
(ns)
4
3
2
1
4
3
2
1
(1)
(2)
(3)
(4)
(5)
(1)
(2)
(3)
(4)
(5)
0
10
20
30
40
50
(pF)
60
0
10
20
30
40
50
(pF)
60
C
L
C
L
c. HIGH to LOW propagation delay (B4 to YA4)
d. LOW to HIGH propagation delay (B4 to YA4)
(1) VCC(B) = 1.2 V
(2) VCC(B) = 1.5 V
(3) VCC(B) = 1.8 V
(4) VCC(B) = 2.5 V
(5) VCC(B) = 3.3 V
Fig. 11. Typical propagation delay versus load capacitance; Tamb = 25 °C; VCC(A) = 3.3 V
©
74AVC4T3144_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 1 — 15 November 2019
18 / 22
Nexperia
74AVC4T3144-Q100
4-bit dual-supply buffer/level translator; 3-state
12. Package outline
XQFN12: plastic, extremely thin quad flat package; no leads;
12 terminals; body 1.70 x 2.00 x 0.50 mm
SOT1174-1
X
B
A
E
D
terminal 1
index area
A
A
1
A
3
detail X
C
B
∅v
∅w
C A
C
b
y
1
y
C
5
1
7
e
1
e
11
terminal 1
index area
L
1
L
0
1
2 mm
scale
Dimensions
(1)
Unit
A
A
A
b
D
E
e
e
1
L
L
1
v
w
y
y
1
1
3
max 0.5 0.05
mm nom
min
0.25 1.8 2.1
0.127 0.20 1.7 2.0
0.15 1.6 1.9
0.55
0.4
1.6 0.50 0.15 0.1 0.05 0.05 0.05
0.45
0.00
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
sot1174-1_po
Issue date
References
Outline
version
European
projection
IEC
- - -
JEDEC
MO-288
JEITA
- - -
10-04-07
10-04-21
SOT1174-1
Fig. 12. Package outline SOT1174-1 (XQFN12)
©
74AVC4T3144_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 1 — 15 November 2019
19 / 22
Nexperia
74AVC4T3144-Q100
4-bit dual-supply buffer/level translator; 3-state
13. Abbreviations
Table 17. Abbreviations
Acronym
CDM
Description
Charged Device Model
Complementary Metal Oxide Semiconductor
Device Under Test
CMOS
DUT
ESD
ElectroStatic Discharge
Human Body Model
HBM
MM
Machine Model
14. Revision history
Table 18. Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
74AVC4T3144_Q100 v.1 20191115
Product data sheet
-
-
©
74AVC4T3144_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 1 — 15 November 2019
20 / 22
Nexperia
74AVC4T3144-Q100
4-bit dual-supply buffer/level translator; 3-state
equipment, nor in applications where failure or malfunction of an Nexperia
product can reasonably be expected to result in personal injury, death or
severe property or environmental damage. Nexperia and its suppliers accept
no liability for inclusion and/or use of Nexperia products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
15. Legal information
Data sheet status
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Document status Product
Definition
[1][2]
status [3]
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
Objective [short]
data sheet
Development
This document contains data from
the objective specification for
product development.
Preliminary [short]
data sheet
Qualification
Production
This document contains data from
the preliminary specification.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia accepts no liability for
any assistance with applications or customer product design. It is customer’s
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and fit for the customer’s applications and products planned, as well as
for the planned application and use of customer’s third party customer(s).
Customers should provide appropriate design and operating safeguards to
minimize the risks associated with their applications and products.
Product [short]
data sheet
This document contains the product
specification.
[1] Please consult the most recently issued document before initiating or
completing a design.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the internet at https://www.nexperia.com.
Nexperia does not accept any liability related to any default, damage, costs
or problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party
customer(s). Customer is responsible for doing all necessary testing for the
customer’s applications and products using Nexperia products in order to
avoid a default of the applications and the products or of the application or
use by customer’s third party customer(s). Nexperia does not accept any
liability in this respect.
Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the relevant
full data sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Terms and conditions of commercial sale — Nexperia products are
sold subject to the general terms and conditions of commercial sale, as
published at http://www.nexperia.com/profile/terms, unless otherwise agreed
in a valid written individual agreement. In case an individual agreement is
concluded only the terms and conditions of the respective agreement shall
apply. Nexperia hereby expressly objects to applying the customer’s general
terms and conditions with regard to the purchase of Nexperia products by
customer.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and customer have explicitly
agreed otherwise in writing. In no event however, shall an agreement be
valid in which the Nexperia product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Disclaimers
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
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Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no responsibility
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Translations — A non-English (translated) version of a document is for
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between the translated and English versions.
In no event shall Nexperia be liable for any indirect, incidental, punitive,
special or consequential damages (including - without limitation - lost
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or replacement of any products or rework charges) whether or not such
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Trademarks
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards customer
for the products described herein shall be limited in accordance with the
Terms and conditions of commercial sale of Nexperia.
Right to make changes — Nexperia reserves the right to make changes
to information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
Suitability for use in automotive applications — This Nexperia product
has been qualified for use in automotive applications. Unless otherwise
agreed in writing, the product is not designed, authorized or warranted to
be suitable for use in life support, life-critical or safety-critical systems or
©
74AVC4T3144_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 1 — 15 November 2019
21 / 22
Nexperia
74AVC4T3144-Q100
4-bit dual-supply buffer/level translator; 3-state
Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Ordering information....................................................2
4. Marking..........................................................................2
5. Functional diagram.......................................................2
6. Pinning information......................................................3
6.1. Pinning.........................................................................3
6.2. Pin description.............................................................3
7. Functional description................................................. 3
8. Limiting values............................................................. 4
9. Recommended operating conditions..........................4
10. Static characteristics..................................................5
11. Dynamic characteristics.............................................8
11.1. Waveforms and test circuit.......................................11
11.2. Typical propagation delay characteristics.................13
12. Package outline........................................................ 19
13. Abbreviations............................................................20
14. Revision history........................................................20
15. Legal information......................................................21
© Nexperia B.V. 2019. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 15 November 2019
©
74AVC4T3144_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 1 — 15 November 2019
22 / 22
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