PSMN0R7-25YLD [NEXPERIA]
N-channel 25 V, 0.72 mΩ, 300 A logic level MOSFET in LFPAK56 using NextPowerS3 TechnologyProduction;型号: | PSMN0R7-25YLD |
厂家: | Nexperia |
描述: | N-channel 25 V, 0.72 mΩ, 300 A logic level MOSFET in LFPAK56 using NextPowerS3 TechnologyProduction 开关 脉冲 晶体管 |
文件: | 总14页 (文件大小:273K) |
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PSMN0R7-25YLD
N-channel 25 V, 0.72 mΩ, 300 A logic level MOSFET in
LFPAK56 using NextPowerS3 Technology
25 July 2017
Product data sheet
1. General description
Logic level gate drive N-channel enhancement mode MOSFET in LFPAK56 package.
NextPowerS3 portfolio utilising NXP's unique "SchottkyPlus" technology delivers high efficiency,
low spiking performance usually associated with MOSFETS with an integrated Schottky or
Schottky-like diode but without problematic high leakage current. NextPowerS3 is particularly
suited to high efficiency applications at high switching frequencies.
2. Features and benefits
•
100% Avalanche tested at I(AS) = 190 A
•
Ultra low QG, QGD and QOSS for high system efficiency, especially at higher switching
frequencies
•
•
•
•
•
•
Superfast switching with soft-recovery
Low spiking and ringing for low EMI designs
Unique "SchottkyPlus" technology; Schottky-like performance with < 1 μA leakage at 25 °C
Optimised for 4.5 V gate drive
Low parasitic inductance and resistance
High reliability clip bonded and solder die attach Power SO8 package; no glue, no wire bonds,
qualified to 150 °C
•
Wave solderable; exposed leads for optimal visual solder inspection
3. Applications
•
•
•
•
•
•
•
On-board DC:DC solutions for server and telecommunications
Secondary-side synchronous rectification in telecommunication applications
Voltage regulator modules (VRM)
Point-of-Load (POL) modules
Power delivery for V-core, ASIC, DDR, GPU, VGA and system components
Brushed and brushless motor control
Power OR-ing
4. Quick reference data
Table 1. Quick reference data
Symbol
VDS
Parameter
Conditions
Min
Typ
Max
25
Unit
V
drain-source voltage
drain current
25 °C ≤ Tj ≤ 150 °C
VGS = 10 V; Tmb = 25 °C; Fig. 2
-
-
-
-
-
-
ID
[1]
300
158
A
Ptot
total power dissipation Tmb = 25 °C; Fig. 1
W
Static characteristics
RDSon drain-source on-state
resistance
VGS = 4.5 V; ID = 25 A; Tj = 25 °C;
Fig. 10
-
0.76
0.92
mΩ
Nexperia
PSMN0R7-25YLD
N-channel 25 V, 0.72 mΩ, 300 A logic level MOSFET in LFPAK56 using NextPowerS3 Technology
Symbol
Dynamic characteristics
QGD gate-drain charge
Parameter
Conditions
Min
Typ
Max
Unit
ID = 25 A; VDS = 12 V; VGS = 4.5 V;
Fig. 12; Fig. 13
-
11.9
-
nC
[1] 300A continuous current has been successfully demonstrated during application tests. Practically the current will be limited by PCB
thermal design and operating temperature
5. Pinning information
Table 2. Pinning information
Pin
1
Symbol Description
Simplified outline
Graphic symbol
S
S
S
G
D
source
source
source
Gate
D
S
2
G
3
4
mbb076
mb
mounting base; connected to
drain
1
2
3
4
LFPAK56; Power-
SO8 (SOT1023)
6. Ordering information
Table 3. Ordering information
Type number
Package
Name
Description
Version
PSMN0R7-25YLD
LFPAK56;
Power-SO8
Plastic single-ended surface-mounted package (LFPAK56); 4
leads
SOT1023
7. Marking
Table 4. Marking codes
Type number
Marking code
PSMN0R7-25YLD
0D725L
8. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
VDS
Parameter
Conditions
Min
Max
Unit
drain-source voltage
drain-gate voltage
gate-source voltage
25 °C ≤ Tj ≤ 150 °C
25 °C ≤ Tj ≤ 150 °C; RGS = 20 kΩ
-
25
25
20
V
V
V
VDGR
VGS
-
-20
©
PSMN0R7-25YLD
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2017. All rights reserved
Product data sheet
25 July 2017
2 / 14
Nexperia
PSMN0R7-25YLD
N-channel 25 V, 0.72 mΩ, 300 A logic level MOSFET in LFPAK56 using NextPowerS3 Technology
Symbol
Ptot
Parameter
Conditions
Min
Max
158
300
235
1482
150
150
260
Unit
W
A
total power dissipation
drain current
Tmb = 25 °C; Fig. 1
-
ID
VGS = 10 V; Tmb = 25 °C; Fig. 2
VGS = 10 V; Tmb = 100 °C
pulsed; tp ≤ 10 µs; Tmb = 25 °C; Fig. 3
[1]
-
-
A
IDM
peak drain current
storage temperature
junction temperature
-
A
Tstg
Tj
-55
-55
-
°C
°C
°C
Tsld(M)
peak soldering
temperature
VESD
electrostatic discharge
voltage
HBM
2
-
kV
Source-drain diode
IS
source current
peak source current
Tmb = 25 °C
-
-
132
A
A
ISM
pulsed; tp ≤ 10 µs; Tmb = 25 °C
1482
Avalanche ruggedness
EDS(AL)S non-repetitive drain-
ID = 300 A; Vsup ≤ 25 V; RGS = 50 Ω;
VGS = 10 V; Tj(init) = 25 °C; unclamped;
tp = 36 µs
-
-
174
190
mJ
A
source avalanche
energy
IAS
non-repetitive avalanche Vsup ≤ 25 V; VGS = 10 V; Tj(init) = 25 °C;
current RGS = 50 Ω
[2]
[1] 300A continuous current has been successfully demonstrated during application tests. Practically the current will be limited by PCB
thermal design and operating temperature
[2] Protected by 100% test
aaa-021686
03ne36
400
300
200
100
0
120
I
D
(A)
Pder
(%)
(1)
80
40
0
0
50
100
150
200
0
25
50
75
100
125
T
150
(°C)
175
°
Tmb ( C)
mb
VGS ≥ 10 V
(1) 300A continuous current has been successfully
demonstrated during application tests. Practically
the current will be limited by PCB thermal design
and operating temperature
Fig. 1. Normalized total power dissipation as a
function of mounting base temperature
Fig. 2. Continuous drain current as a function of
mounting base temperature
©
PSMN0R7-25YLD
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2017. All rights reserved
Product data sheet
25 July 2017
3 / 14
Nexperia
PSMN0R7-25YLD
N-channel 25 V, 0.72 mΩ, 300 A logic level MOSFET in LFPAK56 using NextPowerS3 Technology
aaa-021688
4
3
2
10
10
10
I
D
(A)
Limit R
= V / I
DS D
DSon
t
= 10 us
p
100 us
1 ms
10
DC
10 ms
100 ms
1
-1
10
-1
2
10
1
10
10
V
(V)
DS
Tmb = 25 °C; IDM is a single pulse
Fig. 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage
9. Thermal characteristics
Table 6. Thermal characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Rth(j-mb)
thermal resistance
from junction to
mounting base
Fig. 4
-
0.59
0.79
K/W
Rth(j-a)
thermal resistance
from junction to
ambient
Fig. 5
Fig. 6
-
-
50
-
-
K/W
K/W
125
aaa-021689
1
Z
th(j-mb)
δ = 0.5
(K/W)
0.2
-1
10
0.1
0.05
0.02
-2
-3
-4
10
10
10
t
single shot
p
P
δ =
T
t
t
p
T
-6
-5
-4
-3
-2
-1
10
10
10
10
10
10
1
t
(s)
p
Fig. 4. Transient thermal impedance from junction to mounting base as a function of pulse duration
©
PSMN0R7-25YLD
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2017. All rights reserved
Product data sheet
25 July 2017
4 / 14
Nexperia
PSMN0R7-25YLD
N-channel 25 V, 0.72 mΩ, 300 A logic level MOSFET in LFPAK56 using NextPowerS3 Technology
aaa-005750
aaa-005751
Fig. 5. PCB layout for thermal impedance junction to
ambient 1" square pad; FR4 Board; 2oz copper
Fig. 6. PCB layout for thermal resistance junction to
ambient minimum footprint; FR4 Board; 2oz
copper
10. Characteristics
Table 7. Characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Static characteristics
V(BR)DSS
drain-source
breakdown voltage
ID = 250 µA; VGS = 0 V; Tj = 25 °C
ID = 250 µA; VGS = 0 V; Tj = -55 °C
25
-
-
V
V
V
22.5
1.2
-
-
VGS(th)
gate-source threshold ID = 1 mA; VDS = VGS; Tj = 25 °C
voltage
1.66
2.2
ΔVGS(th)/ΔT
gate-source threshold 25 °C ≤ Tj ≤ 150 °C
voltage variation with
-
-5.1
-
mV/K
temperature
IDSS
drain leakage current
gate leakage current
VDS = 20 V; VGS = 0 V; Tj = 25 °C
VDS = 20 V; VGS = 0 V; Tj = 125 °C
VGS = 20 V; VDS = 0 V; Tj = 25 °C
VGS = -20 V; VDS = 0 V; Tj = 25 °C
-
-
-
-
-
-
1
µA
µA
nA
nA
mΩ
68.5
-
IGSS
-
100
100
0.92
-
RDSon
drain-source on-state
resistance
VGS = 4.5 V; ID = 25 A; Tj = 25 °C;
Fig. 10
0.76
VGS = 4.5 V; ID = 25 A; Tj = 150 °C;
Fig. 10; Fig. 11
-
-
-
-
-
1.47
0.72
1.15
-
mΩ
mΩ
mΩ
Ω
VGS = 10 V; ID = 25 A; Tj = 25 °C;
Fig. 10
0.57
-
VGS = 10 V; ID = 25 A; Tj = 150 °C;
Fig. 10; Fig. 11
RG
gate resistance
f = 1 MHz
1.35
©
PSMN0R7-25YLD
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2017. All rights reserved
Product data sheet
25 July 2017
5 / 14
Nexperia
PSMN0R7-25YLD
N-channel 25 V, 0.72 mΩ, 300 A logic level MOSFET in LFPAK56 using NextPowerS3 Technology
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Dynamic characteristics
QG(tot)
total gate charge
ID = 25 A; VDS = 12 V; VGS = 10 V;
Fig. 12; Fig. 13
-
-
110.2
50.9
-
-
nC
nC
ID = 25 A; VDS = 12 V; VGS = 4.5 V;
Fig. 12; Fig. 13
ID = 0 A; VDS = 0 V; VGS = 10 V
-
-
-
45.8
18.8
11.9
-
-
-
nC
nC
nC
QGS
gate-source charge
ID = 25 A; VDS = 12 V; VGS = 4.5 V;
Fig. 12; Fig. 13
QGS(th)
pre-threshold gate-
source charge
QGS(th-pl)
post-threshold gate-
source charge
-
6.9
-
nC
QGD
gate-drain charge
-
-
11.9
2.6
-
-
nC
V
VGS(pl)
gate-source plateau
voltage
ID = 25 A; VDS = 12 V; Fig. 12; Fig. 13
Ciss
Coss
Crss
input capacitance
output capacitance
VDS = 12 V; VGS = 0 V; f = 1 MHz;
Tj = 25 °C; Fig. 14
-
-
-
8320
2982
522
-
-
-
pF
pF
pF
reverse transfer
capacitance
td(on)
tr
td(off)
tf
turn-on delay time
rise time
VDS = 12 V; RL = 0.6 Ω; VGS = 4.5 V;
RG(ext) = 5 Ω
-
-
-
-
-
42.2
48.3
53.1
38.2
54
-
-
-
-
-
ns
ns
ns
ns
nC
turn-off delay time
fall time
Qoss
output charge
VGS = 0 V; VDS = 12 V; f = 1 MHz;
Tj = 25 °C
Source-drain diode
VSD
trr
source-drain voltage
IS = 25 A; VGS = 0 V; Tj = 25 °C; Fig. 15
-
-
-
-
0.77
57.7
83.2
30.5
1.2
V
reverse recovery time IS = 25 A; dIS/dt = -100 A/µs; VGS = 0 V;
-
-
-
ns
nC
ns
VDS = 12 V; Fig. 16
Qr
ta
recovered charge
[1]
reverse recovery rise
time
tb
S
reverse recovery fall
time
-
-
27.2
0.9
-
-
ns
softness factor
[1] includes capacitive recovery
©
PSMN0R7-25YLD
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2017. All rights reserved
Product data sheet
25 July 2017
6 / 14
Nexperia
PSMN0R7-25YLD
N-channel 25 V, 0.72 mΩ, 300 A logic level MOSFET in LFPAK56 using NextPowerS3 Technology
aaa-021690
aaa-021691
200
160
120
80
6
5
4
3
2
1
0
I
R
DSon
(mΩ)
D
V
= 3 V
GS
(A)
3.5 V
4.5 V
10 V
2.8 V
2.6 V
2.4 V
40
0
0
1
2
3
V
4
0
2
4
6
8
10
12
14
(V)
16
(V)
V
GS
DS
Tj = 25 °C
Tj = 25 °C; ID = 25 A
Fig. 7. Output characteristics; drain current as a
function of drain-source voltage; typical values
Fig. 8. Drain-source on-state resistance as a function
of gate-source voltage; typical values
aaa-021693
aaa-021696
200
10
I
R
(mΩ)
D
DSon
2.6 V
2.8 V
(A)
160
120
80
40
0
8
6
4
2
0
3 V
150°C
2
T = 25°C
j
3.5 V
V
= 10 V 4.5 V
GS
0
0.5
1
1.5
2.5
3
3.5
(V)
4
0
25
50
75 100 125 150 175 200
(A)
V
I
D
GS
VDS = 12 V
Tj = 25 °C
Fig. 9. Transfer characteristics; drain current as a
function of gate-source voltage; typical values
Fig. 10. Drain-source on-state resistance as a function
of drain current; typical values
©
PSMN0R7-25YLD
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2017. All rights reserved
Product data sheet
25 July 2017
7 / 14
Nexperia
PSMN0R7-25YLD
N-channel 25 V, 0.72 mΩ, 300 A logic level MOSFET in LFPAK56 using NextPowerS3 Technology
aaa-022787
aaa-021698
2
1.6
1.2
0.8
0.4
0
10
8
a
V
GS
(V)
10 V
V
= 4.5 V
GS
6
20 V
12 V
4
V
= 5 V
DS
2
0
-60
-30
0
30
60
90
120
T (°C)
150
0
20
40
60
80
100
(nC)
G
120
Q
j
Tj = 25 °C; ID = 25 A
Fig. 12. Gate-source voltage as a function of gate
charge; typical values
Fig. 11. Normalized drain-source on-state resistance
factor as a function of junction temperature
aaa-021699
5
10
V
C
DS
(pF)
I
D
4
10
C
C
iss
V
V
GS(pl)
oss
3
2
10
GS(th)
C
rss
V
GS
Q
GS2
Q
GS1
10
Q
GS
Q
GD
G(tot)
Q
003aaa508
10
10
Fig. 13. Gate charge waveform definitions
-1
2
1
10
10
V
(V)
DS
VGS = 0 V; f = 1 MHz
Fig. 14. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values
©
PSMN0R7-25YLD
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2017. All rights reserved
Product data sheet
25 July 2017
8 / 14
Nexperia
PSMN0R7-25YLD
N-channel 25 V, 0.72 mΩ, 300 A logic level MOSFET in LFPAK56 using NextPowerS3 Technology
003aal160
aaa-021700
3
2
10
I
S
I
D
(A)
(A)
10
t
rr
t
t
b
a
0
10
0.25 I
RM
1
150°C
T = 25°C
j
I
RM
-1
10
t (s)
0
0.2
0.4
0.6
0.8
1
(V)
1.2
V
SD
Fig. 16. Reverse recovery timing definition
VGS = 0 V
Fig. 15. Source-drain (diode forward) current as a
function of source-drain (diode forward)
voltage; typical values
©
PSMN0R7-25YLD
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2017. All rights reserved
Product data sheet
25 July 2017
9 / 14
Nexperia
PSMN0R7-25YLD
N-channel 25 V, 0.72 mΩ, 300 A logic level MOSFET in LFPAK56 using NextPowerS3 Technology
11. Package outline
Plastic single-ended surface-mounted package (LFPAK56); 4 leads
SOT1023
E
A
E
A
1
b
(3x)
2
b
c
1
1
mounting
base
D
1
D
H
L
1
2
3
4
b
X
e
w
A
c
C
A
1
θ
L
p
y
C
detail X
0
1
2.5
5 mm
scale
Dimensions
Unit
(1)
(1)
(1)
E
(1)
A
A
b
b
b
c
c
D
D
1
E
e
H
L
L
p
w
y
θ
1
1
2
1
°
max 1.10 0.15 0.50 4.41
nom
min 0.95 0.00 0.35 3.62
0.25 0.30 4.70 4.45 5.30 3.7
6.2 1.3 0.85
5.9 0.8 0.40
8
0
mm
0.85
1.27
0.25 0.1
°
0.19 0.24 4.45
4.95 3.5
Note
1. Plastic or metal protrusions of 0.15 mm per side are not included.
sot1023_po
References
Outline
version
European
projection
Issue date
IEC
JEDEC
JEITA
11-12-09
13-03-05
SOT1023
Fig. 17. Package outline LFPAK56; Power-SO8 (SOT1023)
©
PSMN0R7-25YLD
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2017. All rights reserved
Product data sheet
25 July 2017
10 / 14
Nexperia
PSMN0R7-25YLD
N-channel 25 V, 0.72 mΩ, 300 A logic level MOSFET in LFPAK56 using NextPowerS3 Technology
12. Soldering
4.7
4.2
0.9
0.6
(3×)
(4×)
0.25
(2×)
0.25
(2×)
3.5
3.45
0.6
(3×)
2.55
2
0.25
(2×)
SR opening =
Cu + 0.075
1.1
2.15
3.3
SP opening =
Cu - 0.050
0.7
(4×)
1.27
3.81
solder paste
125 µm stencil
solder lands
solder resist
occupied area
sot1023_fr
Fig. 18. Reflow soldering footprint for LFPAK56; Power-SO8 (SOT1023)
©
PSMN0R7-25YLD
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2017. All rights reserved
Product data sheet
25 July 2017
11 / 14
Nexperia
PSMN0R7-25YLD
N-channel 25 V, 0.72 mΩ, 300 A logic level MOSFET in LFPAK56 using NextPowerS3 Technology
for the products described herein shall be limited in accordance with the
Terms and conditions of commercial sale of Nexperia.
13. Legal information
Right to make changes — Nexperia reserves the right to make changes
to information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
Data sheet status
Suitability for use — Nexperia products are not designed, authorized or
warranted to be suitable for use in life support, life-critical or safety-critical
systems or equipment, nor in applications where failure or malfunction
of an Nexperia product can reasonably be expected to result in personal
injury, death or severe property or environmental damage. Nexperia and its
suppliers accept no liability for inclusion and/or use of Nexperia products in
such equipment or applications and therefore such inclusion and/or use is at
the customer’s own risk.
Document
status [1][2] status [3]
Product
Definition
Objective
[short] data
sheet
Development This document contains data from
the objective specification for product
development.
Preliminary
[short] data
sheet
Qualification This document contains data from the
preliminary specification.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Product
[short] data
sheet
Production
This document contains the product
specification.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
[1] Please consult the most recently issued document before initiating or
completing a design.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia accepts no liability for
any assistance with applications or customer product design. It is customer’s
sole responsibility to determine whether the Nexperia product is suitable
and fit for the customer’s applications and products planned, as well as
for the planned application and use of customer’s third party customer(s).
Customers should provide appropriate design and operating safeguards to
minimize the risks associated with their applications and products.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the Internet at URL http://www.nexperia.com.
Definitions
Nexperia does not accept any liability related to any default, damage, costs
or problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party
customer(s). Customer is responsible for doing all necessary testing for the
customer’s applications and products using Nexperia products in order to
avoid a default of the applications and the products or of the application or
use by customer’s third party customer(s). Nexperia does not accept any
liability in this respect.
Preview — The document is a preview version only. The document is still
subject to formal approval, which may result in modifications or additions.
Nexperia does not give any representations or warranties as to the accuracy
or completeness of information included herein and shall have no liability for
the consequences of use of such information.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
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full data sheet shall prevail.
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Limited warranty and liability — Information in this document is believed
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Non-automotive qualified products — Unless this data sheet expressly
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product is not suitable for automotive use. It is neither qualified nor tested in
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accepts no liability for inclusion and/or use of non-automotive qualified
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In no event shall Nexperia be liable for any indirect, incidental, punitive,
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In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards,
customer (a) shall use the product without Nexperia’ warranty of the product
for such automotive applications, use and specifications, and (b) whenever
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’ aggregate and cumulative liability towards customer
©
PSMN0R7-25YLD
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2017. All rights reserved
Product data sheet
25 July 2017
12 / 14
Nexperia
PSMN0R7-25YLD
N-channel 25 V, 0.72 mΩ, 300 A logic level MOSFET in LFPAK56 using NextPowerS3 Technology
customer uses the product for automotive applications beyond Nexperia’
specifications such use shall be solely at customer’s own risk, and (c)
customer fully indemnifies Nexperia for any liability, damages or failed
product claims resulting from customer design and use of the product for
automotive applications beyond Nexperia’ standard warranty and Nexperia’
product specifications.
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trademarks are the property of their respective owners.
©
PSMN0R7-25YLD
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2017. All rights reserved
Product data sheet
25 July 2017
13 / 14
Nexperia
PSMN0R7-25YLD
N-channel 25 V, 0.72 mΩ, 300 A logic level MOSFET in LFPAK56 using NextPowerS3 Technology
14. Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Applications.................................................................. 1
4. Quick reference data....................................................1
5. Pinning information......................................................2
6. Ordering information....................................................2
7. Marking..........................................................................2
8. Limiting values............................................................. 2
9. Thermal characteristics............................................... 4
10. Characteristics............................................................5
11. Package outline........................................................ 10
12. Soldering................................................................... 11
13. Legal information..................................................... 12
© Nexperia B.V. 2017. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 25 July 2017
©
PSMN0R7-25YLD
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2017. All rights reserved
Product data sheet
25 July 2017
14 / 14
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