BUJ303B,127_技术文档

DISCRETE SEMICONDUCTORS

DATA SHEET

BUJ303B

Silicon Diffused Power Transistor

Product specification

March 2002

NXP Semiconductors

Product specification

Silicon Diffused Power Transistor

BUJ303B

GENERAL DESCRIPTION

High-voltage, high-speed planar-passivated npn power switching transistor in a TO220AB envelope intended for

use in high frequency electronic lighting ballast applications, converters, inverters, switching regulators, motor

control systems, etc.

QUICK REFERENCE DATA

SYMBOL PARAMETER

CONDITIONS

TYP. MAX. UNIT

V_CESM

V_CBO

V_CEO

I_C

I_CM

P_tot

V_CEsat

h_FEsat

t_f

Collector-emitter voltage peak value

V_BE= 0 V

-

1050

400

5

V

A

W

V

Collector-Base voltage (open emitter)

Collector-emitter voltage (open base)

Collector current (DC)

Collector current peak value

Total power dissipation

Collector-emitter saturation voltage

DC current gain

Fall time

10

T_mb≤ 25 ˚C

I_C= 3 A; I_B= 1 A

I_C= 3 A; V_CE= 1.5 V

I_C=2.5 A,I_B1=0.5 A

100

1.5

-

0.25

10.5

300

-

ns

PINNING - TO220AB

PIN CONFIGURATION

SYMBOL

1

DESCRIPTION

c

tab

base

2

collector

emitter

b

3

tab collector

e

1 2 3

LIMITING VALUES

Limiting values in accordance with the Absolute Maximum Rating System (IEC 134)

SYMBOL PARAMETER

CONDITIONS

MIN. MAX. UNIT

V_CESM

V_CEO

V_CBO

I_C

Collector to emitter voltage

V_BE= 0 V

-

1050

400

1050

5

V

Collector to emitter voltage (open base)

Collector to base voltage (open emitter)

Collector current (DC)

A

I_CM

I_B

I_BM

P_tot

T_stg

T_j

Collector current peak value

Base current (DC)

Base current peak value

Total power dissipation

Storage temperature

-

10

2

4

100

150

A

W

˚C

T_mb≤ 25 ˚C

-65

-

Junction temperature

THERMAL RESISTANCES

SYMBOL PARAMETER

CONDITIONS

TYP. MAX. UNIT

R_{th j-mb}

R_{th j-a}

Junction to mounting base

Junction to ambient

-

1.25

-

K/W

in free air

60

March 2002

1

Rev 1.000

NXP Semiconductors

Product specification

Silicon Diffused Power Transistor

BUJ303B

STATIC CHARACTERISTICS

T_mb= 25 ˚C unless otherwise specified

SYMBOL PARAMETER

CONDITIONS

MIN. TYP. MAX. UNIT

I_CES,I_CBO

I_CES

Collector cut-off current ¹

V_BE= 0 V; V_CE= V_CESMmax

T_j= 125 ˚C

-

1.0

2.0

mA

;

I_CEO

Collector cut-off current ¹

Emitter cut-off current

Collector-emitter sustaining voltage I_C= 300 mA; L = 25 mH

Collector-emitter saturation voltage I_C= 3 A; I_B= 1 A

I_C= 1 A; I_B= 0.2 A

V_CEO= V_CEOMmax(400V)

-

0.1

mA

I_EBO

V_CEOsust

V_CEsat

V_EB= 9 V; I_C= 0 A

-

400

-

0.1

-

1.5

0.5

mA

V

-

0.25

-

V

V_BEsat

h_FE

Base-emitter saturation voltage

DC current gain

I_C= 3 A; I_B= 1 A

I_C= 10 mA; V_CE= 5 V

I_C= 800 mA; V_CE= 3 V

-

10

23

1.0

-

31

1.5

-

40

V

h_FEsat

DC current gain

I_C= 3 A; V_CE= 1.5 V

-

10.5

-

DYNAMIC CHARACTERISTICS

T_mb= 25 ˚C unless otherwise specified

SYMBOL PARAMETER

CONDITIONS

TYP. MAX. UNIT

Switching times (resistive load)

I_Con= 2.5 A; I_Bon= 0.5 A I_Boff= -1 A;

V_CC= 250 V;

t_on

t_s

t_f

Turn-on time

Turn-off storage time

Turn-off fall time

1

2.5

0.3

-

µs

Switching times (inductive load)

I_Con= 2.5 A; I_Bon= 0.5 A; -V_BB= 5 V;

L_C= 300 µH; L_B= 1 µH; V_CC= 350 V

t_s

t_f

Turn-off storage time

Turn-off fall time

2

200

-

µs

ns

Switching times (inductive load)

I_Con= 2.5 A; I_Bon= 0.5 A; -V_BB= 5 V;

L_C= 300 µH; L_B= 1 µH; V_CC= 350 V;

T_j= 100 ˚C

t_s

t_f

Turn-off storage time

Turn-off fall time

3

300

-

µs

ns

1 Measured with half sine-wave voltage (curve tracer).

March 2002

2

Rev 1.000

NXP Semiconductors

Product specification

Silicon Diffused Power Transistor

BUJ303B

100-200R

+ 50v

ICon

90 %

+ V

B

IC

25 mH

10 %

ts

tf

ton

Pulse in

toff

Oscilloscope

Horizontal

IBon

IB

50R

10 %

Oscilloscope

Vertical

tr 30ns

C.T.

-IBoff

Fig.1. Test circuit for V_CEOsust

.

Fig.4. Switching times waveforms with resistive load.

IC / mA

VCC

LC

400

300

IBon

LB

T.U.T.

-VBB

0

min

VCEOsust

VCE / V

Fig.2. Oscilloscope display for V_CEOsust

.

Fig.5. Test circuit inductive load.

V_CC= 350 V; -V_BE= 5 V; L_C= 300 uH; L_B= 1 uH

ICon

90 %

VCC

IC

R

L

VIM

10 %

tf

R

B

ts

t

0

T.U.T.

toff

tp

IBon

IB

T

t

-IBoff

Fig.3. Test circuit resistive load. V_IM= -6 to +8 V

V_CC= 250 V; t_p= 20 µs; δ = t_p/ T = 0.01.

R_Band R_Lcalculated from I_Conand I_Bonrequirements.

Fig.6. Switching times waveforms with inductive load.

March 2002

3

Rev 1.000

NXP Semiconductors

Product specification

Silicon Diffused Power Transistor

BUJ303B

Normalised Power Derating

VBEsat (V)

PD%

120

110

100

90

80

70

60

50

40

30

20

10

0

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0

20

40

60

80

Tmb /

100

120

140

0.1

1.0

10.0

IC (A)

C

Fig.7. Normalised power dissipation.

PD% = 100⋅PD/PD _25˚C= f (T_mb)

Fig.10. Base-Emitter saturation voltage.

Solid lines = typ values, V_BEsat= f(IC); at IC/IB =4.

100

0.5

h

FE

V

CEsat

(V)

0.4

V

CE

= 5 V

0.3

0.2

10

V

= 1 V

CE

0.1

0

1

1.0

0.1

10.0

0.1

10

1

0.01

I

C

(A)

I

C

(A)

Fig.8. Typical DC current gain. h_FE= f(I_C)

parameter V_CE

Fig.11. Collector-Emitter saturation voltage.

Solid lines = typ values, V_CEsat= f(IC); at IC/IB =4.

Zth / (K/W)

10

2

V

CEsat

(V)

3 A

I

C

= 1 A

2 A

4 A

1

0.5

D=

1

0.2

0.1

t_p

0.05

0.02

0

t

0.1

p

P

D =

D

T

t

T

0

0.01

1E-06

1E-04

1E-02

t / s

1E+00

10

0.1

1

I

B

(A)

Fig.9. Collector-Emitter saturation voltage.

Solid lines = typ values, V_CEsat= f(IB); T_j= 25˚C.

Fig.12. Transient thermal impedance.

Z_{th j-mb}= f(t); parameter D = t_p/T

March 2002

4

Rev 1.000

NXP Semiconductors

Product specification

Silicon Diffused Power Transistor

BUJ303B

2

10

VCC

I

C

(A)

Duty cycle = 0.01

LC

I

CM max

tp=

10

VCL(RBSOAR)

I

C max

PROBE POINT

IBon

LB

10us

II

T.U.T.

-VBB

(1)

100us

1

Fig.13. Test Circuit for reversebias safe operating

area.

V_cl≤ 1000V; V_cc= 150V; V_BB= -5V; L_B= 1µH; L_c=

200µH

(2)

1ms

I

-1

10

10ms

DC

III

12

I

C

-2

10

(A)

3

1

2

10

V

(V)

CE

8

6

4

Fig.15. Forward bias safe operating area. T_hs≤ 25 ˚C

(1)

(2)

I

II

III

P_totmax and P_totpeak max lines.

Second breakdown limits.

Region of permissible DC operation.

Extension for repetitive pulse operation.

Extension during turn-on in single

transistor converters provided that

2

0

R

_BE≤ 100 Ω and t_p≤ 0.6 µs.

600

1200

(V)

800

0

400

1000

200

NB:

Mounted with heatsink compound and

30 5 newton force on the centre of the

envelope.

V

CLAMP

Fig.14. Reversebias safe operating area T_j≤ T_jmax

March 2002

5

Rev 1.000

NXP Semiconductors

Product specification

Silicon Diffused Power Transistor

BUJ303B

MECHANICAL DATA

Dimensions in mm

Net Mass: 2 g

4,5

max

10,3

max

1,3

3,7

2,8

5,9

min

15,8

max

3,0 max

not tinned

3,0

13,5

min

1,3

1 2 3

max

(2x)

0,9 max (3x)

0,6

2,4

2,54 2,54

Fig.16. TO220AB; pin 2 connected to mounting base.

Notes

1. Refer to mounting instructions for TO220 envelopes.

2. Epoxy meets UL94 V0 at 1/8".

March 2002

6

Rev 1.000

NXP Semiconductors

Legal information

DATA SHEET STATUS

DOCUMENT

STATUS⁽¹⁾

PRODUCT

STATUS⁽²⁾

DEFINITION

Objective data sheet

Development

This document contains data from the objective specification for product

development.

Preliminary data sheet

Product data sheet

Qualification

Production

This document contains data from the preliminary specification.

This document contains the product specification.

Notes

1. Please consult the most recently issued document before initiating or completing a design.

2. The product status of device(s) described in this document may have changed since this document was published

and may differ in case of multiple devices. The latest product status information is available on the Internet at

URL http://www.nxp.com.

DEFINITIONS

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reserves the right to make changes to information

published in this document, including without limitation

specifications and product descriptions, at any time and

without notice. This document supersedes and replaces all

information supplied prior to the publication hereof.

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provided in a Product data sheet shall define the

specification of the product as agreed between NXP

Semiconductors and its customer, unless NXP

Semiconductors and customer have explicitly agreed

otherwise in writing. In no event however, shall an

agreement be valid in which the NXP Semiconductors

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Quick reference data ⎯ The Quick reference data is an

extract of the product data given in the Limiting values and

Characteristics sections of this document, and as such is

not complete, exhaustive or legally binding.

Limiting values ⎯ Stress above one or more limiting

values (as defined in the Absolute Maximum Ratings

System of IEC 60134) will cause permanent damage to

the device. Limiting values are stress ratings only and

(proper) operation of the device at these or any other

conditions above those given in the Recommended

operating conditions section (if present) or the

Characteristics sections of this document is not warranted.

Constant or repeated exposure to limiting values will

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Printed in The Netherlands


型号：	BUJ303B,127
厂家：	NXP
描述：	BUJ303B 局域网开关晶体管
文件：	总9页 (文件大小：146K)
中文：	中文翻译
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