TDA8787AHL [NXP]
10-bit, 3.0 V, up to 25 Msps analog-to-digital interface for CCD cameras; 10位, 3.0V,最高达25 Msps的模拟 - 数字为CCD相机接口型号: | TDA8787AHL |
厂家: | NXP |
描述: | 10-bit, 3.0 V, up to 25 Msps analog-to-digital interface for CCD cameras |
文件: | 总24页 (文件大小:116K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
TDA8787A
10-bit, 3.0 V, up to 25 Msps
analog-to-digital interface for CCD
cameras
Product specification
2000 Nov 14
Supersedes data of 2000 Oct 12
File under Integrated Circuits, IC02
Philips Semiconductors
Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
interface for CCD cameras
TDA8787A
FEATURES
APPLICATIONS
• Low-power, low-voltage CCD camera systems.
• Correlated Double Sampling (CDS), Programmable
Gain Amplifier (PGA), 10-bit Analog-to-Digital Converter
(ADC) and reference regulator included
GENERAL DESCRIPTION
• Fully programmable via a 3-wire serial interface
The TDA8787A is a 10-bit analog-to-digital interface for
CCD cameras. The device includes a correlated double
sampling circuit, a PGA, clamp loops and a low-power
10-bit ADC, together with its reference voltage regulator.
• Sampling frequency up to 25 MHz;
(TDA8787AHL = 18 MHz; TDA8787AHL/S1 = 25 MHz)
• PGA gain range of 36 dB (in steps of 0.1 dB)
• Low power consumption of only 170 mW at 2.7 V
The PGA gain and the ADC input clamp level are
controlled via the serial interface.
• Power consumption in standby mode of 4.5 mW
(typical value)
An additional DAC is provided for additional system
controls. Its output voltage range is 1.0 V peak-to-peak
which is available at pin OFDOUT.
• 3.0 V operation; 2.5 to 3.6 V operation for the digital
outputs
• Active control pulses polarity selectable via serial
interface
• 8-bit DAC included for analog settings
• TTL compatible inputs, CMOS compatible outputs.
ORDERING INFORMATION
TYPE NUMBER
PACKAGE
PIXEL
VERSION
NAME
DESCRIPTION
FREQUENCY
TDA8787AHL
LQFP48
LQFP48
plastic low profile quad flat package; 48 leads;
body 7 × 7 × 1.4 mm
SOT313-2
SOT313-2
18 MHz
25 MHz
TDA8787AHL/S1
2000 Nov 14
2
Philips Semiconductors
Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
interface for CCD cameras
TDA8787A
QUICK REFERENCE DATA
SYMBOL
VCCA
PARAMETER
CONDITIONS
MIN.
2.7
TYP. MAX. UNIT
analog supply voltage
digital supply voltage
3.0
3.0
2.6
3.6
3.6
3.6
V
V
V
VCCD
VCCO
2.7
2.5
digital outputs stages supply
voltage
ICCA
ICCD
ICCO
analog supply current
digital supply current
all clamps active; fpix = 18 MHz
fpix = 18 MHz
−
−
−
50
13
1
60
17
2
mA
mA
mA
digital outputs supply current fpix = 18 MHz; CL = 20 pF; input ramp
response time is 800 µs
ADCres
ADC resolution
−
10
−
−
−
−
−
−
−
−
bits
mV
Vi(CDS)(p-p)
CDS input amplitude (video
signal) (peak-to-peak value)
VCC = 2.85 V
CC ≥ 3.0 V
650
800
25
2
V
−
mV
fpix(max)
fpix(min)
DRPGA
Ntot(rms)
maximum pixel frequency
minimum pixel frequency
PGA dynamic range
−
MHz
MHz
dB
−
−
36
0.15
total noise (RMS value) at
CDS input to ADC output
PGA code = 0; see Fig.8
PGA code = 383
−
LSB
Vn(i)(eq)(rms) equivalent input noise
voltage (RMS value)
−
70
−
µV
Ptot
total power consumption
VCCA = VCCD = VCCO = 3 V
VCCA = VCCD = VCCO = 2.7 V
−
−
190
170
−
−
mW
mW
2000 Nov 14
3
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g
V
V
SHP
SHD
CCD3 DGND3
CCA2
18
AGND2 CLPOB CLPDM
AGND5
43
BLK
CLK
OE
47
48
1
2
17
13
12
11
40
37
20
19
39
38
26
DGND1
V
CCD1
CDS CLOCK GENERATOR
DGND2
V
CCD2
OGND
7
CPCDS1
CPCDS2
CLAMP
TDA8787AHL
36
35
34
33
32
31
30
29
28
27
D9
D8
8
42
41
4
V
CCA3
D7
D6
D5
D4
D3
D2
D1
D0
AGND3
IN
PGA
10-bit ADC
CORRELATED
DOUBLE
SAMPLING
OUTPUT
BUFFER
BLANKING
SHIFT
SHIFTER
LATCH
V
DAC
ref
input
clamp
6
5
V
9-BIT
REGISTER
7-BIT
REGISTER
CCA1
25
44
V
CCO
AGND1
OFD DAC
REGULATOR
DCLPC
9
SERIAL
INTERFACE
8-BIT
REGISTER
OFDOUT
15
46
22
21
24
10
14
16
3
45
23
FCE330
OPGA
OPGAC
SCLK
VSYNC
TEST1 TEST2 TEST3 AGND4
SEN
SDATA
STDBY
Fig.1 Block diagram.
Philips Semiconductors
Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
interface for CCD cameras
TDA8787A
PINNING
SYMBOL
VCCD3
PIN
DESCRIPTION
1
digital supply voltage 3
digital ground 3
DGND3
AGND4
IN
2
3
analog ground 4
4
input signal from CCD
analog ground 1
AGND1
VCCA1
CPCDS1
CPCDS2
OFDOUT
STDBY
BLK
5
6
analog supply voltage 1
clamp storage capacitor 1
clamp storage capacitor 2
7
8
9
analog output of the additional 8-bit control DAC
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
standby mode control input (LOW: TDA8787A active; HIGH: TDA8787A standby)
blanking control input
CLPDM
CLPOB
TEST1
TEST2
TEST3
AGND2
VCCA2
VCCD1
DGND1
SDATA
SCLK
SEN
clamp pulse input at dummy pixel (should be connected to ground)
clamp pulse input for optical black
test pin input 1 (should be connected to AGND2)
test pin input 2 (should be connected to AGND2)
test pin input 3 (should be connected to AGND2)
analog ground 2
analog supply voltage 2
digital supply voltage 1
digital ground 1
serial data input for serial interface control
serial clock input for serial interface control
strobe pin for serial interface control
vertical sync pulse input
VSYNC
VCCO
OGND
D0
output stages supply voltage
digital output ground
ADC digital output 0 (LSB)
D1
ADC digital output 1
D2
ADC digital output 2
D3
ADC digital output 3
D4
ADC digital output 4
D5
ADC digital output 5
D6
ADC digital output 6
D7
ADC digital output 7
D8
ADC digital output 8
D9
ADC digital output 9 (MSB)
OE
output enable control input (LOW: outputs active; HIGH: outputs in high impedance)
digital supply 2
VCCD2
DGND2
CLK
digital ground 2
data clock input
2000 Nov 14
5
Philips Semiconductors
Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
interface for CCD cameras
TDA8787A
SYMBOL
AGND3
PIN
DESCRIPTION
41
42
43
44
45
46
47
48
analog ground 3
VCCA3
AGND5
DCLPC
OPGA
OPGAC
SHP
analog supply 3
analog ground 5
regulator decoupling pin
PGA output (test pin)
PGA complementary output (test pin)
preset sample-and-hold pulse input
data sample-and-hold pulse input
SHD
V
1
36
35
34
33
D9
D8
D7
D6
CCD3
2
3
4
5
6
7
8
9
DGND3
AGND4
IN
32 D5
31
AGND1
V
D4
CCA1
TDA8787AHL
CPCDS1
CPCDS2
OFDOUT
30 D3
29 D2
28 D1
STDBY 10
BLK 11
27 D0
26 OGND
V
25
CLPDM 12
CCO
FCE331
Fig.2 Pin configuration.
2000 Nov 14
6
Philips Semiconductors
Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
interface for CCD cameras
TDA8787A
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL
VCCA
PARAMETER
analog supply voltage
CONDITIONS
MIN.
−0.3
MAX.
+5.0
UNIT
note 1
note 1
note 1
V
V
V
VCCD
VCCO
∆VCC
digital supply voltage
output stages supply voltage
supply voltage difference
between VCCA and VCCD
between VCCA and VCCO
between VCCD and VCCO
input voltage
−0.3
−0.3
+5.0
+5.0
−0.5
−0.5
−0.5
−0.3
−
+0.5
+1.2
+1.2
+5.0
±10
V
V
V
V
Vi
referenced to AGND
Io
data output current
mA
°C
°C
°C
Tstg
Tamb
Tj
storage temperature
ambient temperature
junction temperature
−55
−20
−
+150
+75
150
Note
1. The supply voltages VCCA, VCCD and VCCO may have any value between −0.3 and +5.0 V provided that the supply
voltage difference ∆VCC remains as indicated.
HANDLING
Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling integrated circuits.
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
in free air
VALUE
UNIT
Rth(j-a)
thermal resistance from junction to ambient
76
K/W
2000 Nov 14
7
Philips Semiconductors
Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
interface for CCD cameras
TDA8787A
CHARACTERISTICS
VCCA = VCCD = 3.0 V; VCCO = 2.6 V; fpix = 18 MHz; Tamb = −20 to +75°C; unless otherwise specified.
SYMBOL
Supplies
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNIT
VCCA
VCCD
VCCO
analog supply voltage
digital supply voltage
2.7
2.7
2.5
3.0
3.0
2.6
3.6
3.6
3.6
V
V
V
digital outputs stages
supply voltage
ICCA
ICCD
ICCO
analog supply current
digital supply current
all clamps active
−
−
−
50
13
1
60
17
2
mA
mA
mA
digital outputs supply
current
CL = 20 pF on all data outputs;
input ramp response time is
800 µs
Ptot
total power consumption
VCCA = VCCD = VCCO = 3 V
VCCA = VCCD = VCCO = 2.7 V
−
−
190
170
−
−
mW
mW
Digital inputs
INPUTS: PINS STDBY, CLPDM, CLPOB, SCLK, SDATA, SEN, VSYNC, OE, CLK AND BLK
VIL
VIH
Ii
LOW-level input voltage
HIGH-level input voltage
input current
0
−
−
−
0.6
5.0
+2
V
2.2
−2
V
0 ≤ Vi ≤ VCCD
µA
INPUTS: PINS SHP AND SHD
VIL
VIH
Ii
LOW-level input voltage
0
−
−
−
0.6
5.0
+10
V
HIGH-level input voltage
input current
2.2
−10
V
0 ≤ Vi ≤ VCCD
µA
Clamps
GLOBAL CHARACTERISTICS OF THE CLAMP LOOPS
tW(clamp)
clamp active pulse width
in numbers of pixels
PGA input code = 255 for
maximum 4 LSB error
12
1.5
−
−
−
pixels
mS
INPUT CLAMP: PIN CLPDM
gm(CDS)
CDS input clamp
transconductance
2.7
3.5
−
OPTICAL BLACK CLAMP: PIN CLPOB
Gshift
gain from CPCDS1 and 2
to PGA inputs
0.27
ILSB(cp)
charge pump current for
±1 LSB error at ADC
output
PGA input code = 0
−
−
±20
−
−
µA
µA
PGA input code = 383
±0.60
2000 Nov 14
8
Philips Semiconductors
Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
interface for CCD cameras
TDA8787A
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNIT
Correlated Double Sampling (CDS) (pin IN)
Vi(CDS)(p-p)
CDS input amplitude
(video signal)
(peak-to-peak value)
VCC = 2.85 V
CC ≥ 3.0 V
650
−
−
−
−
mV
mV
V
800
Vi(rst)(max)
maximum CDS input reset
pulse amplitude
500
−
−
mV
Ii
input current
at floating gate level
−1
−
+1
µA
Ci
input capacitance
−
2
−
pF
tCDS(min)
CDS control pulses
minimum active time
Vi(CDS)(p-p) = 800 mV;
black-to-white transition in
1 pixel (±2 LSB typical);
Tamb = 25 °C; note 1
f
pix = 18 MHz
11
9
15
11
1
−
−
2
2
ns
ns
ns
ns
(TDA8787AHL)
fpix = 25 MHz
(TDA8787AHL/S1)
th(IN-SHP)
th(IN-SHD)
hold time SHP to IN
hold time SHD to IN
Tamb = 25 °C; see
Figs 3 and 4
−
Tamb = 25 °C; see
−
1
Figs 3 and 4
Amplifier
DRPGA
PGA dynamic range
PGA gain step
−
36
−
dB
∆GPGA
−0.3
−
+0.3 dB
Analog-to-Digital Converter (ADC)
LE(i)
integral non-linearity error fpix = 18 MHz; ramp input
−
−
±1.3
±0.5
±2.5 LSB
±0.9 LSB
LE(d)
differential non-linearity
error
fpix = 18 MHz; ramp input
Total chain characteristics (CDS, PGA and ADC)
fpix(max)
fpix(min)
maximum pixel frequency
minimum pixel frequency
clock HIGH time
25
2
−
−
−
−
−
−
−
−
−
−
−
−
MHz
MHz
ns
tCLKH
15
15
10
10
tCLKL
clock LOW time
ns
td(SHD-CLK)
tsu(BLK-CLK)
time delay SHD to CLK
see Fig.3
ns
set-up time of
ns
BLK compared to CLK
Vi(IN)
video input dynamic signal PGA input code = 0
800
−
−
−
−
mV
mV
for ADC full-scale output
PGA input code = 383
12.7
Ntot(rms)
total noise from CDS input see Fig.8
to ADC output
(RMS value)
PGA input code = 0
−
−
−
−
0.15
0.8
70
−
−
−
−
LSB
LSB
µV
PGA input code = 96
Vn(i)(eq)(rms) equivalent input noise
voltage (RMS value)
PGA input code = 383
PGA input code = 0
120
µV
2000 Nov 14
9
Philips Semiconductors
Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
interface for CCD cameras
TDA8787A
SYMBOL
PARAMETER
CONDITIONS
MIN.
−80
TYP.
MAX. UNIT
OCCD(max)
maximum offset between
CCD floating level and
CCD dark pixel level
−
+80
mV
Digital-to-Analog Converter (OFDOUT DAC)
VOFDOUT(p-p) additional 8-bit control
DAC (OFD) output voltage
(peak-to-peak value)
RL = 1 MΩ
−
1.0
−
V
VOFDOUT
DC output voltage
OFD input code 0
OFD input code 255
−
−
−
AGND
−
−
−
V
AGND + 1.0
250
V
TCOFD
OFD output range
ppm/°C
temperature coefficient
ZOFDOUT
IOFDOUT
OFD output impedance
OFD output drive current
−
−
2000
−
Ω
static
−
100
µA
Digital outputs (fpix = 18 MHz; CL = 10 pF); see Figs 3 and 4
VOH
VOL
IOZ
HIGH-level output voltage IOH = −1 mA
V
CCO − 0.5 −
VCCO
0.5
+20
−
V
LOW-level output voltage IOL = 1 mA
0
−
V
OFF-state output current
output hold time
0.5 V < VOZ < VCCO
−20
9
−
µA
ns
ns
ns
pF
th(o)
td(o)
−
output delay time
VCCO = 3.0 V
CCO = 2.7 V
−
17
19
−
23
V
−
25
CL
load capacitance
−
22
Serial interface
fSCLK(max)
maximum frequency
pin SCLK
5
−
−
MHz
Note
1. Depending on application environments and especially in case of high gain operation and digital supply with jitter, it
is preferable to apply 12 ns or higher CDS pulses.
2000 Nov 14
10
Philips Semiconductors
Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
interface for CCD cameras
TDA8787A
IN
N + 1
N + 2
N + 3
N
t
CDS(min)
2.2 V
SHP
SHD
0.6 V
0.6 V
t
h(IN-SHP)
t
CDS(min)
2.2 V
0.6 V
0.6 V
0.6 V
t
h(IN-SHD)
t
CLKH
2.2 V
CLK
DATA
BLK
0.6 V
0.6 V
t
d(SHD-CLK)
N − 1
50%
N
t
h(o)
t
d(o)
2.2 V
0.6 V
FCE337
t
su(BLK-CLK)
Fig.3 Pixel frequency timing diagram with active HIGH-level polarities.
11
2000 Nov 14
Philips Semiconductors
Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
interface for CCD cameras
TDA8787A
IN
N + 1
N + 2
N + 3
N
2.2 V
SHP
SHD
0.6 V
0.6 V
t
CDS(min)
2.2 V
t
h(IN-SHP)
2.2 V
0.6 V
0.6 V
t
t
h(IN-SHD)
CDS(min)
2.2 V
2.2 V
CLK
0.6 V
CLKL
t
t
d(SHD-CLK)
N − 1
50%
N
DATA
BLK
t
h(o)
t
d(o)
2.2 V
0.6 V
FCE328
t
su(BLK-CLK)
Fig.4 Pixel frequency timing diagram with active LOW-level polarities.
12
2000 Nov 14
Philips Semiconductors
Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
interface for CCD cameras
TDA8787A
FCE332
1.0
V
OFDOUT
(V)
0
0
255
OFD control DAC input code
Fig.5 DAC output voltage output as a function of DAC input code.
(1)
4 pixels
CLPOB
WINDOW
PGA output
VIDEO
OPTICAL BLACK
HORIZONTAL FLYBACK
DUMMY
VIDEO
CLPOB
(active HIGH)
BLK
(active HIGH)
BLK window
FCE333
(1) In case the number of clamp pixels is limited to 18 × (tW(clamp)); otherwise this timing interval can be smaller.
Fig.6 Line frequency timing diagram.
2000 Nov 14
13
Philips Semiconductors
Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
interface for CCD cameras
TDA8787A
FCE327
42
Total
gain
(dB)
36
30
24
18
12
6
0
0
64
128
192
256
320
383
PGA input code
ADC input range is 1 Vpp
.
Fig.7 Total gain as a function of PGA input code.
FCE329
6
handbook, halfpage
N
tot(rms)
(LSB)
5
4
3
2
1
0
0
64
128
192
256
320
383
PGA input code
Noise measurement at ADC outputs; coupling capacitor at input is grounded, so only noise contribution of the front-end is evaluated. Front-end works
at 18 Mpixels with line of 1024 pixels whose first 40 are used to run CLPOB and the last 40 for CLPDM. Data at the ADC outputs are measured during
the other pixels. As a result of this, the standard deviation of the codes statistic is computed, resulting in the noise.
Fig.8 Typical total noise performance as a function of PGA gain.
2000 Nov 14
14
Philips Semiconductors
Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
interface for CCD cameras
TDA8787A
SDATA
SCLK
SHIFT REGISTER
SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7 SD8 SD9 A0 A1
LSB
MSB
10
LATCH
SELECTION
SEN
9
8
7
6
CONTROL PULSE
POLARITY
PGA GAIN
LATCHES
ADC CLAMP
LATCHES
OFDOUT DAC
LATCHES
LATCHES
VSYNC
control pulses
polarity
settings
FLIP-FLOP
8-bit DAC
FLIP-FLOP
FLIP-FLOP
PGA
control
ADC clamp
control
FCE334
Fig.9 Serial interface block diagram.
t
su2
t
hd4
MSB
LSB
A1
A0
SD9 SD8 SD7 SD6 SD5 SD4 SD3 SD2 SD1 SD0
SDATA
SCLK
SEN
t
t
su1
su3
t
hd3
FCE335
tsu1 = tsu2 = tsu3 = 10 ns (minimum); thd3 = thd4 = 10 ns (minimum).
Fig.10 Loading sequence of control input data via the serial interface.
2000 Nov 14
15
Philips Semiconductors
Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
interface for CCD cameras
TDA8787A
Table 1 Serial interface programming; see Figs 9 and 10
ADDRESS BITS
DATA BITS SD9 TO SD0
A1
A0
0
0
0
1
PGA gain control (bits SD8 to SD0); bit SD9 should be set to logic 0
DAC OFDOUT output control (bits SD7 to SD0); bits SD8 and SD9 should be set to
logic 0
1
1
0
1
ADC clamp reference control (SD6 to SD0); from code 0 to 127; bits SD7, SD8 and
SD9 should be set to logic 0
control pulses polarity settings (pins SHP, SHD, CLPDM, CLPOB, BLK and CLK)
Table 2 Polarity settings
SYMBOL
PIN
SERIAL CONTROL BIT(1)
ACTIVE EDGE OR LEVEL
SHP and SHD
CLK
47 and 48
40
SD0
SD1
SD2
SD3
SD5
SD6
1 = HIGH; 0 = LOW
1 = HIGH; 0 = LOW
always 0 = LOW
CLPDM
CLPOB
BLK
12 (connected to ground)
13
11
24
1 = HIGH; 0 = LOW
1 = HIGH; 0 = LOW
0 = rising; 1 = falling
VSYNC
Note
1. Bit SD4 is not used.
Table 3 Standby mode selection; pin STDBY
STDBY
ADC DIGITAL OUTPUTS; PINS D9 TO D0
ICCA + ICCO + ICCD (typical)
1
0
logic state LOW
active
1.5 mA
64 mA
Table 4 Output enable (OE) pin 37
OE
ADC DIGITAL OUTPUTS; PINS D9 TO D0
0
1
active, binary
high impedance
2000 Nov 14
16
Philips Semiconductors
Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
interface for CCD cameras
TDA8787A
APPLICATION INFORMATION
In order to minimize the noise due to package and die
parasitics in a two-ground system, the following measures
must be implemented:
Power and grounding recommendations
When designing a printed-circuit board for applications
such as PC cameras, surveillance cameras, camcorders
and digital still cameras, care should be taken to minimize
the noise.
• All the analog and digital supply pins must be decoupled
to the analog ground plane. Only the ground pin
associated with the digital outputs must be connected to
the digital ground plane. All the other ground pins should
be connected to the analog ground plane. The analog
and digital ground planes must be connected together at
one point as close as possible to the ground pin
associated with the digital outputs.
For the front-end integrated circuit, the basic rules
of printed-circuit board design and implementation
of analog components (such as additional operational
amplifiers) must be respected, particularly with respect
to power and ground connections.
• The digital output pins and their associated lines should
be shielded by the digital ground plane which can then
be used as a return path for digital signals.
The following additional recommendation is given for the
CDS input pin(s) which is /are internally connected to the
programmable gain amplifier.
The connections between the CCD interface and
CDS input should be as short as possible and a ground
ring protection around these connections can be
beneficial. Separate analog and digital supplies provide
the best solution. If this is not possible to do this on the
board then the analog supply pins must be decoupled
effectively from the digital supply pins. If the same power
supply and ground are used for all the pins then the
decoupling capacitors must be placed as close as possible
to the IC package.
2000 Nov 14
17
Philips Semiconductors
Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
interface for CCD cameras
TDA8787A
Application diagram
V
V
CCA
100 nF
CCD
100 nF
1 µF
V
(2) (2)
CCD
CCD
(2)
1 µF
48 47 46 45 44 43 42 41 40 39 38 37
V
D9
CCD3
1
V
36
35
34
33
32
31
30
29
28
27
26
25
CCD
DGND3
AGND4
IN
D8
1 µF
2
D7
3
D6
4
AGND1
D5
5
100
nF
V
D4
CCA1
V
CCA
6
TDA8787AHL
CPCDS1
CPCDS2
OFDOUT
STDBY
BLK
D3
7
D2
1 µF
8
D1
9
1 µF
D0
10
11
12
OGND
V
CLPDM
CCO
V
CCD
100
nF
13 14 15 16 17 18 19 20 21 22 23 24
V
CCD
(1)
serial interface
100
nF
100
nF
V
V
CCD
CCA
FCE336
(1) Pins SEN and VSYNC should be interconnected when no vertical synchronization signal is available, while control pin VSYNC should be
programmed by serial interface as LOW-level active.
(2) The timing of the signals on pins IN, SHD and SHP has to comply with the hold times th(IN-SHP) and th(IN-SHD) (see Fig.3).
Fig.11 Application diagram.
2000 Nov 14
18
Philips Semiconductors
Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
interface for CCD cameras
TDA8787A
PACKAGE OUTLINE
LQFP48: plastic low profile quad flat package; 48 leads; body 7 x 7 x 1.4 mm
SOT313-2
c
y
X
36
25
A
E
37
24
Z
E
e
H
E
A
2
A
(A )
3
A
1
w M
p
θ
pin 1 index
b
L
p
L
13
48
detail X
1
12
Z
v M
D
A
e
w M
b
p
D
B
H
v
M
B
D
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
D
H
L
L
v
w
y
Z
Z
E
θ
1
2
3
p
E
p
D
max.
7o
0o
0.20 1.45
0.05 1.35
0.27 0.18 7.1
0.17 0.12 6.9
7.1
6.9
9.15 9.15
8.85 8.85
0.75
0.45
0.95 0.95
0.55 0.55
1.60
mm
0.25
0.5
1.0
0.2 0.12 0.1
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
99-12-27
00-01-19
SOT313-2
136E05
MS-026
2000 Nov 14
19
Philips Semiconductors
Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
interface for CCD cameras
TDA8787A
SOLDERING
If wave soldering is used the following conditions must be
observed for optimal results:
Introduction to soldering surface mount packages
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering is not always suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
Reflow soldering
The footprint must incorporate solder thieves at the
downstream end.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Wave soldering
Manual soldering
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
To overcome these problems the double-wave soldering
method was specifically developed.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
2000 Nov 14
20
Philips Semiconductors
Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
interface for CCD cameras
TDA8787A
Suitability of surface mount IC packages for wave and reflow soldering methods
SOLDERING METHOD
PACKAGE
WAVE
REFLOW(1)
BGA, SQFP
not suitable
suitable
suitable
suitable
suitable
suitable
HLQFP, HSQFP, HSOP, HTSSOP, SMS not suitable(2)
PLCC(3), SO, SOJ
LQFP, QFP, TQFP
SSOP, TSSOP, VSO
suitable
not recommended(3)(4)
not recommended(5)
Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
2000 Nov 14
21
Philips Semiconductors
Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
interface for CCD cameras
TDA8787A
DATA SHEET STATUS
PRODUCT
DATA SHEET STATUS
STATUS
DEFINITIONS (1)
Objective specification
Development This data sheet contains the design target or goal specifications for
product development. Specification may change in any manner without
notice.
Preliminary specification Qualification
This data sheet contains preliminary data, and supplementary data will be
published at a later date. Philips Semiconductors reserves the right to
make changes at any time without notice in order to improve design and
supply the best possible product.
Product specification
Production
This data sheet contains final specifications. Philips Semiconductors
reserves the right to make changes at any time without notice in order to
improve design and supply the best possible product.
Note
1. Please consult the most recently issued data sheet before initiating or completing a design.
DEFINITIONS
DISCLAIMERS
Short-form specification
The data in a short-form
Life support applications
These products are not
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Right to make changes
Philips Semiconductors
reserves the right to make changes, without notice, in the
products, including circuits, standard cells, and/or
software, described or contained herein in order to
improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
the use of any of these products, conveys no licence or title
under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that
these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified.
Application information
Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
2000 Nov 14
22
Philips Semiconductors
Product specification
10-bit, 3.0 V, up to 25 Msps analog-to-digital
interface for CCD cameras
TDA8787A
NOTES
2000 Nov 14
23
Philips Semiconductors – a worldwide company
Argentina: see South America
Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,
Tel. +31 40 27 82785, Fax. +31 40 27 88399
Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140,
Tel. +61 2 9704 8141, Fax. +61 2 9704 8139
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,
Tel. +64 9 849 4160, Fax. +64 9 849 7811
Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213,
Tel. +43 1 60 101 1248, Fax. +43 1 60 101 1210
Norway: Box 1, Manglerud 0612, OSLO,
Tel. +47 22 74 8000, Fax. +47 22 74 8341
Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6,
220050 MINSK, Tel. +375 172 20 0733, Fax. +375 172 20 0773
Pakistan: see Singapore
Belgium: see The Netherlands
Brazil: see South America
Philippines: Philips Semiconductors Philippines Inc.,
106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474
Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor,
51 James Bourchier Blvd., 1407 SOFIA,
Tel. +359 2 68 9211, Fax. +359 2 68 9102
Poland: Al.Jerozolimskie 195 B, 02-222 WARSAW,
Tel. +48 22 5710 000, Fax. +48 22 5710 001
Portugal: see Spain
Romania: see Italy
Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,
Tel. +1 800 234 7381, Fax. +1 800 943 0087
China/Hong Kong: 501 Hong Kong Industrial Technology Centre,
72 Tat Chee Avenue, Kowloon Tong, HONG KONG,
Tel. +852 2319 7888, Fax. +852 2319 7700
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,
Tel. +7 095 755 6918, Fax. +7 095 755 6919
Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762,
Colombia: see South America
Czech Republic: see Austria
Tel. +65 350 2538, Fax. +65 251 6500
Slovakia: see Austria
Slovenia: see Italy
Denmark: Sydhavnsgade 23, 1780 COPENHAGEN V,
Tel. +45 33 29 3333, Fax. +45 33 29 3905
South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,
2092 JOHANNESBURG, P.O. Box 58088 Newville 2114,
Tel. +27 11 471 5401, Fax. +27 11 471 5398
Finland: Sinikalliontie 3, FIN-02630 ESPOO,
Tel. +358 9 615 800, Fax. +358 9 6158 0920
France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex,
Tel. +33 1 4099 6161, Fax. +33 1 4099 6427
South America: Al. Vicente Pinzon, 173, 6th floor,
04547-130 SÃO PAULO, SP, Brazil,
Tel. +55 11 821 2333, Fax. +55 11 821 2382
Germany: Hammerbrookstraße 69, D-20097 HAMBURG,
Tel. +49 40 2353 60, Fax. +49 40 2353 6300
Spain: Balmes 22, 08007 BARCELONA,
Tel. +34 93 301 6312, Fax. +34 93 301 4107
Hungary: see Austria
Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. +46 8 5985 2000, Fax. +46 8 5985 2745
India: Philips INDIA Ltd, Band Box Building, 2nd floor,
254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025,
Tel. +91 22 493 8541, Fax. +91 22 493 0966
Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. +41 1 488 2741 Fax. +41 1 488 3263
Indonesia: PT Philips Development Corporation, Semiconductors Division,
Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510,
Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080
Taiwan: Philips Semiconductors, 5F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. +886 2 2134 2451, Fax. +886 2 2134 2874
Ireland: Newstead, Clonskeagh, DUBLIN 14,
Tel. +353 1 7640 000, Fax. +353 1 7640 200
Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
60/14 MOO 11, Bangna Trad Road KM. 3, Bagna, BANGKOK 10260,
Tel. +66 2 361 7910, Fax. +66 2 398 3447
Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053,
TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007
Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye,
ISTANBUL, Tel. +90 216 522 1500, Fax. +90 216 522 1813
Italy: PHILIPS SEMICONDUCTORS, Via Casati, 23 - 20052 MONZA (MI),
Tel. +39 039 203 6838, Fax +39 039 203 6800
Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461
Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku,
TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5057
United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. +44 208 730 5000, Fax. +44 208 754 8421
Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,
Tel. +82 2 709 1412, Fax. +82 2 709 1415
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381, Fax. +1 800 943 0087
Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,
Tel. +60 3 750 5214, Fax. +60 3 757 4880
Uruguay: see South America
Vietnam: see Singapore
Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,
Tel. +9-5 800 234 7381, Fax +9-5 800 943 0087
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Middle East: see Italy
Tel. +381 11 3341 299, Fax.+381 11 3342 553
For all other countries apply to: Philips Semiconductors,
Marketing Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN,
The Netherlands, Fax. +31 40 27 24825
Internet: http://www.semiconductors.philips.com
70
SCA
© Philips Electronics N.V. 2000
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
753504/03/pp24
Date of release: 2000 Nov 14
Document order number: 9397 750 07755
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