TDA9859 [NXP]

Universal hi-fi audio processor for TV; 电视通用您好Fi音频处理器
TDA9859
型号: TDA9859
厂家: NXP    NXP
描述:

Universal hi-fi audio processor for TV
电视通用您好Fi音频处理器

电视
文件: 总20页 (文件大小:117K)
中文:  中文翻译
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INTEGRATED CIRCUITS  
DATA SHEET  
TDA9859  
Universal hi-fi audio processor for  
TV  
1997 Sep 01  
Preliminary specification  
File under Integrated Circuits, IC02  
Philips Semiconductors  
Preliminary specification  
Universal hi-fi audio processor for TV  
TDA9859  
FEATURES  
Multi-source selector switches six AF inputs  
(three stereo sources or six mono sources)  
Each of the input signals can be switched to each of the  
outputs (crossbar switch)  
Outputs for loudspeaker channel and peri-TV connector  
(SCART)  
GENERAL DESCRIPTION  
Switchable spatial stereo and pseudo stereo effects  
Audio surround decoder can be added externally  
Two general purpose logic output ports  
I2C-bus control of all functions.  
The TDA9859 provides control facilities for the main and  
the SCART channel of a TV set. Due to extended  
switching possibilities, signals from three stereo sources  
can be handled.  
QUICK REFERENCE DATA  
SYMBOL  
VP  
PARAMETER  
positive supply voltage (pin 6)  
MIN.  
7.2  
TYP.  
8.0  
MAX.  
8.8  
UNIT  
V
IP  
supply current  
2
2
25  
mA  
V
Vi(rms)  
Vo(rms)  
Gv  
input signal levels for 0 dB gain (RMS value)  
output signal levels for 0 dB gain (RMS value)  
voltage gain in main channel  
volume control (1 dB steps, balance included)  
mute  
V
63  
80  
12  
12  
+15  
dB  
dB  
dB  
dB  
%
bass control (1.5 dB steps)  
treble control (3 dB steps)  
total harmonic distortion  
+15  
+12  
THD  
S/N  
0.1  
85  
signal-to-noise ratio  
dB  
°C  
Tamb  
operating ambient temperature  
0
70  
ORDERING INFORMATION  
TYPE  
PACKAGE  
NUMBER  
NAME  
DESCRIPTION  
VERSION  
TDA9859  
SDIP32  
plastic shrink dual in-line package; 32 leads (400 mil)  
SOT232-1  
1997 Sep 01  
2
Philips Semiconductors  
Preliminary specification  
Universal hi-fi audio processor for TV  
TDA9859  
BLOCK DIAGRAM  
HM7A8  
e
1997 Sep 01  
3
Philips Semiconductors  
Preliminary specification  
Universal hi-fi audio processor for TV  
TDA9859  
PINNING  
SYMBOL PIN  
DESCRIPTION  
SCINL  
P1  
1
2
3
SCART input; left channel  
port 1 output  
MINL  
CSMO  
MAIN input; left channel  
smoothing capacitor of reference  
voltage  
4
MINR  
VP  
5
6
7
8
9
MAIN input; right channel  
supply voltage  
SCOUTR  
GND  
SCART output; right channel  
ground  
handbook, halfpage  
SCIN  
SCIN  
32  
1
2
L
R
MOUTR  
LINR  
MAIN output; right channel  
P1  
P2  
AIN  
C
31  
30  
29  
28  
27  
26  
10 input to right loudspeaker channel  
MIN  
3
L
R
CBR1  
bass capacitor connection 1;  
right channel  
11  
C
SMO  
4
PS1  
MIN  
AIN  
5
R
L
CBR2  
bass capacitor connection 2;  
right channel  
12  
V
C
6
P
R
PS2  
n.c.  
CTR  
13 not connected  
SCOUT  
SCOUT  
7
L
treble capacitor connection;  
right channel  
14  
GND  
8
25 MAD  
TDA9859  
MOUT  
24  
MOUT  
9
L
R
LOUTR  
SCL  
15 loudspeaker output; right channel  
16 serial clock input; I2C-bus  
17 serial data input/output; I2C-bus  
LIN  
LIN  
C
10  
11  
12  
23  
22  
21  
20  
19  
18  
17  
R
L
SDA  
C
C
BR1  
BL1  
BL2  
LOUTL  
CTL  
18 loudspeaker output; left channel  
C
BR2  
treble capacitor connection;  
left channel  
n.c.  
n.c. 13  
19  
C
C
14  
15  
TR  
TL  
n.c.  
20 not connected  
LOUT  
LOUT  
SDA  
R
L
CBL2  
bass capacitor connection 2;  
left channel  
21  
SCL 16  
CBL1  
bass capacitor connection 1;  
left channel  
MHA779  
22  
LINL  
23 input to left loudspeaker channel  
24 MAIN output; left channel  
25 module address select input  
26 SCART output; left channel  
27 pseudo stereo capacitor 2  
28 AUX input; left channel  
29 pseudo stereo capacitor 1  
30 AUX input; right channel  
31 port 2 output  
MOUTL  
MAD  
SCOUTL  
CPS2  
AINL  
CPS1  
AINR  
P2  
Fig.2 Pin configuration.  
SCINR  
32 SCART input signal RIGHT  
1997 Sep 01  
4
Philips Semiconductors  
Preliminary specification  
Universal hi-fi audio processor for TV  
TDA9859  
simultaneously; the left/right part (23 to 0 dB) controls the  
volume of left and right channels independently. Treble  
control provides a control range from 12 to +12 dB and  
bass control from 12 to +15 dB. Extended bass control  
can be provided by an external T-network (see Fig.1) from  
15 to +19 dB (2 dB steps).  
FUNCTIONAL DESCRIPTION  
The TDA9859 consists of the following functions:  
Source select switching block  
Loudspeaker channel with effect controls  
Two port outputs for general purpose  
I2C-bus control.  
Effect controls  
‘Linear stereo’, ‘stereo with spatial effect (30% or 52%  
anti-phase crosstalk)’ and ‘forced mono with or without  
pseudo-stereo effect’ are controlled by three bits. A muting  
of 85 dB is provided.  
Source select switching block  
The TDA9859 selects and switches the input signals from  
three stereo or six mono sources MAIN, AUX and SCART  
(see Fig.1) to the outputs SCART and loudspeaker  
(crossbar-switching; Table 4). The main channel (LINE  
outputs) is looped outside the circuit (from pins 9 and 24 to  
pins 10 and 23), so signals can be used as LINE output or  
a surround sound decoder can be inserted.  
I2C-bus control  
All settings of control are stored in subaddress registers.  
Data transmission is simplified by auto-incrementing the  
subaddresses. The on-chip Power-on reset sets the mute  
bit to active, so both the SCART and the loudspeaker  
outputs are muted.  
Loudspeaker channel  
Volume control is divided into volume control common and  
volume control left/right. The common part  
(40 to +15 dB) controls the left and right channels  
The muting can be switched off by writing a ‘0’ (non-muted)  
into the mute control bits.  
LIMITING VALUES  
In accordance with the Absolute Maximum Rating System (IEC 134).  
SYMBOL PARAMETER  
VP  
MIN.  
MAX.  
UNIT  
supply voltage (pin 6)  
0
0
10  
VP  
V
V
Vn  
IO  
voltage on all pins, ground excluded  
output current  
at LOUT and SCOUT pins  
at port output pins  
0
2.5  
mA  
mA  
mW  
°C  
°C  
V
1.5  
Ptot  
total power dissipation  
850  
Tamb  
Tstg  
Ves  
operating ambient temperature  
storage temperature  
70  
25  
+150  
±300  
±2000  
electrostatic handling for all pins; note 1  
electrostatic handling for all pins; note 2  
V
Notes  
1. Equivalent to discharging a 200 pF capacitor through a 0 series resistor (Machine Model).  
2. Equivalent to discharging a 100 pF capacitor through a 1.5 kseries resistor (Human Body Model).  
THERMAL CHARACTERISTICS  
SYMBOL  
PARAMETER  
CONDITIONS  
in free air  
VALUE  
UNIT  
K/W  
Rth(j-a)  
thermal resistance from junction to ambient  
60  
1997 Sep 01  
5
Philips Semiconductors  
Preliminary specification  
Universal hi-fi audio processor for TV  
TDA9859  
CHARACTERISTICS  
VP = 8 V; Tamb = 25 °C; treble and bass in linear positions (0 dB); volume control left/right 0 dB; spatial function,  
pseudo-stereo function and forced-mono function in off position and measurements taken in Fig.1; unless otherwise  
specified.  
SYMBOL  
VP  
PARAMETER  
supply voltage (pin 6)  
CONDITIONS  
MIN.  
7.2  
TYP.  
8.0  
MAX.  
8.8  
UNIT  
V
IP  
supply current (pin 6)  
internal reference voltage  
voltage at pin 4  
25  
mA  
V
Vref  
V4  
0.5VP  
VP 0.1  
V
DC voltage on pins  
VI  
DC input voltage at pins 1, 3, 5, 10, 23,  
28, 30 and 32 (inputs SCIN, MIN, LIN  
and AIN)  
0.5VP  
0.5VP  
0.5VP  
V
V
V
VO  
VC  
DC output voltage at pins 7, 9, 15, 18,  
24, 26 (outputs SCOUT, MOUT  
and LOUT)  
DC voltage on capacitors (pins 11, 12,  
14, 19, 21, 22, 27 and 29)  
Audio select switch; line and SCART outputs (controlled via I2C-bus); see Table 4  
Vi(rms)  
maximum AF input signal on  
THD 0.5% on output  
2
V
pins SCIN, MIN and AIN (RMS value)  
pins  
Ri  
input resistance (pins SCIN, MIN and  
AIN)  
20  
20  
2
30  
40  
kΩ  
Hz  
V
B0.5 dB  
Vo(rms)  
RL  
0.5 dB bandwidth for pins SCOUT,  
MOUT and LOUT.  
20000  
maximum AF output signal on  
pins SCOUT and MOUT (RMS value)  
THD 0.5%  
allowed external load resistance  
on output (pins MOUT)  
10  
5
0
kΩ  
kΩ  
dB  
on output (pins SCOUT)  
Gv  
voltage gain from any input to SCART  
and MAIN outputs  
αcr  
switch crosstalk on outputs between  
AF inputs at f = 10 kHz  
unused inputs connected  
to ground  
90  
dB  
Volume control common (f = 1 kHz, 55 steps)  
Vi(rms)  
maximum input signal (RMS value;  
pins LIN)  
Gv = 0; THD 0.5% on  
output pins 15 and 18  
2
V
Ri  
input resistance (pins LIN)  
volume control common voltage gain  
nominal  
7.5  
10  
kΩ  
Gv  
40  
38  
+15  
+14  
dB  
dB  
minimum  
1997 Sep 01  
6
Philips Semiconductors  
Preliminary specification  
Universal hi-fi audio processor for TV  
TDA9859  
SYMBOL  
Gv  
PARAMETER  
CONDITIONS  
MIN.  
TYP.  
1.0  
MAX.  
1.5  
UNIT  
dB  
volume control common voltage gain  
step width  
Gv = 32 to +15 dB  
Gv = 40 to 33 dB  
Gv = 32 to +15 dB  
Gv = 40 to 33 dB  
0.5  
0.25 1.0  
1.75  
1
dB  
volume control common voltage gain  
set error  
dB  
2
dB  
Volume control left/right (f = 1 kHz, 24 steps)  
Gv  
volume control left/right voltage gain  
nominal  
24  
23  
80  
0.5  
0
dB  
dB  
dB  
dB  
minimum  
1  
mute position  
85  
1.0  
Gv  
volume control left/right voltage gain  
step width  
1.5  
volume control left/right voltage gain  
tracking error  
2
dB  
Bass control  
Gv  
bass control voltage gain  
maximum boost  
CB = 33 nF  
f = 40 Hz  
f = 40 Hz  
14  
11  
1
15  
12  
1.5  
16  
13  
2
dB  
dB  
dB  
maximum attenuation  
Gv  
bass control voltage gain step width  
Gv(extended) extended bass control voltage gain  
maximum boost  
see Fig.1  
f = 60 Hz  
f = 60 Hz  
18  
14  
1
19  
15  
2
20  
16  
3
dB  
dB  
dB  
maximum attenuation  
Gv(extended) extended bass control voltage gain step  
width  
Treble control  
Gv  
treble control voltage gain  
maximum boost  
f = 15 kHz  
f = 15 kHz  
11  
12  
12  
3
13  
13  
3.5  
dB  
dB  
dB  
maximum attenuation  
11  
Gv  
treble control voltage gain step width  
2.5  
Effect controls  
αct(spat1)  
αct(spat2)  
ϕ
anti-phase crosstalk by spatial effect 1  
52  
%
%
anti-phase crosstalk by spatial effect 2  
phase shift by pseudo-stereo  
30  
see Fig.3  
Loudspeaker channel outputs (pins 15 and 18)  
Vo(max)(rms) maximum output signal (RMS value)  
THD 0.5%; RL > 10 k;  
2
V
CL < 1.5 nF  
1997 Sep 01  
7
Philips Semiconductors  
Preliminary specification  
Universal hi-fi audio processor for TV  
TDA9859  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN.  
TYP.  
MAX.  
UNIT  
V15,18  
maximum DC offset voltage between  
adjoining step and any step to mute  
for volume control  
Gv = 0 to +15 dB/mute  
Gv = 64 to 0 dB/mute  
Gv = 0 to +15 dB/mute  
Gv = 12 to 0 dB/mute  
Gv = 12 to +12 dB/mute  
2
15  
mV  
mV  
mV  
mV  
mV  
0.5  
2
10  
15  
10  
10  
100  
for bass control  
0.5  
0.5  
for treble control  
Ro  
output resistance  
Ro(L)  
Co(L)  
Vno(W)  
allowed output load resistor  
allowed output load capacitor  
10  
kΩ  
nF  
1.5  
weighted noise voltage at output  
(quasi-peak level)  
CCIR 468-3 weighted  
Gv = +15 dB  
102  
32  
27  
20  
µV  
µV  
µV  
µV  
Hz  
Gv = 0 dB  
Gv = 40 dB  
Gv = 80 dB (mute)  
B1 dB  
THD  
1 dB bandwidth for loudspeaker  
channel  
20  
20000  
total harmonic distortion  
for Vi(rms) = 0.2 V  
f = 20 to 12500 Hz  
Gv = 30 to +15 dB  
Gv = 30 to 0 dB  
Gv = 30 to 6 dB  
0.1  
0.1  
0.1  
75  
0.3  
0.3  
0.3  
%
%
%
dB  
for Vi(rms) = 1 V  
for Vi(rms) = 2 V  
αcs(l-r)  
stereo channel separation  
f = 10 kHz; Gv = 0 dB;  
opposite input grounded  
by 1 kresistor  
crosstalk from I2C-bus to AF outputs  
V
αct(bus)  
Gv = 0 dB  
100  
55  
dB  
dB  
αbus = 20 log bus(p-p) (Vbus = spurious  
--------------------  
Vo(rms)  
I2C-bus signal voltage on AF output).  
PSRR100  
power supply ripple rejection with  
100 Hz ripple  
Gv = 0 dB;  
VR(rms) < 200 mV  
SCART output (pins 7 and 26)  
Vo(max)(rms) maximum output signal (RMS value)  
THD 0.5%; RL > 5 kΩ  
2
5
V
Ro(L)  
Power-on reset  
VPONR increasing supply voltage  
output load resistor  
kΩ  
start of reset  
2.5  
6.8  
6.0  
V
V
V
end of reset  
5.2  
4.4  
6.0  
5.2  
VPONR  
decreasing supply voltage start of reset  
I2C-bus, SCL and SDA (pins 16 and 17)  
VIH  
HIGH-level input voltage  
3
VP  
V
1997 Sep 01  
8
Philips Semiconductors  
Preliminary specification  
Universal hi-fi audio processor for TV  
TDA9859  
SYMBOL  
VIL  
PARAMETER  
LOW-level input voltage  
input current  
CONDITIONS  
MIN.  
TYP.  
MAX.  
1.5  
UNIT  
0
V
II  
±10  
µA  
VACK  
output voltage at acknowledge (pin 17) I17 = 3 mA  
0.4  
V
Module address (pin 25)  
VIL  
VIH  
LOW-level input voltage  
HIGH-level input voltage  
0
3
1.5  
VP  
V
V
Port outputs P1 and P2 (open-collector outputs pins 2 and 31)  
VOL  
LOW-level output voltage  
port output sink current  
IO(sink) = 1 mA  
0.3  
1
V
IO(sink)  
mA  
1997 Sep 01  
9
Philips Semiconductors  
Preliminary specification  
Universal hi-fi audio processor for TV  
TDA9859  
I2C-BUS PROTOCOL  
This circuit operates as a slave receiver only. For more information about the I2C-bus, see “The I2C-bus and how to use  
it”, order number 9398 393 40011.  
I2C-bus format  
S
SLAVE ADDRESS  
W
A
SUBADDRESS  
A
DATA(1)  
A(1)  
P
Note  
1. Multiple DATA-A (acknowledge) sequences may occur.  
Table 1 Explanation of I2C-bus format  
NAME  
DESCRIPTION  
S
START condition (SCL HIGH, SDA HIGH-to-LOW)  
100 0000 (V25 = LOW) or 100 0001 (V25 = HIGH)  
0
SLAVE ADDRESS  
W
A
acknowledge (SDA = LOW); generated by the device  
subaddress (byte); see Table 2  
SUBADDRESS  
DATA(1)  
data byte; see Table 2  
P
STOP condition (SCL = HIGH, SDA = LOW-to-HIGH)  
Note  
1. If more than 1 byte of DATA is transmitted, then auto-increment of the subaddress is performed by the device.  
Table 2 I2C-bus transmission  
SUBADDRESS  
DATA BITS  
FUNCTION  
BINARY  
HEX  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
Loudspeaker channel  
Volume control common  
Volume control left  
Volume control right  
Bass control  
0000 0000  
0000 0001  
0000 0010  
0000 0011  
0000 0100  
00  
01  
02  
03  
04  
0
0
0
0
0
0
0
0
0
0
V05  
0
V04  
VL4  
VR4  
BA4  
0
V03  
VL3  
VR3  
BA3  
TR3  
V02  
VL2  
VR2  
BA2  
TR2  
V01  
VL1  
VR1  
BA1  
TR1  
V00  
VL0  
VR0  
BA0  
TR0  
0
0
Treble control  
0
Switching control byte  
SCART output(1)  
0000 1000  
0000 1001  
08  
09  
0
MU1  
MU2  
P1  
P2  
ST  
I13  
I23  
I12  
I22  
I11  
I21  
I10  
I20  
Loudspeaker output  
EF2  
EF1  
Note  
1. If auto-increment of the subaddress is used, it is necessary to insert three dummy data words between the treble  
control byte and the switching control bytes.  
1997 Sep 01  
10  
Philips Semiconductors  
Preliminary specification  
Universal hi-fi audio processor for TV  
TDA9859  
Table 3 Function of the bits in Table 2  
BITS  
FUNCTION  
V00 to V05  
VL0 to VL4  
VR0 to VR4  
BA0 to BA4  
TR0 to TR3  
I10 to I13  
volume control common for loudspeaker channel; see Table 9  
volume control for left loudspeaker channel; see Table 6  
volume control for right loudspeaker channel; see Table 6  
bass control for left and right loudspeaker channels; see Table 7  
treble control for left and right loudspeaker channels; see Table 8  
input selection for SCART channels; see Table 4  
I20 to I23  
input selection for loudspeaker channels; see Table 4  
MU1 and MU2  
mute control bits (MU1 for SCART channel, MU2 for loudspeaker channel)  
0 = channel not muted  
1 = channel muted  
EF1, EF2 and ST  
P1 and P2  
effect control bits for loudspeaker channel; see Table 5  
control bits for ports P1 (pin 2) and P2 (pin 31)  
control bit = 0: ports P1 = LOW  
control bit = 1: ports P1 = HIGH  
Table 4 Input selection  
BITS OF DATA BYTE 8 AND 9  
INPUT  
HEX  
D7  
D6  
MU  
MU  
MU  
MU  
MU  
MU  
MU  
MU  
MU  
D5  
D4  
D3  
1
D2  
0
D1  
1
D0  
1
(1)  
(1)  
(1)  
AUX LEFT  
XB(1)  
X9(1)  
X7(1)  
XA(1)  
X5(1)  
X6(1)  
XC(1)  
XD(1)  
X8(1)  
(1)  
(1)  
(1)  
(1)  
(1)  
(1)  
(1)  
(1)  
(1)  
(1)  
(1)  
(1)  
(1)  
(1)  
(1)  
(1)  
(1)  
(1)  
(1)  
(1)  
(1)  
(1)  
(1)  
(1)  
AUX RIGHT  
1
0
0
1
AUX STEREO  
SCART LEFT  
SCART RIGHT  
SCART STEREO  
MAIN LEFT  
0
1
1
1
1
0
1
0
0
1
0
1
0
1
1
0
1
1
0
0
MAIN RIGHT  
MAIN STEREO  
1
1
0
1
1
0
0
0
Note  
1. Byte 8 (SCART channels): The value of X depends on MU1 and control bits P1 and P2.  
Byte 9 (loudspeaker channels): see Table 5 for the programming of these bits. The value of X depends on the  
selected effects and MU2.  
1997 Sep 01  
11  
Philips Semiconductors  
Preliminary specification  
Universal hi-fi audio processor for TV  
TDA9859  
Table 5 Effect controls  
DATA BYTE TO SUBADDRESS 09  
SETTING SPECIAL EFFECTS  
HEX  
EF2  
1
MU2  
EF1  
1
ST  
1
I23  
I22  
I21  
I20  
(1)  
(1)  
(1)  
(1)  
Stereo with spatial effect 1 (52%)  
Stereo with spatial effect 2 (30%)  
Stereo without spatial effect  
BX(1)  
3X(1)  
1X(1)  
2X(1)  
0
0
0
0
0
(1)  
(1)  
(1)  
(1)  
(1)  
(1)  
(1)  
(1)  
(1)  
(1)  
(1)  
(1)  
(1)  
(1)  
(1)  
(1)  
0
1
1
0
0
1
Forced mono with pseudo stereo  
Forced mono without pseudo stereo 0X(1)  
0
1
0
0
0
0
Note  
1. See Table 4. The value of X depends on the selected input.  
Table 6 Volume control left/right  
DATA BITS  
Table 7 Bass control  
DATA BITS  
Gv  
Gv  
(dB)  
(dB)  
VL4  
VR4  
VL3  
VR3  
VL2  
VR2  
VL1  
VR1  
VL0  
VR0  
HEX  
BA4  
BA3  
BA2  
BA1  
BA0  
HEX  
+15  
+13.5  
+12  
+10.5  
+9  
19  
18  
17  
16  
15  
14  
13  
12  
11  
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
1  
1F  
1E  
1D  
1C  
1B  
1A  
19  
18  
17  
16  
15  
14  
13  
12  
11  
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
2  
3  
+7.5  
+6  
4  
5  
+4.5  
+3  
6  
7  
+1.5  
0
10  
0F  
0E  
0D  
0C  
0B  
0A  
09  
08  
07  
06  
8  
9  
0
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
Mute  
1.5  
3  
4.5  
6  
7.5  
9  
10  
0F  
0E  
0D  
0C  
0B  
0A  
09  
08  
07  
10.5  
12  
1997 Sep 01  
12  
Philips Semiconductors  
Preliminary specification  
Universal hi-fi audio processor for TV  
TDA9859  
Table 8 Treble control  
DATA BITS  
Gv  
DATA BITS  
HEX V05 V04 V03 V02 V01 V00  
Gv  
(dB)  
(dB)  
HEX  
0
TR3  
TR2  
TR1  
TR0  
+12  
+9  
+6  
+3  
0
0A  
09  
08  
07  
06  
05  
04  
03  
02  
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
7  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
1F  
1E  
1D  
1C  
1B  
1A  
19  
18  
17  
16  
15  
14  
13  
12  
11  
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
8  
9  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
33  
34  
35  
36  
37  
38  
39  
40  
3  
6  
9  
12  
Table 9 Volume control common  
DATA BITS  
HEX V05 V04 V03 V02 V01 V00  
Gv  
(dB)  
+15  
+14  
+13  
+12  
+11  
+10  
+9  
+8  
+7  
+6  
+5  
+4  
+3  
+2  
+1  
0
3F  
3E  
3D  
3C  
3B  
3A  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
2F  
2E  
2D  
2C  
2B  
2A  
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
10  
0F  
0E  
0D  
0C  
0B  
0A  
09  
08  
1  
2  
3  
4  
5  
6  
1997 Sep 01  
13  
Philips Semiconductors  
Preliminary specification  
Universal hi-fi audio processor for TV  
TDA9859  
MHA311  
0
(1)  
phase  
(degree)  
(2)  
100  
(3)  
200  
300  
400  
2
3
4
5
10  
10  
10  
10  
10  
f (Hz)  
(1) Normal effect; CPS1 = CPS2 = 15 nF.  
(2) Intensified effect; CPS1 = 47 nF; CPS2 = 5.6 nF.  
(3) More intensified effect; CPS1 = 68 nF; CPS2 = 5.6 nF.  
Fig.3 Pseudo stereo effect (phase) as a function of frequency.  
1997 Sep 01  
14  
Philips Semiconductors  
Preliminary specification  
Universal hi-fi audio processor for TV  
TDA9859  
PACKAGE OUTLINE  
SDIP32: plastic shrink dual in-line package; 32 leads (400 mil)  
SOT232-1  
D
M
E
A
2
A
A
L
1
c
(e )  
w M  
e
Z
1
b
1
M
H
b
32  
17  
pin 1 index  
E
1
16  
0
5
10 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
(1)  
A
max.  
A
A
2
max.  
(1)  
(1)  
Z
1
w
UNIT  
b
b
c
D
E
e
e
L
M
M
H
1
1
E
min.  
max.  
1.3  
0.8  
0.53  
0.40  
0.32  
0.23  
29.4  
28.5  
9.1  
8.7  
3.2  
2.8  
10.7  
10.2  
12.2  
10.5  
mm  
4.7  
0.51  
3.8  
1.778  
10.16  
0.18  
1.6  
Note  
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
EIAJ  
92-11-17  
95-02-04  
SOT232-1  
1997 Sep 01  
15  
Philips Semiconductors  
Preliminary specification  
Universal hi-fi audio processor for TV  
TDA9859  
with the joint for more than 5 seconds. The total contact  
time of successive solder waves must not exceed  
5 seconds.  
SOLDERING  
Introduction  
There is no soldering method that is ideal for all IC  
packages. Wave soldering is often preferred when  
through-hole and surface mounted components are mixed  
on one printed-circuit board. However, wave soldering is  
not always suitable for surface mounted ICs, or for  
printed-circuits with high population densities. In these  
situations reflow soldering is often used.  
The device may be mounted up to the seating plane, but  
the temperature of the plastic body must not exceed the  
specified maximum storage temperature (Tstg max). If the  
printed-circuit board has been pre-heated, forced cooling  
may be necessary immediately after soldering to keep the  
temperature within the permissible limit.  
Repairing soldered joints  
This text gives a very brief insight to a complex technology.  
A more in-depth account of soldering ICs can be found in  
our “IC Package Databook” (order code 9398 652 90011).  
Apply a low voltage soldering iron (less than 24 V) to the  
lead(s) of the package, below the seating plane or not  
more than 2 mm above it. If the temperature of the  
soldering iron bit is less than 300 °C it may remain in  
contact for up to 10 seconds. If the bit temperature is  
between 300 and 400 °C, contact may be up to 5 seconds.  
Soldering by dipping or by wave  
The maximum permissible temperature of the solder is  
260 °C; solder at this temperature must not be in contact  
DEFINITIONS  
Data sheet status  
Objective specification  
Preliminary specification  
Product specification  
This data sheet contains target or goal specifications for product development.  
This data sheet contains preliminary data; supplementary data may be published later.  
This data sheet contains final product specifications.  
Limiting values  
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or  
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation  
of the device at these or at any other conditions above those given in the Characteristics sections of the specification  
is not implied. Exposure to limiting values for extended periods may affect device reliability.  
Application information  
Where application information is given, it is advisory and does not form part of the specification.  
LIFE SUPPORT APPLICATIONS  
These products are not designed for use in life support appliances, devices, or systems where malfunction of these  
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for  
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such  
improper use or sale.  
PURCHASE OF PHILIPS I2C COMPONENTS  
Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the  
components in the I2C system provided the system conforms to the I2C specification defined by  
Philips. This specification can be ordered using the code 9398 393 40011.  
1997 Sep 01  
16  
Philips Semiconductors  
Preliminary specification  
Universal hi-fi audio processor for TV  
TDA9859  
NOTES  
1997 Sep 01  
17  
Philips Semiconductors  
Preliminary specification  
Universal hi-fi audio processor for TV  
TDA9859  
NOTES  
1997 Sep 01  
18  
Philips Semiconductors  
Preliminary specification  
Universal hi-fi audio processor for TV  
TDA9859  
NOTES  
1997 Sep 01  
19  
Philips Semiconductors – a worldwide company  
Argentina: see South America  
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Tel. +31 40 27 82785, Fax. +31 40 27 88399  
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Slovenia: see Italy  
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Tel. +90 212 279 2770, Fax. +90 212 282 6707  
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Tel. +1 800 234 7381  
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Tel. +82 2 709 1412, Fax. +82 2 709 1415  
Uruguay: see South America  
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Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,  
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Tel. +9-5 800 234 7381  
Middle East: see Italy  
For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications,  
Internet: http://www.semiconductors.philips.com  
Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825  
© Philips Electronics N.V. 1997  
SCA55  
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.  
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed  
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license  
under patent- or other industrial or intellectual property rights.  
Printed in The Netherlands  
547047/1200/01/pp20  
Date of release: 1997 Sep 01  
Document order number: 9397 750 02004  

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