TZA1032UK_技术文档

INTEGRATED CIRCUITS

DATA SHEET

TZA1032

Laser driver and controller circuit

Preliminary speciﬁcation

2002 May 06

Philips Semiconductors

Preliminary speciﬁcation

Laser driver and controller circuit

TZA1032

CONTENTS

8

FUNCTIONAL DIAGRAM

9

CHARACTERISTICS

1

2

3

4

5

6

7

FEATURES

10

11

12

13

14

15

APPLICATION INFORMATION

BONDING PAD LOCATIONS

DATA SHEET STATUS

DEFINITIONS

GENERAL DESCRIPTION

ORDERING INFORMATION

QUICK REFERENCE DATA

BLOCK DIAGRAM

DISCLAIMERS

PURCHASE OF PHILIPS I²C COMPONENTS

PINNING

FUNCTIONAL DESCRIPTION

7.1

7.2

7.3

7.4

7.5

7.6

7.7

7.8

The I²C-bus interface

Interrupt request

Soft reset and power-down

The Phase Locked Loop

The differential receiver

The RLC decoder

Write strategy generator

Laser Power Control

2002 May 06

2

Philips Semiconductors

Preliminary speciﬁcation

Laser driver and controller circuit

TZA1032

1

FEATURES

• Separate 3.3 V digital, analog and output driver power

supplies

• Selective power-down of internal functions via I²C-bus

for power saving

• Low voltage-swing of the differential Run Length Limited

Code (RLC) inputs for high speed transmission and

good electromagnetic compatibility

• Two output channels, delta and threshold current levels,

each capable of delivering 240 mA delta and 200 mA

threshold peak current to the output

• High-impedance input switching to control two or more

• Rise and fall times of 1 to 2 ns, depending on package

TZA1032 ICs in parallel for double writer applications

and laser

• Supports I²C-bus interface up to 400 kbits/s with block

• Typical output resistance of 120 Ω

transfer feature in slave mode only

• Programmable current step size for a threshold level of

0 to 1 mA at a 16-bit resolution, and a delta level of

0 to 1.2 mA at an 8-bit resolution

• 3.3 and 5 V tolerant input logic

• Supports any RLC code with run lengths from 1 to 15

• Automatic write-read switching for run lengths ≥16

• Internal modulator up to 565 MHz

• Forward Sense (FS) Laser Power Control (LPC) loop to

compensate laser drift due to temperature and aging

• Channel decoding rate up to 105 Mbits/s, according to

DVD 4×

• Internal set point generation to allow read-write

switching without any transient effects

• Look back function to enable write pre-compensation by

data dependent write strategy with a land-pit

compensation up to five

• Digital LPC algorithm based on FS feedback

• Single forward sense diode connection

• Supports Forced Erase (FE) mode for quick initialisation

of disc

• Programmable FS input current gain to allow for spread

• Fixed propagation delay within RLC clock periods to

in FS efficiency

allow accurate data linking on disc

• Supports running Optimum Power Control (OPC) loop,

so called alpha loop, to monitor and control the quality of

writing

• Supports CD-R, CD-RW, DVD+RW, DVD-R, DVD-RW

and DVR formats or any comparable existing or future

format

• Programmable write strategy via I²C-bus; completely

flexible up to a maximum of two output level transitions

per RLC clock period

• Programmable loop bandwidths: up to 1 kHz for the

LPC, and up to 50 kHz for the alpha loop

• Programmable minimum and maximum limiting of laser

currents and running OPC range

• Pulse timing resolution of 2 ns at 500 MHz internal clock

• Minimum pulse width of 4 ns at 500 MHz internal clock

• Programmable OPC stepper.

• Four programmable threshold current levels with an

8-bit resolution, and eight programmable delta levels

with an 8-bit resolution

2

GENERAL DESCRIPTION

The TZA1032 is a laser driver circuit which is intended for

a wide range of recordable and re-writable optical drives.

Figure 3 shows a function diagram of TZA1032 in relation

to a disc recording system. The TZA1032 is intended to be

located close to the laser diode on the Optical Pick-up

Unit (OPU). It can be used in CD-R/RW systems

with 1×, 2×, 4×, 8×, 12×, 16× and 24× (24× is not

guaranteed yet: evaluation pending) speed and in

DVD-R/RW systems with 1×, 2× and 4× speed (4× is not

guaranteed yet). Furthermore, it is suitable for future

standards like DVR.

• Independent laser threshold and laser delta current

control

• Programmable modulation unit

• Pointer memory mapping to allow compact write

strategy coding

• PLL oscillator features a self-learning oscillator mode for

non-locked operation during read

• Wide frequency range: PLL locking factor ≥2.5

2002 May 06

3

Philips Semiconductors

Preliminary speciﬁcation

Laser driver and controller circuit

TZA1032

The TZA1032 fulfils three main functions:

imperfections in the optical path and/or disc (e.g. finger

prints). The alpha signal is a measure of the power

absorption of the disc material during the writing process

or in general of the writing quality on the disc. For this

second loop, a method of stepping the set point under

external control is provided. The TZA1032 contains a

programmable counter that can be clocked via the

external OPC-strobe (pin OPC). This function is

typically used during OPC in order to calibrate the

optimum laser writing power.

• Drives the laser with a sequence of programmable write

strategy pulses with high timing accuracy and high peak

current levels

• Encodes the input modulated data to a sequence of

write strategy pulses. This encoding is flexible with

respect to input modulation code (EFM, EFMplus,

17 pp, etc.). Any RLC with run lengths in the range from

1 to 15 is possible. The write strategy is programmable

with high flexibility for CD-R/RW, DVD-R/RW, DVR or

other optical recording systems using comparable write

strategies. For this purpose the TZA1032 includes two

Random Access Memories (RAMs) which can be

loaded (non real-time) via an I²C-bus from a PC or

microcontroller

When required, non-real time control is possible via an

interrupt feedback signal at pin IRQ.

The TZA1032 can supply the analog, digital and driver part

separately to obtain maximum performance.

The TZA1032 features three independent power supplies.

These are the analog and digital power supplies and a

local power supply for the laser driver function. The

supplies can be delivered separately to obtain maximum

output performance of the TZA1032 in environments with

large and highly dynamic current flows. The driver supply

has no accompanying ground because the laser driver

block only sources current to the laser. Ensure that all

power supply pins are connected to the appropriate

voltage rails.

• Controls the exact light power levels coming from the

laser and controls the exact power absorbed by the disc

during recording. This is not trivial since the laser

characteristics (both threshold and gain) are strongly

temperature dependent. A first control loop controls the

laser power levels based on the signal from a forward

sense diode (FS control). This will make the laser

virtually temperature and aging independent. The loop is

fully self-contained, only an external forward sense

diode must be connected. A second control loop

controls the laser power based on an alpha signal,

generated by additional electronics based on signals

from the diode during writing. It is primarily intended to

compensate for writing performance variations due to

For evaluation purposes only (by special request) the

TZA1032 can be delivered in a LQFP64 package.

3

ORDERING INFORMATION

PACKAGE

TYPE NUMBER

NAME

DESCRIPTION

VERSION

TZA1032UK

−

bare die with solder bumps

−

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Philips Semiconductors

Preliminary speciﬁcation

Laser driver and controller circuit

TZA1032

4

QUICK REFERENCE DATA

SYMBOL

V_{DD[1 to 3]}

PARAMETER

CONDITION

MIN.

3.0

TYP.

MAX.

3.6

UNIT

output supply voltage

output current (threshold)

output current (delta)

output resistance

3.3

−

V

I_{OUT[1 to 3]}

1

0

−

200

240

−

mA

Ω

−

R_{OUT[1 to 3]}

t_r, t_f

120

rise and fall time

depends on package

and load

−

1 to 2

ns

rl_min

decodable run length

−3dB LPC bandwidth

−3dB alpha bandwidth

modulator frequency

1

−

15

−

B_LPC(−3dB)

B_{alpha(−3dB)}

f_mod

−

1

kHz

MHz

−

50

−

PLL locked to

external clock

250

565

PLL in Current

Controlled Oscillator

(CCO) mode

240

−

440

MHz

t_W(min)

t_res

minimum pulse width

timing resolution

4

2

−

ns

2002 May 06

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Philips Semiconductors

Preliminary speciﬁcation

Laser driver and controller circuit

TZA1032

5

BLOCK DIAGRAM

handbook, full pagewidth

43

ES

44

SAMPLE

TIMING

GENERATOR

ES

TZA1032UK

42

RDWR

1, 2, 49

threshold

RLC

DECODER

V

Data

DD

25

3

DATAP

DATAN

26

50, 51,

52

RLC to WS

& SETPOINT

POWER

MULTIPLYING

CURRENT

DACs

RLC

OUT[1 to 3]

DIFFERENTIAL

RECEIVER

delta

(8 bits)

Clk

24

23

CONVERTER

CLKP

CLKN

4

V

SS

31

32

REFH

REFL

ANALOG

REFERENCE

PLL

20

n.c.

LCA clock

LCD clock

P_readSet

P_writeSet

45

33

FS_ADC

FS

REFERENCE

DACs

CFS

LASER

CONTROL

DIGITAL

threshold (16 bits)

delta (8 bits)

LASER

CONTROL

ANALOG

Alpha_ADC

LasP_DAC

34

35

AMEAS

LASP

RDWR

LPC LOOP;

ALPHA LOOP

AND OPC

37

15

AEZ

OPC

5, 6, 7

9, 10

13

[

]

TEST 2 to 0

3

[

]

TEST_IN 1 to 0

2

40

41

14

TEST_CLK

to all blocks

SCL

SDA

IRQ

11, 12

[

]

TEST_OUT 1 to 0

TEST

INTERFACE

2

POWER-ON

RESET

2

I C-BUS

36

39

29

28

INTERFACE

FSPLUS

FSMIN

Supply

16

I2C_A0

IVREFCON

IVCON

ANALOG

POWER

DIGITAL

POWER

3

4

3

22, 27, 19, 30,

8, 17,

3, 18,

46

48

21, 38 47

MGW501

V

DDD

V

DDA

SSA

SSD

Fig.1 Block diagram.

6

2002 May 06

Philips Semiconductors

Preliminary speciﬁcation

Laser driver and controller circuit

TZA1032

6

PINNING

SYMBOL

PAD

TYPE

DESCRIPTION

V_DD2

1

2

P

O

laser driver power supply

IC digital ground

V_DD3

V_SSD3

V_SS

3

4

laser driver ground

V_DDD3

IRQ

8

IC digital power supply

14

interrupt request; digital output (open drain sink). IRQ is an active LOW

interrupt service request output line to the microprocessor. This line is set

(made LOW) by internal laser driver events and is cleared (made HIGH) when

a register in the laser driver is read via I²C-bus.

OPC

15

16

I

OPC strobe; digital input with pull-down resistor. The system controller during

OPC issues the OPC (strobe) signal. This signal tells the laser driver that a

step in a set point value should be made during OPC mode.

I2C_A0

digital input pin with pull-down resistor whose function is to select which

I²C-bus address range applies to the IC. This allows two laser drivers to be

used in parallel on one I²C-bus. This pin is also used as test mode selection

pin for test mode.

V_DDD1

V_SSD1

V_SSA1

V_SSD4

V_DDD4

V_DDA1

CLKN

17

18

19

20

21

22

23

P

I

IC digital power supply

IC digital ground

IC analog ground

not connected

IC digital power supply

IC analog power supply

clock pulse; analog current input. The anti-phase clock signal is used together

with CLKP to allow balanced transmission.

CLKP

24

25

I

clock pulse; analog current input. Provides clock reference for EFMplus data

plus the clock reference for the internal PLL.

DATAP

data input; analog current input. This is the input for the run length variable

code (in non-return to zero form) from which the laser driver knows which laser

pulses to generate.

DATAN

26

I

data input; analog current input. The anti-phase data signal (CLKN) used

together with DATAN to allow balanced transmission.

V_DDA2

V_SSA2

REFH

REFL

CFS

27

30

31

32

33

P

IC analog power supply

IC analog ground

O

band-gap reference output (for external smoothing capacitor)

band-gap ground connection (for external smoothing capacitor)

capacitor forward sense; analog connection for external smoothing capacitor.

An external capacitor of 560 pF combined with an internal resistor of 70 kΩ

can be used to create a RC ﬁlter for the FS input before the ADC unit in order

to prevent slew-rate effects. This capacitor is placed between this pin and

REFL.

2002 May 06

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Philips Semiconductors

Preliminary speciﬁcation

Laser driver and controller circuit

TZA1032

SYMBOL

PAD

TYPE

DESCRIPTION

AMEAS

34

I

alpha measure; analog current sink input. AMEAS (alpha measure) is the

value of the measured disk writing quality. This is used in the alpha control

loop in order to regulate the actual laser power as a function of non-laser

system and medium drift.

LASP

AEZ

35

37

O

I

laser power; analog current source output. Pin LASP indicates the laser power

level. The read power is constant and the write power level (which is added

during laser driver write mode) is alpha corrected. This signal is used in order

to normalise signals with respect to laser power.

alpha error zero; digital input with pull-down resistor. Depending on the

programming of an internal mode bit one of two effects occurs when this input

is asserted.

alpha error zero (AEZ): the output of the alpha error adder is forced to zero.

alpha set zero (ASZ): the alpha error adder positive input (i.e. the alpha set

point) is forced to zero.

V_DDD2

SCL

38

40

41

42

P

I

IC digital power supply

digital input for I²C-clock (the laser driver is a slave device)

digital bi-directional port with open-drain sink output for I²C-bus data

SDA

I/O

O

RDWR

read-write; digital output line. This signal indicates whether the laser driver is

in read mode (HIGH) or write mode (LOW).

ES

43

O

analog output line. This signal indicates when valid signals from the

photo-detector can be expected for sampling purposes (used in CD-R

applications).

ES

FS

44

45

O

I

analog output line. The ES anti-phase signal used together with ES to allow

balanced transmission.

forward sense; analog current sink input. This is the value of the measured

laser power (e.g. measured by a photodiode which receives a set fraction of

laser output directly). This is used in the laser power control loop in order to

regulate the actual laser power to a given set of values as a function of laser

temperature drift.

V_DDA3

V_SSD2

V_SSA3

V_DD1

46

47

48

49

50

51

52

P

O

IC analog power supply

IC digital ground

IC analog ground

laser driver power supply

analog current output to the laser

OUT1

OUT2

OUT3

Laser driver IC test pads

TEST2

TEST1

TEST0

5

6

7

I

digital input bus for test mode control. Normal functional mode (normal

application use) is: all pins with an internal pull-down resistor and code = 0.

digital input bus for test mode control. Normal functional mode (normal

application use) is: all pins with an internal pull-down resistor and code = 0.

digital input bus for test mode control. Normal functional mode (normal

application use) is: all pins with an internal pull-down resistor and code = 0.

2002 May 06

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Philips Semiconductors

Preliminary speciﬁcation

Laser driver and controller circuit

TZA1032

SYMBOL

PAD

TYPE

DESCRIPTION

TEST_IN1

9

I

digital input bus with internal pull-down resistors for test data input.

High-impedance state in functional mode.

TEST_IN0

TEST_OUT1

TEST_OUT0

TEST_CLK

IVCON

10

11

12

13

28

29

36

39

I

digital input bus with internal pull-down resistors for test data input.

High-impedance state in functional mode.

O

I

digital output bus for test data output. High-impedance state in functional

mode.

digital output bus for test data output. High-impedance state in functional

mode.

digital input pin with internal pull-down resistor for test data clock.

High-impedance state in functional mode.

O

analog current output related to the PLL loop-ﬁlter. High-impedance state in

functional mode.

IVREFCON

FSPLUS

analog current output related to the PLL loop-ﬁlter. High-impedance state in

functional mode.

analog voltage output from LCA FS/alpha pre-amp circuit. High-impedance

state in functional mode.

FSMIN

analog voltage output from LCA FS/alpha pre-amp circuit. High-impedance

state in functional mode.

2002 May 06

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Philips Semiconductors

Preliminary speciﬁcation

Laser driver and controller circuit

TZA1032

handbook, full pagewidth

39 38 37 36 35 34 33 32 31 30 29 28 27

40

41

42

43

44

45

46

47

48

49

50

51

52

26

25

24

23

22

21

20

19

18

17

16

15

14

DATAN

DATAP

CLKP

SCL

SDA

RDWR

ES

CLKN

V

ES

DDA1

V

FS

DDD4

V

TZA1032UK

DDA3

V

SSD2

SSA1

V

SSA3

SSD1

V

DD1

DDD1

OUT1

OUT2

OUT3

I2C_A0

OPC

IRQ

1

2

3

4

5

6

7

8

9

10 11 12 13

MGW503

Pad number 20 is not connected.

Fig.2 Bare die with solder bumps (flip-chip).

10

2002 May 06

Philips Semiconductors

Preliminary speciﬁcation

Laser driver and controller circuit

TZA1032

7

FUNCTIONAL DESCRIPTION

The I²C-bus interface

7.1

The TZA1032 has two possible I²C-bus addresses that can be selected via pin I2C_A0, an active HIGH digital CMOS

input. This allows two TZA1032 ICs to be independently applied using the same I²C-bus (e.g. for double write

applications), one with pin I2C_A0 HIGH and the other with pin I2C_A0 LOW. The TZA1032 operates as a slave only

I²C-bus device.

Table 1 TZA1032 I²C-bus addresses

I2C_A0

0 = LOW

1 = HIGH

I²C-BUS WRITE ADDRESS

1101 1100 (DCH)

1101 1110 (DEH)

I²C-BUS READ ADDRESS

1101 1101 (DDH)

1101 1111 (DFH)

Each I²C-bus register has an 8-bit register address bus. The various modes in which an external controller can use the

I²C-bus interface are shown in Table 2. The special RAM Write mode allows fast block transfer of data via one single

I²C-bus register address.

Table 2 I²C-bus communication modes supported by TZA1032

I²C-BUS MODE

Write

I²C-BUS INFORMATION

start; TZA1032_write_address; acknowledge; register_address (n); acknowledge;

data_to_register_address (n); acknowledge; stop

Incremental write

RAM write

start; TZA1032_write_address; acknowledge; register_address (n); acknowledge;

data_to_register_address (n); acknowledge; data_to_register_address (n + 1);

acknowledge; .... ; data_to_register_address (n + r); acknowledge; stop

start; TZA1032_write_address; acknowledge; register_address (= RAM x), acknowledge;

data_to_RAM x (0), acknowledge; data_to_RAM x (1), acknowledge; .... ;

data_to_RAM x (m); acknowledge; stop

Read

start; TZA1032_write_address; acknowledge; register_address (n); acknowledge; stop

start; TZA1032_read_address; acknowledge; data_from_register_address (n);

acknowledge; stop

Successive read

start; TZA1032_write_address; acknowledge; register_address (n); acknowledge; start;

TZA1032_read_address; acknowledge; data_from_register_address (n), acknowledge;

data_from_register_address (n); acknowledge; .... ; data_from_register_address (n);

acknowledge; stop

7.2

Interrupt request

The IRQ is built as an active LOW open-drain output pin so it can be linked to the system controller together with similar

signals in a wired-or approach. An IRQ register is present to select the conditions which can cause the IRQ line to be

active. Possible conditions for an interrupt can be overrun or under-run of threshold or delta laser current or several other

selectable conditions.

The status register allows extra signals to be monitored in non-interrupt mode (e.g. by polling). The IRQ and status

registers in combination with the IRQ line allow a very efficient way of controlling TZA1032.

In addition, the IRQ_enable register allows selectable masking of most of the IRQ conditions to the IRQ line.

2002 May 06

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Philips Semiconductors

Preliminary speciﬁcation

Laser driver and controller circuit

TZA1032

7.3

Soft reset and power-down

The PLL can be used in closed loop or as a stable

open-loop oscillator (in read mode for example) when no

input clock is present. For this purpose the PLL features a

self-learning oscillator mode for non-locked operation.

TZA1032 has a soft reset register that can reset most of

the internal blocks, and is automatically synchronized with

the I²C-bus SCL input.

Furthermore, the PLL is designed for wide range

frequency locking (factor ≥2.5). The frequency

multiplication factor is programmable for flexible selection

of write strategy timing resolution for different standards

(CD 1× to 24×, DVD 1×, 2×, 4× and DVR).

Most of the blocks in the TZA1032 are provided with a

power-down input. The IC features a special power-down

register which can be programmed via I²C-bus. An active

bit in the register causes a block to go into a low dissipation

standby mode. This offers the user the possibility to save

power when TZA1032 operates in a register mode (e.g.

during read).

For PLL characteristics see Table 3 for the possible PLL

frequencies and write strategy resolutions with respect to

the incoming RLC clock. The TZA1032 features are much

more flexible than shown in Table 3. The PLL frequency

and write strategy resolution can be programmed

7.4

The Phase Locked Loop

The PLL is phase locked to the incoming RLC clock signal.

A single external clock signal is sufficient for a complete

task of TZA1032. The PLL unit provides all internal

clocking with the exception of the I²C-bus interface that

can run on its own SCL clock.

according to the specific requirements of the user.

Table 3 Examples of PLL clock ratio programming

RLC FREQUENCY

STANDARD

PLL FREQUENCY

f_o(MHz)

WRITE STRATEGY

RESOLUTION⁽¹⁾

f

_rlc(MHz)

CD × 1

4.3218

518.616

8

CD × 2

8.6436

518.616

553.1904

414.8928

553.1904

414.8928

523.2

CD × 4

17.2872

34.5744

51.8616

69.1488

8

CD × 8

8

CD × 12

CD × 16

CD × 24

DVD × 1

DVD × 2

DVD × 2.5

DVD × 4

DVR-1

8

103.7232

26.16

4

20

10

6

52.32

523.2

65.4

392.4

104.64

65.625

93.75

418.56

525

4

8

DVR-2

562.5

6

Note

1. The write strategy resolution is defined as the number of bits per RLC clock period.

7.5 The differential receiver

A differential RLC receiver (DRX) with low voltage-swing is present to allow high data rates in combination with low

electromagnetic interference. The receiver features impedance matching with typical flex foils. Furthermore, single side

operation is optionally possible by connecting additional external resistors.

High-impedance input switching allows two or more TZA1032 ICs to operate in parallel. The high-impedance input switch

is controlled by a single I²C-bus control register that can individually select DRX clock and/or data lines for

high-impedance mode. A high-impedance input mode is also entered during Reset or power-down.

2002 May 06

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Philips Semiconductors

Preliminary speciﬁcation

Laser driver and controller circuit

TZA1032

Table 4 Truth table for RLC differential receiver; note 1

CLOCK

INPUT

POWER-DOWN

High_Z

High_Z_clk

Reset

OUT

BIAS

INPUT SWITCH

CLKP

L

H

L

H

X

H

L

on

off

on

closed

CLKN

closed

X

H

X

H

X

H

open (high impedance)

Note

1. X = don’t care; L = LOW; H = HIGH.

7.6 The RLC decoder

The RLC decoder and write strategy generator feature a look back function to enable write pre-compensation by data

dependent write strategies. The write strategy for the current received run length (rlc_n) depends on the previous received

run length (rlc_n−1). Table 5 shows that TZA1032 is capable of decoding 64 possible combinations of rlc_nand rlc_n−1

including a read state.

The read state is entered after detecting run lengths ≥16. The decoder automatically toggles between the status write

and erase in normal writing mode, and the RLC data inputs can be made edge sensitive only, or edge and level sensitive.

It should be noticed that erase strategies are possible. A forced erase mode can be entered via I²C-bus for quick disc

initialisation. The RLC decoder (and the complete TZA1032) have a fixed propagation delay of 28 RLC clock periods to

allow accurate data linking on disc.

Table 5 List of possible RLC decoder combinations; note 1

rlc_n

rlc_n−1EFFECT

rlc_n

rlc_n−1EFFECT

rlc_n

rlc_n−1EFFECT

rlc_n

rlc_n−1EFFECT

Read

E1

E2

E3

E4

E5

E6

E7

X

0

1

E8

E9

X

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

W2

W3

W4

E3

E4

E5

X

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

W5

E1

E2

E3

E4

E5

X

48

49

50

51

52

53

54

55

56

57

58

59

60

61

62

63

X

2

E10

E11

E12

E13

E14

E15

W1

W2

X

W5

W3

W4

W5

X

3

X

W5

4

X

E1

E2

E3

E4

E5

X

W5

5

X

W5

6

X

W6

X

W3

W4

W5

X

7

X

W7

X

8

E1

E2

E3

E4

E5

X

W8

X

9

W9

X

10

11

12

13

14

15

E1

E2

E3

E4

E5

X

W10

W11

W12

W13

W14

W15

X

W3

W4

X

E1

E2

X

Note

1. X = don’t care; E = erase; W = write.

2002 May 06

13

Philips Semiconductors

Preliminary speciﬁcation

Laser driver and controller circuit

TZA1032

7.7

Write strategy generator

Internal set point generation is present to allow read-write

switching without any transient effects. A digital loop filter

with programmable loop gain is used. This allows tailoring

of loop bandwidth according to the requirements of the

application. A unique laser power control algorithm is

used. This algorithm ensures not only average power

control but it really makes the laser virtual temperature and

aging independent for any possible write strategy. This

loop operates with or without the alpha (running OPC)

loop.

The write strategy generator makes use of pointer memory

mapping to allow compact write strategy coding. Only

1600 bytes have to be transferred to TZA1032 to load the

most complex write strategy including write

pre-compensation. Due to the pointer memory structure

common strategies can be loaded in an even more

compact manner (e.g. CD strategies). Loading can be

done efficiently via I²C-bus block transfer mode.

The write strategy code includes:

The TZA1032 supports a full running optimum power

control loop when required by the user. The loop is also

referred to as the alpha loop. The input signal is based on

disc Absorption MEASurements (AMEAS). This signal is

processed in a similar way as the FS input current.

A current input is provided with programmable gain (4-bit)

and an 8-bit ADC is used.

• Data for selection of output power levels from 4

threshold and 8 delta values (these 8-bit values can be

programmed asynchronously via I²C-bus)

• Pulse timing information

• Modulation information.

The modulation information enables the user to switch on

modulation in pre-selected parts of the write strategy on

a real time basis. The modulation amplitude can be

programmed asynchronously via I²C-bus.

Again a digital loop filter with programmable loop gain is

used. This allows tailoring of loop bandwidth according to

the requirements of the application. The alpha loop does

not interfere with the FS laser power control loop.

Therefore, both control loops can be used simultaneously.

The set point is programmable via I²C-bus or is under

control of a programmable OPC stepper.

7.8

Laser Power Control

The Forward Sense Diode (FSD) is a reversed biased

diode that receives a small percentage of the laser output

light and converts it into a current. The FSD can be

connected directly to the TZA1032 without additional

components. The TZA1032 features a current input with

programmable gain (6-bit resolution). Furthermore a 12-bit

ADC is used.

2002 May 06

14

Philips Semiconductors

Preliminary speciﬁcation

Laser driver and controller circuit

TZA1032

9

CHARACTERISTICS

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

Current driver

V_{DD[1 to 3]}

I_{OUT[1 to 3]}

output supply voltage

output current (threshold)

output current (delta)

output resistance

3.0

3.3

3.6

V

1

0

−

200

240

−

mA

Ω

−

R_{OUT[1 to 3]}

t_r, t_f

120

−

rise and fall times

depends on package and

load

1 to 2

ns

PLL

f_o(R)

f_o(W)

f_i(rlc)

PLL output frequency⁽¹⁾

PLL output frequency

PLL input frequency

read mode

write mode

240

320

0

375

440

565

105

MHz

523.2

26.16

FS buffer and ADC combination

V_FS

I_FS

voltage at pin FS

current at pin FS

DC input current

virtual ground

1.220

1.225

1000

0

1.230

4000

−

V

0

µA

bit

code −2048

−

code 2047; nominal gain

signed

−

1000

12

−

N

resolution

−

B_−3dB

Reg_FS

analog bandwidth

3.08

0

4.06

−

5.64

63

kHz

programmable gain register 6 bits

Alpha buffer and ADC

I_alpha

V_alpha

N

input current

into pin AMEAS

virtual ground

signed

0

100

1.4

8

400

1.5

−

µA

V

input voltage

resolution

1.3

−

bit

I_alpha

DC input current

code −128

−

0

−

µA

kHz

code 127; nominal gain

−

100

650

−

B_−3dB

analog bandwidth

520

0

850

15

Alpha_Reg

programmable gain register 4 bits

DRX input

I_DRXD(HIZ)

I_DRXC(HIZ)

V_DATA

DRX data input current

DRX clock input current

DRX data input voltage

DRX clock input voltage

high-impedance mode

0

−

0

100

−

µA

high-impedance mode

low-impedance mode

0

µA

120

mV

V_CLK

−

I²C-bus interface

R_ON(SDA)

R_ON(SCL)

on resistance SDA line

on resistance SCL line

100

150

250

Ω

Note

1. Use low range CCO mode only.

2002 May 06

16

Philips Semiconductors

Preliminary speciﬁcation

Laser driver and controller circuit

TZA1032

10 APPLICATION INFORMATION

The forward sense loop is fully self-contained. Only a

forward sense diode has to be connected, which can be

biased with an external voltage.

A typical application diagram of the TZA1032 is shown in

Fig.4. As can be seen from this figure the CLKP, CLKN,

DATAP and DATAN inputs allow differential data transfer

for electromagnetic compatibility issues. Input series

resistors can be connected to obtain low voltage swing

when using standard 3.3 or 5 V drivers. This will further

reduce electromagnetic interference.

The TZA1032 can be mounted with ‘flip-chip’ technology

as a bare die on the flex foils. For this purpose the bond

pads of the silicon die can be bumped with solder dots.

In this configuration parasitic components (e.g. inductors)

can be further reduced leading to even better performance

of the TZA1032.

This application diagram shows separated 3.3 V supplies

to obtain maximum output performance. Only few

decoupling capacitors are needed for the total application.

2002 May 06

17

Philips Semiconductors

Preliminary speciﬁcation

Laser driver and controller circuit

TZA1032

11 BONDING PAD LOCATIONS

COORDINATES⁽¹⁾

SYMBOL

FSMIN

PAD

x

y

SYMBOL

PAD

x

y

39

40

41

42

43

44

45

46

47

48

49

50

51

52

−1.469

−1.758

+1.758

+1.5085

+1.2595

+1.012

+0.763

+0.5155

+0.2665

+0.019

−0.230

V_DD2

1

−1.469

−1.2215

−0.974

−0.7265

−0.4775

−0.230

+0.019

+0.2665

+0.5155

+0.763

+1.012

+1.2595

+1.5085

+1.758

+1.5085

+1.2595

+1.012

+0.763

+0.5155

+0.2665

+0.019

−0.230

−0.4775

−0.7265

−0.974

−1.2215

−1.758

−1.469

−1.2215

−0.974

−0.7265

−0.4775

−0.230

+0.019

+0.2665

+0.5155

+0.763

+1.012

+1.2595

+1.5085

+1.758

SCL

V_DD3

2

SDA

V_SSD3

3

RDWR

ES

V_SS

4

TEST2

TEST1

TEST0

V_DDD3

5

ES

6

FS

7

V_DDA3

V_SSD2

V_SSA3

V_DD1

OUT1

OUT2

OUT3

8

TEST_IN1

TEST_IN0

TEST_OUT1

TEST_OUT0

TEST_CLK

IRQ

9

−0.4775

−0.7265

−0.974

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

−1.2215

−1.469

Note

OPC

1. All x and y coordinates represent the position of the

centre of the pad in mm with respect to the centre of

the die (see Fig.5).

I2C_A0

V_DDD1

V_SSD1

V_SSA1

V_SSD4

V_DDD4

V_DDA1

CLKN

CLKP

DATAP

DATAN

V_DDA2

IVCON

IVREFCON

V_SSA2

REFH

REFL

CFS

AMEAS

LASP

FSPLUS

AEZ

V_DDD2

2002 May 06

19

Philips Semiconductors

Preliminary speciﬁcation

Laser driver and controller circuit

TZA1032

handbook, full pagewidth

39 38 37 36 35 34 33 32 31 30 29 28 27

40

41

42

43

44

45

46

47

48

49

50

51

52

26

25

24

23

22

21

20

19

18

17

16

15

14

DATAN

DATAP

CLKP

SCL

SDA

RDWR

ES

CLKN

V

ES

DDA1

V

FS

DDD4

x

V

n.c.

DDA3

0

y

V

SSD2

SSA1

V

SSA3

SSD1

V

DD1

DDD1

OUT1

OUT2

OUT3

I2C_A0

OPC

TZA1032UK

IRQ

1

2

3

4

5

6

7

8

9

10 11 12 13

MBL538

Fig.5 Bonding pad locations.

2002 May 06

20

Philips Semiconductors

Preliminary speciﬁcation

Laser driver and controller circuit

TZA1032

12 DATA SHEET STATUS

PRODUCT

DATA SHEET STATUS⁽¹⁾

STATUS⁽²⁾

DEFINITIONS

Objective data

Development This data sheet contains data from the objective specification for product

development. Philips Semiconductors reserves the right to change the

speciﬁcation in any manner without notice.

Preliminary data

Qualiﬁcation

This data sheet contains data from the preliminary specification.

Supplementary data will be published at a later date. Philips

Semiconductors reserves the right to change the speciﬁcation without

notice, in order to improve the design and supply the best possible

product.

Product data

Production

This data sheet contains data from the product specification. Philips

Semiconductors reserves the right to make changes at any time in order

to improve the design, manufacturing and supply. Changes will be

communicated according to the Customer Product/Process Change

Notiﬁcation (CPCN) procedure SNW-SQ-650A.

Notes

1. Please consult the most recently issued data sheet before initiating or completing a design.

2. The product status of the device(s) described in this data sheet may have changed since this data sheet was

published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.

13 DEFINITIONS

14 DISCLAIMERS

Short-form specification

The data in a short-form

Life support applications

These products are not

specification is extracted from a full data sheet with the

same type number and title. For detailed information see

the relevant data sheet or data handbook.

designed for use in life support appliances, devices, or

systems where malfunction of these products can

reasonably be expected to result in personal injury. Philips

Semiconductors customers using or selling these products

for use in such applications do so at their own risk and

agree to fully indemnify Philips Semiconductors for any

damages resulting from such application.

Limiting values definition Limiting values given are in

accordance with the Absolute Maximum Rating System

(IEC 60134). Stress above one or more of the limiting

values may cause permanent damage to the device.

These are stress ratings only and operation of the device

at these or at any other conditions above those given in the

Characteristics sections of the specification is not implied.

Exposure to limiting values for extended periods may

affect device reliability.

Right to make changes

Philips Semiconductors

reserves the right to make changes, without notice, in the

products, including circuits, standard cells, and/or

software, described or contained herein in order to

improve design and/or performance. Philips

Semiconductors assumes no responsibility or liability for

the use of any of these products, conveys no licence or title

under any patent, copyright, or mask work right to these

products, and makes no representations or warranties that

these products are free from patent, copyright, or mask

work right infringement, unless otherwise specified.

Application information

Applications that are

described herein for any of these products are for

illustrative purposes only. Philips Semiconductors make

no representation or warranty that such applications will be

suitable for the specified use without further testing or

modification.

2002 May 06

21

Philips Semiconductors

Preliminary speciﬁcation

Laser driver and controller circuit

TZA1032

Bare die

All die are tested and are guaranteed to comply with all data sheet limits up to the point of wafer sawing for

a period of ninety (90) days from the date of Philips' delivery. If there are data sheet limits not guaranteed, these will be

separately indicated in the data sheet. There are no post packing tests performed on individual die or wafer. Philips

Semiconductors has no control of third party procedures in the sawing, handling, packing or assembly of the die.

Accordingly, Philips Semiconductors assumes no liability for device functionality or performance of the die or systems

after third party sawing, handling, packing or assembly of the die. It is the responsibility of the customer to test and qualify

their application in which the die is used.

15 PURCHASE OF PHILIPS I²C COMPONENTS

Purchase of Philips I²C components conveys a license under the Philips’ I²C patent to use the

components in the I²C system provided the system conforms to the I²C specification defined by

Philips. This specification can be ordered using the code 9398 393 40011.

2002 May 06

22

Philips Semiconductors

Preliminary speciﬁcation

Laser driver and controller circuit

TZA1032

NOTES

2002 May 06

23

Philips Semiconductors – a worldwide company

Contact information

For additional information please visit http://www.semiconductors.philips.com.

Fax: +31 40 27 24825

For sales ofﬁces addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.

SCA74

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed

without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license

under patent- or other industrial or intellectual property rights.

Printed in The Netherlands

753503/01/pp24

Date of release: 2002 May 06

Document order number: 9397 750 08652


型号：	TZA1032UK
厂家：	NXP
描述：	Laser driver and controller circuit 激光驱动器和控制器电路驱动器消费电路商用集成电路控制器
文件：	总24页 (文件大小：103K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

TZA1032UK [NXP]

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