FDBL0200N100 [ONSEMI]
N 沟道，PowerTrench® MOSFET，100V，300A，2.0mΩ;
| 型号： | FDBL0200N100 |
| 厂家： | 
ONSEMI |
| 描述： | N 沟道，PowerTrench® MOSFET，100V，300A，2.0mΩ 开关 晶体管 |
| 文件： | 总9页 (文件大小：588K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MOSFET – N-Channel,
POWERTRENCH)
100 V, 300 A, 2.0 mW
FDBL0200N100
Features
www.onsemi.com
• Typical R
• Typical Q
= 1.5 mW at V = 10 V, I = 80 A
GS D
DS(on)
= 95 nC at V = 10 V, I = 80 A
g(tot)
GS
D
V
R
MAX
I MAX
D
DSS
DS(ON)
• UIS Capability
100 V
2.0 mW @ 10 V
300 A
• This Device is Pb−Free and is RoHS Compliant
Applications
• Industrial Motor Drive
• Industrial Power Supply
• Industrial Automation
• Battery Operated Tools
• Battery Protection
• Solar Inverters
H−PSOF8L 11.68x9.80
CASE 100CU
• UPS and Energy Inverters
• Energy Storage
MARKING DIAGRAM
• Load Switch
$Y&Z&3&K
FDBL
0200N100
$Y
&Z
&3
&K
= ON Semiconductor Logo
= Assembly Plant Code
= 3−Digit Plant Code
= 2−Digits Lot Run Traceability Code
FDBL0200N100 = Specific Device Code
ORDERING INFORMATION
See detailed ordering and shipping information on page 7 of
this data sheet.
© Semiconductor Components Industries, LLC, 2016
1
Publication Order Number:
May, 2021 − Rev. 2
FDBL0200N100/D
FDBL0200N100
MOSFET MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
Symbol
Rating
Value
100
Unit
V
V
DSS
Drain−to−Source Voltage
Gate−to−Source Voltage
V
GS
20
V
I
Drain Current − Continuous (V = 10) (Note 1)
T
T
= 25°C
= 25°C
300
A
D
GS
C
Pulsed Drain Current
See Figure 4
352
C
E
AS
Single Pulse Avalanche Energy (Note 2)
Power Dissipation
mJ
W
P
429
D
Derate Above 25°C
2.9
W/°C
°C
T , T
Operating and Storage Temperature
Thermal Resistance, Junction to Case (Note 3)
Thermal Resistance, Junction to Ambient (Note 3a)
Thermal Resistance, Junction to Ambient (Note 3b)
−55 to +175
0.35
J
STG
R
°C/W
°C/W
°C/W
q
JC
JA
JA
R
R
43
q
q
62.5
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Current is limited by silicon.
2. Starting T = 25°C, L = 0.1 mH, I = 84 A, V = 100 V during inductor charging and V = 0 V during time in avalanche.
J
AS
DD
DD
3. R
is the sum of the junction−to−case and case−to−ambient thermal resistance, where the case thermal reference is defined as the solder
q
JA
mounting surface of the drain pins. R
a. 43°C/W when mounted on a 1 in pad of 2 oz copper
is guaranteed by design, while R
is determined by the board design.
q
q
JC
JA
2
b. 62.5°C/W when mounted on a minimum pad of 2 oz copper
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2
FDBL0200N100
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Symbol
Parameter
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
B
Drain−to−Source Breakdown Voltage
Drain−to−Source Leakage Current
I
= 250 mA, V = 0 V
100
−
−
−
−
−
−
5
V
VDSS
D
GS
I
V
= 100 V, V = 0 V T = 25°C
mA
mA
nA
DSS
DS
GS
GS
GS
J
T = 175°C (Note 4)
J
−
2
I
Gate−to−Source Leakage Current
V
=
20V
−
100
GSS
ON CHARACTERISTICS
V
R
Gate to Source Threshold Voltage
Drain to Source On Resistance
V
I
= V , I = 250μA
2.0
−
3.1
1.5
3.3
4.5
2.0
4.3
V
GS(th)
DS
D
= 80A, V = 10V
T = 25°C
J
mW
mW
DS(on)
D
GS
T = 175°C (Note 4)
J
−
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
= 50 V, V = 0 V, f = 1 MHz
−
−
−
−
−
−
−
−
6970
3950
29
9760
5530
41
1
pF
pF
pF
W
iss
DS
GS
C
Output Capacitance
oss
C
Reverse Transfer Capacitance
Gate Resistance
rss
R
f = 1 MHz
0.45
95
g
Q
Total Gate Charge at 10 V
Threshold Gate Charge
Gate−to−Source Gate Charge
Gate−to−Drain “Miller“ Charge
V
GS
V
GS
V
DD
= 0 to 10 V, V = 80 V, I = 80 A
133
−
nC
nC
nC
nC
g(ToT)
DD
D
Q
= 0 to 2 V, V = 80 V, I = 80 A
13
g(th)
DD
D
Q
= 80 V, I = 80 A
31
−
gs
gd
D
Q
20
−
SWITCHING CHARACTERISTICS
t
Turn−On Time
Turn−On Delay
Rise Time
V
= 50 V, I = 80 A, V = 10 V,
GEN
−
−
−
−
−
−
−
31
25
36
9
73
50
40
58
18
59
ns
ns
ns
ns
ns
ns
on
DD
D
GS
R
= 6 W
t
d(on)
t
r
t
Turn−Off Delay
Fall Time
d(off)
t
f
t
Turn−Off Time
−
off
DRAIN−SOURCE DIODE CHARACTERISTICS
V
Source−to−Drain Diode Voltage
I
I
= 80 A, V = 0 V
−
−
−
−
−
−
1.25
1.2
V
V
SD
SD
GS
= 40 A, V = 0 V
SD
GS
t
Reverse−Recovery Time
Reverse−Recovery Charge
I = 80 A, dI /dt = 100 A/ms, V = 80 V
F
115
172
184
273
ns
nC
rr
SD
DD
Q
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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3
FDBL0200N100
TYPICAL CHARACTERISTICS
400
350
300
250
200
150
100
50
1.2
1.0
0.8
0.6
0.4
0.2
0.0
CURRENT LIMITED
BY PACKAGE
V
= 10 V
GS
0
0
25
50
75
100
125
150
175
25
50
75
100
125
150
175
200
T , CASE TEMPERATURE (°C)
C
T , CASE TEMPERATURE (°C)
C
Figure 1. Normalized Power Dissipation vs. Case
Temperature
Figure 2. Maximum Drain Current vs. Case
Temperature
2
DUTY CYCLE − DESCENDING ORDER
1
D = 0.50
0.20
0.10
0.05
0.02
0.01
PDM
SINGLE PULSE
t 1
0.1
t 2
NOTES:
DUTY FACTOR: D = t / t
1
2
PEAK TJ = P
x Z
+ T
JC C
q
DM
0.01
10 −5
10 −4
10 −3
10 −2
10 −1
10 0
10 1
t, RECTANGULAR PULSE DURATION (s)
Figure 3. Normalized Maximum Transient Thermal Impedance
2000
V
GS
= 10 V
T = 25°C
C
FOR TEMPERATURE ABOVE
25°C DERATE PEAK CURRENT
AS FOLLOWS:
1000
175 * TC
Ǹ
I + I25 ƪ ƫ
15
SINGLE PULSE
10 −4
100
10 −5
10 −3
10 −2
10 −1
1
10
t, RECTANGULAR PULSE DURATION (s)
Figure 4. Peak Current Capability
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4
FDBL0200N100
TYPICAL CHARACTERISTICS (continued)
5000
1000
1000
If R = 0
t
AV
= (L)(I ) / (1.3 x RATED BV
− V
DD
)
AS
DSS
If R ≠ 0
t
AV
= (L / R) ln [(IAS x R) / (1.3 x RATED BVDSS − VDD)+1]
100
10
1
100
10
1
10 ms
STARTING T = 25°C
J
50 ms
100 ms
OPERATION IN THIS
AREA MAY BE
LIMITED BY R
ds(on)
STARTING T = 150°C
J
SINGLE PULSE
T = MAX RATED
1 ms
J
10 ms
100 ms
T
C
= 25°C
0.1
0.1
1
10
100
500
0.001
0.01
0.1
t , TIME IN AVALANCHE (ms)
AV
1
10
100
1000
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
NOTE: Refer to ON Semiconductor Application Notes
AN−7514 and AN−7515
Figure 5. Forward Bias Safe Operating Area
Figure 6. Unclamped Inductive Switching
Capability
350
350
PULSE DURATION = 250 ms
DUTY CYCLE = 0.5% MAX
V
DD
= 5 V
300
100
10
1
V
DD
= 5 V
250
200
150
100
50
T = 175°C
J
T = 25°C
J
T = 25°C
J
T = −55°C
J
T = 175°C
J
0
0.1
3
4
5
6
7
0.0
0.2
0.4
0.6
0.8
1.0
1.2
V
GS
, GATE TO SOURCE VOLTAGE (V)
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 7. Transfer Characteristics
Figure 8. Forward Diode Characteristics
350
350
300
250
200
150
100
50
250 ms PULSE WIDTH
Tj = 25°C
250 ms PULSE WIDTH
Tj = 175°C
300
250
200
150
100
50
VGS
15 V Top
10 V
8 V
7 V
6 V
5.5 V
5V Bottom
VGS
15 V Top
10 V
8 V
7 V
6 V
5.5 V
5V Bottom
0
0
0
1
2
3
4
5
0
1
2
3
4
5
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Figure 9. Saturation Characteristics
Figure 10. Saturation Characteristics
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5
FDBL0200N100
TYPICAL CHARACTERISTICS (continued)
30
25
20
15
10
5
2.5
PULSE DURATION = 250 ms
DUTY CYCLE = 0.5% MAX
PULSE DURATION = 250 ms
DUTY CYCLE = 0.5% MAX
I
D
= 80 A
2.0
1.5
1.0
0.5
T = 175°C
J
I
V
= 80 A
D
= 10 V
GS
T = 25°C
J
0
4
5
6
7
8
9
10
−80
−40
0
40
80
120
160
200
V
GS
, GATE TO SOURCE VOLTAGE (V)
T , JUNCTION TEMPERATURE (°C)
J
Figure 11. RDSON vs. Gate Voltage
Figure 12. Normalized RDSON vs. Junction
Temperature
1.3
1.1
0.9
0.7
0.5
0.3
1.10
1.05
1.00
0.95
0.90
V
= V
= 250 mA
I = 5 mA
D
GS
DS
I
D
−80
−40
0
40
80
120
160
200
−80
−40
0
40
80
120
160
200
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 13. Normalized Gate Threshold
Voltage vs. Temperature
Figure 14. Normalized Drain to Source
Breakdown Voltage vs. Junction Temperature
10
10000
I
D
= 80 A
C
iss
8
6
4
2
0
V
= 50 V
DD
C
oss
V
= 60 V
1000
100
10
DD
V
= 40 V
DD
f = 1 MHz
= 0 V
V
C
rss
GS
0.1
1
10
100
0
20
40
60
80
100
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Q , GATE CHARGE (nC)
g
Figure 15. Capacitance vs. Drain to Source
Voltage
Figure 16. Gate Charge vs. Gate to Source
Voltage
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6
FDBL0200N100
ORDERING INFORMATION
†
Device
Device Marking
FDBL0200N100
Package Type
Reel Size
13”
Tape Width
Shipping
FDBL0200N100
H−PSOF8L 11.68x9.80
(Pb−Free)
24 mm
2000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
POWERTRENCH is registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other
countries.
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7
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
H−PSOF8L 11.68x9.80
CASE 100CU
ISSUE C
DATE 22 MAY 2023
GENERIC
MARKING DIAGRAM*
AYWWZZ
XXXXXXXX
XXXXXXXX
A
Y
= Assembly Location
= Year
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
WW = Work Week
ZZ
XXXX = Specific Device Code
= Assembly Lot Code
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13813G
H−PSOF8L 11.68x9.80
PAGE 1 OF 1
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© Semiconductor Components Industries, LLC, 2019
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