FDD86113LZ [ONSEMI]
N 沟道，屏蔽门极，PowerTrench® MOSFET，100V，5.5 A，104 mΩ;
| 型号： | FDD86113LZ |
| 厂家： | 
ONSEMI |
| 描述： | N 沟道，屏蔽门极，PowerTrench® MOSFET，100V，5.5 A，104 mΩ PC 开关 脉冲 晶体管 |
| 文件： | 总8页 (文件大小：468K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
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March 2015
FDD86113LZ
N-Channel Shielded Gate PowerTrench® MOSFET
100 V, 5.5 A, 104 mΩ
Features
General Description
Shielded Gate MOSFET Technology
This N-Channel logic Level MOSFETs are produced using
Fairchild Semiconductor‘s advanced PowerTrench® process
that incorporates Shielded Gate technology. This process has
been optimized for the on-state resistance and yet maintain
superior switching performance. G-S zener has been added to
enhance ESD voltage level.
Max rDS(on) = 104 mΩ at VGS = 10 V, ID = 4.2 A
Max rDS(on) = 156 mΩ at VGS = 4.5 V, ID = 3.4 A
HBM ESD protection level > 6 kV typical (Note 4)
High performance trench technology for extremely low rDS(on)
Application
DC-DC conversion
High power and current handling capability in a widely used
surface mount package
100% UIL Tested
RoHS Compliant
D
D
G
G
S
D-PAK
(TO-252)
S
MOSFET Maximum Ratings TC = 25 °C unless otherwise noted
Symbol
VDS
VGS
Parameter
Ratings
Units
Drain to Source Voltage
Gate to Source Voltage
100
V
V
±20
Drain Current
-Continuous
TC = 25 °C
TA = 25 °C
5.5
ID
-Continuous
-Pulsed
(Note 1a)
(Note 3)
4.2
A
15
EAS
Single Pulse Avalanche Energy
Power Dissipation
12
29
mJ
W
TC = 25 °C
TA = 25 °C
PD
Power Dissipation
(Note 1a)
3.1
TJ, TSTG
Operating and Storage Junction Temperature Range
-55 to +150
°C
Thermal Characteristics
RθJC
RθJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
(Note 1)
4.3
96
°C/W
(Note 1a)
Package Marking and Ordering Information
Device Marking
Device
Package
Reel Size
13 ’’
Tape Width
16 mm
Quantity
FDD86113LZ
FDD86113LZ
D-PAK(TO-252)
2500 units
©2011 Fairchild Semiconductor Corporation
FDD86113LZ Rev. 1.3
1
www.fairchildsemi.com
Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = 250 μA, VGS = 0 V
100
V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
I
D = 250 μA, referenced to 25 °C
72
mV/°C
IDSS
IGSS
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
VDS = 80 V, VGS = 0 V
VGS = ±20 V, VDS = 0 V
1
μA
μA
±10
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 μA
1
1.5
-5
3
V
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
I
D = 250 μA, referenced to 25 °C
mV/°C
V
GS = 10 V, ID = 4.2 A
87
116
142
9
104
156
170
rDS(on)
gFS
Static Drain to Source On Resistance
Forward Transconductance
VGS = 4.5 V, ID = 3.4 A
mΩ
VGS = 10 V, ID = 4.2 A,TJ = 125 °C
VDS = 5 V, ID = 4.2 A
S
Dynamic Characteristics
Ciss
Coss
Crss
Rg
Input Capacitance
213
55
285
75
5
pF
pF
pF
Ω
VDS = 50 V, VGS = 0 V,
f = 1MHz
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
2.4
1.4
Switching Characteristics
td(on)
tr
td(off)
tf
Turn-On Delay Time
Rise Time
3.6
1.3
9.7
1.6
3.7
1.9
0.6
0.7
10
10
20
10
6
ns
ns
ns
ns
nC
VDD = 50 V, ID = 4.2 A,
V
GS = 10 V, RGEN = 6 Ω
Turn-Off Delay Time
Fall Time
Qg(TOT)
Qg(TOT)
Qgs
Total Gate Charge
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
VGS = 0 V to 10 V
VGS = 0 V to 4.5 V
3
VDD = 50 V,
D = 4.2 A
I
nC
nC
Qgd
Drain-Source Diode Characteristics
V
GS = 0 V, IS = 4.2 A
(Note 2)
(Note 2)
0.88
0.80
31
1.3
1.2
49
VSD
Source to Drain Diode Forward Voltage
V
VGS = 0 V, IS = 1.7 A
trr
Reverse Recovery Time
ns
IF = 4.2 A, di/dt = 100 A/μs
Qrr
Reverse Recovery Charge
20
33
nC
NOTES:
2
1. R
is determined with the device mounted on a 1 in pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
is guaranteed by design while R is determined by
θCA
θJA
θJC
the user's board design.
b) 96 °C/W when mounted on a
minimum pad of 2 oz copper
a)
40 °C/W when mounted on a
1 in pad of 2 oz copper
2
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0 %.
3. Starting T = 25 °C, L = 1 mH, I = 5 A, V = 90 V, V = 10 V.
J
AS
DD
GS
4. The diode connected between gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
©2011 Fairchild Semiconductor Corporation
FDD86113LZ Rev. 1.3
2
www.fairchildsemi.com
Typical Characteristics TJ = 25 °C unless otherwise noted
4
3
2
1
0
15
VGS = 10 V
VGS = 4.5 V
VGS = 2.5 V
VGS = 3 V
12
9
VGS = 3.5 V
VGS = 3 V
VGS = 3.5 V
6
VGS = 4.5 V
VGS = 10 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
3
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = 2.5 V
0
0
1
2
3
4
5
0
3
6
9
12
15
VDS, DRAIN TO SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
Figure 1. On-Region Characteristics
Figure2. N o r m a l i z e d O n - R e s i s ta n c e
vs Drain Current and Gate Voltage
2.0
400
ID = 4.2 A
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
ID = 4.2 A
1.8
1.6
1.4
1.2
1.0
0.8
0.6
VGS = 10 V
300
200
100
0
TJ = 125 o
C
TJ = 25 oC
-75 -50 -25
0
25 50 75 100 125 150
2
4
6
8
10
TJ, JUNCTION TEMPERATURE (oC)
VGS, GATE TO SOURCE VOLTAGE (V)
F ig u re 3. No rmal i zed O n-Re si stan ce
vs Junction Temperature
Figure4. On-Resistance vs Gate to
Source Voltage
15
20
VGS = 0 V
10
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
12
9
VDS = 5 V
1
TJ = 150 o
C
TJ = 25 oC
0.1
0.01
6
TJ = 150 oC
TJ = -55 oC
TJ = 25 oC
TJ = -55 o
3
C
0
0.001
0
1
2
3
4
5
6
0.0
0.2
0.4
0.6
0.8
1.0
1.2
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure6. Source to Drain Diode
Forward Voltage vs Source Current
©2011 Fairchild Semiconductor Corporation
FDD86113LZ Rev. 1.3
3
www.fairchildsemi.com
Typical Characteristics TJ = 25 °C unless otherwise noted
10
1000
100
10
ID = 4.2 A
VDD = 25 V
Ciss
8
VDD = 50 V
Coss
6
VDD = 75 V
4
Crss
2
0
f = 1 MHz
= 0 V
V
GS
1
0.1
1
10
100
0
1
2
3
4
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
Figure8. C a p a c i t a n c e v s D r a i n
to Source Voltage
12
10
8
6
RθJC = 4.3 oC/W
5
4
VGS = 10 V
TJ = 25 o
C
3
2
VGS = 4.5 V
TJ = 100 o
C
6
4
TJ = 125 oC
Limited by Package
2
0
1
0.01
0.1
tAV, TIME IN AVALANCHE (ms)
1
2
25
50
75
100
125
150
TC, CASE TEMPERATURE (oC)
Figure9. U n c l a m p e d I n d u c t i v e
Switching Capability
Figure10. Maximum Continuous Drain
Current vs Case Temperature
10-1
10-2
10-3
10-4
10-5
10-6
10-7
10-8
10-9
10-10
20
10
VGS = 0 V
100 μs
TJ = 125 oC
1
THIS AREA IS
LIMITED BY r
TJ = 25 o
C
DS(on)
SINGLE PULSE
TJ = MAX RATED
RθJC = 4.3 oC/W
1 ms
10 ms
DC
0.1
T
C = 25 oC
0.05
0
5
10
15
20
25
30
35
0.1
1
10
100
400
VDS, DRAIN to SOURCE VOLTAGE (V)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 11. Gate Leakage Current vs
Gate to Source Voltage
Figure12. Forward Bias Safe
Operating Area
©2011 Fairchild Semiconductor Corporation
FDD86113LZ Rev. 1.3
4
www.fairchildsemi.com
Typical Characteristics TJ = 25 °C unless otherwise noted
2000
1000
SINGLE PULSE
RθJC = 4.3 oC/W
TC = 25 o
C
100
10
10-5
10-4
10-3
10-2
10-1
1
t, PULSE WIDTH (sec)
Figure 13. Single Pulse Maximum Power Dissipation
2
1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
P
DM
0.1
0.05
0.02
0.01
0.1
t
1
t
2
NOTES:
DUTY FACTOR: D = t /t
SINGLE PULSE
RθJC = 4.3 oC/W
1
2
PEAK T = P
x Z
x R
+ T
J
DM
θJC
θJC C
0.01
10-5
10-4
10-3
10-2
10-1
1
t, RECTANGULAR PULSE DURATION (sec)
Figure 14. Junction-to-Case Transient Thermal Response Curve
©2011 Fairchild Semiconductor Corporation
FDD86113LZ Rev. 1.3
5
www.fairchildsemi.com
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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