FDMD8240L [ONSEMI]
双 N 沟道 Power Trench® MOSFET 40V，98A，2.6mΩ;
| 型号： | FDMD8240L |
| 厂家： | 
ONSEMI |
| 描述： | 双 N 沟道 Power Trench® MOSFET 40V，98A，2.6mΩ |
| 文件： | 总8页 (文件大小：394K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
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MOSFET – Dual, N-Channel,
POWERTRENCH)
Pin 1
40 V, 98 A , 2.6 mohm
FDMD8240L
Description
Top
Bottom
PQFN12
CASE 483BN
This device includes two 40 V N−Channel MOSFETs in a dual
Power (3.3 mm X 5 mm) package. HS source and LS Drain are
internally connected for half/full bridge, low source inductance
MARKING DIAGRAM
package, low R
/Qg FOM silicon.
DS(on)
Features
ZXYYKK
FDMD
8240L
• Max R
• Max R
= 2.6 mW at V = 10 V, I = 23 A
GS D
DS(on)
= 3.95 mW at V = 4.5 V, I = 19 A
GS D
DS(on)
• Ideal for Flexible Layout in Primary Side of Bridge Topology
• 100% UIL Tested
Z
XYY
KK
= Assembly Plant Code
= Date Code (Year &Week)
= Lot Traceability Code
= Specific Device Code
• Kelvin High Side MOSFET Drive Pin−out Capability
• This Device is Pb−Free, Halide−Free and is RoHS Compliant
FDMD8240L
Applications
• Synchronous Buck : Primary Switch of Half / Full Bridge Converter
for Telecom
• Motor Bridge : Primary Switch of Half / Full bridge Converter for
BLDC Motor
1
2
3
4
5
6
12
11
10
9
D1
D1
D1
G2
S2
S2
G1
G1R
• MV POL: Synchronous Buck Switch
D2/S1
D2/S1
8
D2/S1
D2/S1
7
ORDERING INFORMATION
†
Device
FDMD8240L
Package
Shipping
PQFN12
3000 /
(Pb−Free)
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2016
1
Publication Order Number:
April, 2023 − Rev. 2
FDMD8240L/D
FDMD8240L
MOSFET MAXIMUM RATINGS (T = 25°C unless otherwise noted)
A
Symbol
Parameter
Ratings
40
Unit
V
V
DS
V
GS
Drain to Source Voltage
Gate to Source Voltage
Drain Current
20
V
I
D
Continuous
Continuous
Continuous
Pulsed (Note 4)
T
= 25°C
98
A
C
(Note 5)
T
C
= 100°C
62
23
(Note 5)
T = 25°C
A
(Note 1a)
−
464
216
42
E
AS
Single Pulse Avalanche Energy (Note 3)
Power Dissipation
mJ
W
P
D
T = 25°C
C
Power Dissipation
T = 25°C
2.1
A
(Note 1a)
T , T
Operating and Storage Junction Temperature Range
−55 to +150
°C
J
STG
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
THERMAL CHARACTERISTICS
Symbol
Parameter
Thermal Resistance, Junction−to−Case
Thermal Resistance, Junction−to−Ambient (Note 1a)
Ratings
3.0
Unit
°C/W
R
q
JC
R
60
q
JA
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
OFF CHARACTERISTICS
BV
Drain−to−Source Breakdown Voltage
I
I
= 250 mA, V = 0 V
40
−
−
−
V
DSS
D
GS
Breakdown Voltage
Temperature Coefficient
= 250 mA, referenced to 25°C
−
23
mV/°C
DBVDSS
DTJ
D
I
Zero Gate Voltage Drain Current
V
V
= 32 V, V = 0 V
−
−
−
−
1
mA
DSS
GSS
DS
GS
I
Gate−to−Source Leakage Current
=
20 V, V = 0 V
100
nA
GS
DS
ON CHARACTERISTICS
V
Gate−to−Source Threshold Voltage
V
I
= V , I = 250 mA
1.0
2.0
3.0
V
GS(th)
GS
DS
D
Gate−to−Source Threshold Voltage
Temperature Coefficient
= 250 mA, referenced to 25°C
−
−6
−
mV/°C
DVGS(th)
DTJ
D
R
Static Drain−to−Source
V
GS
V
GS
V
GS
V
DD
= 10 V, I = 23 A
−
−
−
−
2.0
3.2
3.0
107
2.6
3.95
3.9
−
mW
DS(on)
D
On Resistance
= 4.5 V, I = 19 A
D
= 10 V, I = 23 A, T = 125°C
D
J
g
FS
Forward Transconductance
= 5 V, I = 23 A
S
D
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
DS
= 20 V, V = 0 V, f = 1 MHz
−
−
3020
876
33
4230
1230
52
pF
iss
GS
C
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
oss
C
−
rss
R
0.1
2.8
6
W
g
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2
FDMD8240L
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
SWITCHING CHARACTERISTICS
t
t
Turn−On Delay Time
Rise Time
V
= 20 V, I = 23 A, V = 10 V,
GEN
−
−
−
−
−
−
−
−
12
8
22
16
58
18
56
30
−
ns
d(on)
DD
D
GS
R
= 6 W
t
r
Turn−Off Delay Time
Fall Time
36
9
d(off)
t
f
Q
Total Gate Charge
Total Gate Charge
Gate−to−Source Charge
Gate−to−Drain “Miller” Charge
V
GS
V
GS
V
DD
V
DD
= 0 V to 10 V, V = 20 V, I = 23 A
40
21
9
nC
g(tot)
DD
D
= 0 V to 5 V, V = 20 V, I = 23 A
DD
D
Q
= 20 V, I = 23 A
D
gs
Q
= 20 V, I = 23 A
5
−
gd
D
DRAIN−SOURCE DIODE CHARACTERISTICS
V
Source−to−Drain Diode Forward
V
V
= 0 V, I = 23 A (Note 2)
−
−
−
−
0.8
0.7
41
1.3
1.2
65
V
SD
GS
S
Voltage
= 0 V, I = 1.6 A (Note 2)
GS
S
t
Reverse Recovery Time
I = 23 A, di/dt = 100 A/ms
F
ns
rr
Q
Reverse Recovery Charge
21
32
nC
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
NOTES:
2
1. R
is determined with the device mounted on a 1 in pad 2 oz copper pad on a 1.5 × 1.5 in. board of FR−4 material. R
is guaranteed
JC
q
q
JA
by design while R
is determined by the user’s board design.
q
CA
a) 60°C/W when mounted on
b) 130°C/W when mounted on
a minimum pad of 2 oz copper
2
a 1 in pad of 2 oz copper
2. Pulse Test: Pulse Width < 300 ms, Duty cycle < 2.0%.
3. E of 216 mJ is based on starting T = 25 °C, L = 3 mH, I = 12 A, V = 40 V, V = 10 V. 100% tested at L = 0.1 mH, I = 37 A.
AS
J
AS
DD
GS
AS
4. Pulsed Id please refer to Figure 11 SOA graph for more details.
5. Computed continuous current limited to Max Junction Temperature only, actual continuous current will be limited by thermal &
electro−mechanical application board design.
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3
FDMD8240L
TYPICAL CHARACTERISTICS
(T = 25°C unless otherwise noted)
J
150
120
6
V
= 10 V
GS
Pulse Duration = 80 ms
Duty Cycle = 0.5 % Max
V
= 6 V
GS
V
GS
= 4 V
V
= 3.5 V
GS
V
GS
= 4.5 V
4
2
90
60
30
V
GS
= 4 V
V
= 4.5 V
= 10 V
GS
V
GS
= 3.5 V
Pulse Duration = 80 ms
Duty Cycle = 0.5 % Max
V
GS
V
= 6 V
GS
0
0.0
0
0
30
60
90
120
0.3
0.6
0.9
1.2
1.5
150
V
DS
, Drain to Source Voltage (V)
I
D,
Drain Current (A)
Figure 2. Normalized On−Resistance vs.
Figure 1. On−Region Characteristics
Drain Current and Gate Voltage
15
10
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
Pulse Duration = 80 ms
Duty Cycle = 0.5 % Max
I
= 23 A
= 10 V
D
V
GS
I
D
= 23 A
5
0
T = 125°C
J
0.9
0.8
0.7
T = 25°C
J
−75 −50 −25
0
25 50
75 100 125 150
2
3
4
5
6
7
8
9
10
T , Junction Temperature (5C)
J
V
GS
, Gate to Source Voltage (V)
Figure 4. On−Resistance vs.
Figure 3. Normalized On−Resistance vs.
Gate to Source Voltage
Junction Temperature
150
120
200
100
10
1
Pulse Duration = 80 ms
Duty Cycle = 0.5 % Max
V
GS
= 0 V
V
DS
= 5 V
90
60
30
T = 150°C
J
T = 25°C
J
0.1
T = 25°C
J
T = 150°C
J
0.01
T = −55°C
J
T = −55°C
J
0.001
0
0.2
0.4
0.6
0.8
1.0
1.2
0.0
1
2
3
4
5
V
SD
, Body Diode Forward Voltage (V)
V
GS
, Gate to Source Voltage (V)
Figure 6. Source to Drain Diode
Forward Voltage vs. Source Current
Figure 5. Transfer Characteristics
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4
FDMD8240L
TYPICAL CHARACTERISTICS (continued)
(T = 25°C unless otherwise noted)
J
10
8
10000
1000
100
C
I
D
= 23 A
iss
V
DD
= 15 V
6
4
C
oss
V
DD
= 20 V
C
rss
V
DD
= 25 V
10
2
0
f = 1 MHz
= 0 V
V
GS
1
0
10
40
50
20
30
0.1
1
10
Drain to Source Voltage (V)
DS
40
150
1
Q ,Gate Charge (nC)
g
V
Figure 8. Capacitance vs Drain to Source
Voltage
Figure 7. Gate Charge Characteristics
100
10
1
100
80
T = 25°C
J
V
GS
= 10 V
60
40
20
0
T = 125°C
J
V
GS
= 4.5 V
T = 100°C
J
R
= 3.0 °C/W
q
JC
1
0.001
0.01
0.1
10
100
25
50
75
100
125
t
, Time in Avalanche (ms)
AV
T , Case Temperature (5C)
C
Figure 10. Maximum Continuous Drain
Current vs. Case Temperature
Figure 9. Unclamped Inductive
Switching Capability
10000
1000
100
1000
Single Pulse
R
= 3.0°C/W
= 25°C
θ
JC
T
C
100
10
10 ms
This Area is
Limited by R
DS(ON)
100 ms
Single Pulse
T = Max Rated
1 ms
10 ms
100 ms/DC
J
1
R
= 3.0°C/W
= 25°C
θ
JC
T
C
Curve Bent to
Measured Data
0.1
0.1
10
10
−5
−4
−3
−2
−1
1
10
100
10
10
10
10
t, Pulse Width (s)
V
DS
, Drain to Source Voltage (V)
Figure 12. Single Pulse Maximum
Power Dissipation
Figure 11. Forward Bias Safe Operating Area
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5
FDMD8240L
TYPICAL CHARACTERISTICS (continued)
(T = 25°C unless otherwise noted)
J
2
1
Duty Cycle−Descending Order
D = 0.5
0.2
P
DM
0.1
0.05
0.02
0.1
0.01
t
1
0.01
t
2
Notes:
Z
q
(t) = r(t) x R
q
JC
JC
R
= 3.0°C/W
θ
JC
Single Pulse
10
Peak T = P
Duty Cycle: D = t /t
x Z (t) + T
q
JC C
J
DM
1
2
0.001
−2
−4
−3
−1
−5
10
10
10
1
10
t, Rectangular Pulse Duration (s)
Figure 13. Junction−to−Case Transient Thermal Response Curve
POWERTRENCH is a registered trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United
States and/or other countries.
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6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
PQFN12 3.3X5, 0.65P
CASE 483BN
ISSUE A
DATE 26 AUG 2021
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13670G
PQFN12 3.3X5, 0.65P
PAGE 1 OF 1
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