FDMD8260L [ONSEMI]
60 V 双 N 沟道 PowerTrench® MOSFET;
| 型号： | FDMD8260L |
| 厂家： | 
ONSEMI |
| 描述： | 60 V 双 N 沟道 PowerTrench® MOSFET |
| 文件： | 总7页 (文件大小：431K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
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June 2015
FDMD8260L
Dual N-Channel Power Trench® MOSFET
60 V, 5.8 mΩ
Features
General Description
ꢀ Max rDS(on) = 5.8 mΩ at VGS = 10 V, ID = 15 A
ꢀ Max rDS(on) = 8.7 mΩ at VGS = 4.5 V, ID = 12 A
ꢀ Ideal for Flexible Layout in Primary Side of Bridge Topology
ꢀ 100% UIL Tested
This device includes two 60V N-Channel MOSFETs in a dual
Power (3.3 mm X 5 mm) package. HS source and LS Drain
internally connected for half/full bridge, low source inductance
package, low rDS(on)/Qg FOM silicon.
Applications
ꢀ Kelvin High Side MOSFET Drive Pin-out Capability
ꢀ Termination is Lead-free and RoHS Compliant
ꢀ Synchronous Buck : Primary Switch of Half / Full bridge
Converter for Telecom
ꢀ Motor Bridge : Primary Switch of Half / Full bridge Converter
for BLDC Motor
ꢀ MV POL : 48V Synchronous Buck Switch
Pin 1
1
2
3
4
5
6
12
11
10
9
D1
D1
D1
G2
S2
S2
G1
Pin 1
G1R
D2/S1
D2/S1
8
D2/S1
D2/S1
7
Power 3.3 x 5
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted.
Symbol
VDS
VGS
Parameter
Ratings
Units
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous
-Continuous
60
±20
V
V
TC = 25 °C
TC = 100 °C
TA = 25 °C
(Note 5)
(Note 5)
(Note 1a)
(Note 4)
(Note 3)
64
40
ID
A
-Continuous
15
-Pulsed
293
EAS
Single Pulse Avalanche Energy
Power Dissipation
Power Dissipation
Power Dissipation
181
mJ
W
TC = 25 °C
TA = 25 °C
TA = 25 °C
37
PD
(Note 1a)
(Note 1b)
2.1
1.0
TJ, TSTG
Operating and Storage Junction Temperature Range
-55 to +150
°C
Thermal Characteristics
RθJC
RθJA
RθJA
Thermal Resistance, Junction to Case
3.4
60
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
(Note 1a)
(Note 1b)
°C/W
130
Package Marking and Ordering Information
Device Marking
Device
Package
Reel Size
13 ’’
Tape Width
12 mm
Quantity
8260L
FDMD8260L
Power 3.3 x 5
3000 units
1
©2015 Fairchild Semiconductor Corporation
FDMD8260L Rev.1.0
www.fairchildsemi.com
Electrical Characteristics TJ = 25 °C unless otherwise noted.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = 250 μA, VGS = 0 V
60
V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
I
D = 250 μA, referenced to 25 °C
33
mV/°C
IDSS
IGSS
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
VDS = 48 V, VGS = 0 V
VGS = ±20 V, VDS = 0 V
1
μA
±100
nA
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 μA
1.0
1.5
-6
3.0
V
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
I
D = 250 μA, referenced to 25 °C
mV/°C
V
GS = 10 V, ID = 15 A
4.5
6.6
5.9
56
5.8
8.7
7.8
rDS(on)
gFS
Static Drain to Source On Resistance
Forward Transconductance
VGS = 4.5 V, ID = 12 A
mΩ
VGS = 10 V, ID = 15 A, TJ = 125 °C
VDD = 5 V, ID = 15 A
S
Dynamic Characteristics
Ciss
Coss
Crss
Rg
Input Capacitance
3745
558
22
5245
785
50
pF
pF
pF
Ω
VDS = 30 V, VGS = 0 V
f = 1 MHz
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
0.1
3.0
6.0
Switching Characteristics
td(on)
tr
td(off)
tf
Turn-On Delay Time
Rise Time
12
10
47
11
21
20
74
20
68
35
ns
ns
VDD = 30 V, ID = 15 A
V
GS = 10 V, RGEN = 6 Ω
Turn-Off Delay Time
Fall Time
ns
ns
Total Gate Charge
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
VGS = 0 V to 10 V
VGS = 0 V to 5 V
49
25
8.6
5.2
nC
nC
nC
nC
Qg(TOT)
VDD = 30 V
D = 15 A
I
Qgs
Qgd
Drain-Source Diode Characteristics
V
GS = 0 V, IS = 15 A
(Note 2)
(Note 2)
0.8
0.7
36
1.3
1.2
58
V
VSD
Source to Drain Diode Forward Voltage
VGS = 0 V, IS = 1.6 A
trr
Reverse Recovery Time
ns
IF = 15 A, di/dt = 100 A/μs
Qrr
Reverse Recovery Charge
17
30
nC
NOTES:
2
1. R
is determined with the device mounted on a 1 in pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
is guaranteed by design while R
is determined by
θJA
θJC
θCA
the user's board design.
b. 130 °C/W when mounted on
a minimum pad of 2 oz copper
a. 60 °C/W when mounted on
a 1 in padof 2oz copper
2
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0 %.
o
3. E of 181 mJ is based on starting T = 25 C, L = 3 mH, I = 11 A, V = 60 V, V = 10 V. 100% tested at L = 0.1 mH, I = 36 A.
AS
J
AS
DD
GS
AS
4. Pulsed Id please refer to Fig 11 SOA graph for more details.
5. Computed continuous current limited to Max Junction Temperature only, actual continuous current will be limited by thermal & electro-mechanical application board design.
2
www.fairchildsemi.com
©2015 Fairchild Semiconductor Corporation
FDMD8260L Rev.1.0
Typical Characteristics TJ = 25 °C unless otherwise noted.
200
6.0
4.5
3.0
1.5
0.0
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = 10 V
150
VGS = 6 V
VGS = 4 V
VGS = 3.5 V
VGS = 4.5 V
100
VGS = 4 V
50
VGS = 3.5 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = 10 V
VGS = 6 V
VGS = 4.5 V
0
0
1
2
3
4
5
0
40
80
120
160
200
VDS, DRAIN TO SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
Figure 1. On-Region Characteristics
Figure2. NormalizedOn-Resistance
vs. Drain Current and Gate Voltage
1.8
30
PULSE DURATION = 80 μs
ID = 15 A
DUTY CYCLE = 0.5% MAX
VGS = 10 V
1.6
1.4
1.2
1.0
0.8
0.6
24
18
12
6
ID = 15 A
TJ = 125 o
C
TJ = 25 o
C
4
0
-75 -50 -25
0
25 50 75 100 125 150
2
3
5
6
7
8
9
10
TJ, JUNCTION TEMPERATURE (oC)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure3. Normalized On Resistance
vs. Junction Temperature
Figure4. On Resistance vs. Gate to
Source Voltage
200
200
100
10
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
150
100
50
VGS = 0 V
VDS = 5 V
1
TJ = 150 o
C
TJ = 150 o
C
0.1
TJ = 25 o
C
TJ = 25 o
C
0.01
TJ = -55 o
C
TJ = -55 o
C
0
0.001
1
2
3
4
5
6
0.0
0.2
0.4
0.6
0.8
1.0
1.2
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure6. Source to Drain Diode
Forward Voltage vs. Source Current
3
www.fairchildsemi.com
©2015 Fairchild Semiconductor Corporation
FDMD8260L Rev.1.0
Typical Characteristics TJ = 25 °C unless otherwise noted.
10
10000
1000
100
10
ID = 15 A
Ciss
8
VDD = 30 V
Coss
6
VDD = 20 V
VDD = 40 V
4
2
0
Crss
f = 1 MHz
GS = 0 V
V
1
0.1
0
10
20
30
40
50
1
10
60
150
1
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure7. GateChargeCharacteristics
Figure8. Capacitancevs.Drain
to Source Voltage
80
60
40
20
0
100
TJ = 25 oC
VGS = 10 V
10
VGS = 4.5 V
TJ = 125 o
C
RθJC = 3.4 oC/W
1
0.001
0.01
0.1
1
10
100
25
50
75
100
125
TC, CASE TEMPERATURE (oC)
tAV, TIME IN AVALANCHE (ms)
Figure 9. Unclamped Inductive
Switching Capability
Figure10.MaximumContinuousDrain
Current vs. Case Temperature
500
10000
1000
100
SINGLE PULSE
RθJC = 3.4 oC/W
C = 25 oC
100
10
T
10 μs
100 μs
THIS AREA IS
1
LIMITED BY rDS(on)
1 ms
10 ms
DC
SINGLE PULSE
TJ = MAX RATED
0.1
0.01
RθJC = 3.4 oC/W
CURVE BENT TO
MEASURED DATA
T
C = 25 oC
10
10-5
10-4
10-3
t, PULSE WIDTH (sec)
10-2
10-1
0.01
0.1
1
10
100200
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure11. ForwardBiasSafe
Operating Area
Figure12. Single PulseMaximum
Power Dissipation
4
www.fairchildsemi.com
©2015 Fairchild Semiconductor Corporation
FDMD8260L Rev.1.0
Typical Characteristics TJ = 25 °C unless otherwise noted.
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
0.2
P
0.1
DM
0.05
0.1
0.02
0.01
t
1
t
2
NOTES:
(t) = r(t) x R
SINGLE PULSE
0.01
Z
θJC
θJC
o
R
= 3.4 C/W
θJC
Peak T = P
x Z (t) + T
θJC C
J
DM
Duty Cycle, D = t / t
1
2
0.001
10-5
10-4
10-3
t, RECTANGULAR PULSE DURATION (sec)
10-2
10-1
1
Figure 13. Junction-to-Case Transient Thermal Response Curve
5
www.fairchildsemi.com
©2015 Fairchild Semiconductor Corporation
FDMD8260L Rev.1.0
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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