FDMD8580 [ONSEMI]
双 N 沟道 PowerTrench® MOSFET 80 V,82A,4.6 mΩ;型号: | FDMD8580 |
厂家: | ONSEMI |
描述: | 双 N 沟道 PowerTrench® MOSFET 80 V,82A,4.6 mΩ |
文件: | 总12页 (文件大小:709K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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December 2015
FDMD8580
Dual N-Channel PowerTrench® MOSFET
Q1: 80 V, 82 A, 4.6 mΩ Q2: 80 V, 82 A, 4.6 mΩ
Features
General Description
Q1: N-Channel
This device includes two 80V N-Channel MOSFETs in a dual
power (5 mm X 6 mm) package. HS source and LS drain
internally connected for half/full bridge, low source inductance
package, low rDS(on)/Qg FOM silicon.
Max rDS(on) = 4.6 mΩ at VGS = 10 V, ID = 16 A
Max rDS(on) = 6.0 mΩ at VGS = 8 V, ID = 14 A
Q2: N-Channel
Applications
Max rDS(on) = 4.6 mΩ at VGS = 10 V, ID = 16 A
Synchronous Buck: Primary Switch of Half / Full Bridge
Converter for Telecom
Max rDS(on) = 6.0 mΩ at VGS = 8 V, ID = 14 A
Ideal for Flexible Layout in Primary Side of Bridge Topology
100% UIL Tested
Motor Bridge: Primary Switch of Half / Full Bridge Converter
for BLDC Motor
MV POL: 48V Synchronous Buck Switch
Kelvin High Side MOSFET Drive Pin-out Capability
RoHS Compliant
Half/Full Bridge Secondary Synchronous Rectification
Bottom
Top
D2/S1
D2/S1
G1
G2
Pin 1
D2/S1
G2
S2
GR
D1
D2/S1
D2/S1
D2/S1
D1
D1
D1
D1
GR
Pin 1
G1
Power 5 x 6
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted.
Symbol
VDS
VGS
Parameter
Q1
80
Q2
80
Units
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous
-Continuous
V
V
±20
82
±20
82
TC = 25 °C
TC = 100 °C
TA = 25 °C
(Note 5)
(Note 5)
52
52
ID
A
-Continuous
161a
482
337
59
161b
482
337
59
-Pulsed
(Note 4)
(Note 3)
EAS
Single Pulse Avalanche Energy
Power Dissipation
Power Dissipation
mJ
W
TC = 25 °C
TA = 25 °C
PD
2.31a
2.31b
TJ, TSTG
Operating and Storage Junction Temperature Range
-55 to +150
°C
Thermal Characteristics
RθJC
RθJA
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient
2.1
551a
2.1
55 1b
°C/W
Package Marking and Ordering Information
Device Marking
Device
Package
Reel Size
13 ’’
Tape Width
Quantity
3000 units
FDMD8580
FDMD8580
Power 5 x 6
12 mm
©2015 Fairchild Semiconductor Corporation
FDMD8580 Rev.1.0
1
www.fairchildsemi.com
Electrical Characteristics TJ = 25 °C unless otherwise noted.
Symbol
Parameter
Test Conditions
Type
Min.
Typ.
Max. Units
Off Characteristics
Q1
Q2
80
80
BVDSS
Drain to Source Breakdown Voltage
ID = 250 μA, VGS = 0 V
V
ΔBVDSS Breakdown Voltage Temperature
Q1
Q2
50
50
I
D = 250 μA, referenced to 25 °C
mV/°C
ΔTJ
IDSS
Coefficient
Q1
Q2
1
Zero Gate Voltage Drain Current
VDS = 64 V, VGS = 0 V
VGS = ±20 V, VDS = 0 V
μA
1
Q1
Q2
±100
nA
IGSS
Gate to Source Leakage Current
±100
On Characteristics
Q1
Q2
2.0
2.0
3.4
3.4
4.5
V
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 μA
4.5
ΔVGS(th) Gate to Source Threshold Voltage
Q1
Q2
-10
-10
I
D = 250 μA, referenced to 25 °C
VGS = 10 V, ID = 16 A
GS = 8 V, ID = 14 A
mV/°C
ΔTJ
Temperature Coefficient
3.5
4.2
5.3
3.5
4.2
5.3
4.6
6.0
V
Q1
Q2
VGS = 10 V, ID = 16 A, TJ = 125 °C
VGS = 10 V, ID = 16 A
7.0
4.6
6.0
7.0
mΩ
rDS(on)
Static Drain to Source On Resistance
VGS = 8 V, ID = 14 A
VGS = 10 V, ID = 16 A, TJ = 125 °C
Q1
Q2
51
51
gFS
Forward Transconductance
VDD = 10 V, ID = 16 A
S
Dynamic Characteristics
Q1
Q2
4195 5875
4195 5875
Ciss
Coss
Crss
Rg
Input Capacitance
pF
pF
pF
Ω
V
DS = 40 V, VGS = 0 V
Q1
Q2
602
602
845
845
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
f = 1 MHz
Q1
Q2
19
19
38
38
Q1
Q2
0.1
0.1
1.7
1.7
3.5
3.5
Switching Characteristics
Q1
Q2
25
25
40
40
td(on)
tr
td(off)
tf
Turn-On Delay Time
Rise Time
ns
ns
Q1
Q2
19
19
34
34
VDD = 40 V, ID = 16 A
V
GS = 10 V, RGEN = 6 Ω
Q1
Q2
31
31
50
50
Turn-Off Delay Time
Fall Time
ns
Q1
Q2
10
10
20
20
ns
Q1
Q2
57
57
80
80
Qg(TOT)
Qgs
Qgd
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
VGS = 0 V to 10 V
nC
nC
nC
V
DD = 40 V,
Q1
Q2
21
21
I
D =16 A
Q1
Q2
12
12
©2015 Fairchild Semiconductor Corporation
FDMD8580 Rev.1.0
2
www.fairchildsemi.com
Electrical Characteristics TJ = 25 °C unless otherwise noted.
Symbol
Parameter
Test Conditions
Type Min.
Typ. Max. Units
Drain-Source Diode Characteristics
Q1
Q2
0.8
0.8
1.3
1.3
VSD
VSD
trr
Source to Drain Diode Forward Voltage VGS = 0 V, IS = 16 A
(Note 2)
(Note 2)
V
V
Q1
Q2
0.7
0.7
1.2
1.2
Source to Drain Diode Forward Voltage VGS = 0 V, IS = 2 A
Reverse Recovery Time
Q1
Q2
46
46
73
73
ns
nC
IF = 16 A, di/dt = 100 A/μs
Q1
Q2
34
34
55
55
Qrr
Reverse Recovery Charge
NOTES:
2
1. R
is determined with the device mounted on a 1 in pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
is guaranteed by design while R
is determined by
θJA
θJC
θCA
the user's board design.
a. 55 °C/W when mounted on
a 1 in padof 2oz copper
b. 55 °C/W when mounted on
a 1 in pad of 2 oz copper
2
2
c. 155 °C/W when mounted on
a minimum pad of 2 oz copper
d. 155 °C/W when mounted on
a minimum pad of 2 oz copper
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0 %.
o
3. Q1: E of 337 mJ is based on starting T = 25 C, L = 3 mH, I = 15 A, V = 80 V, V = 10 V. 100% tested at L = 0.1mH, I = 49 A.
AS
J
AS
DD
GS
AS
o
Q2: E of 337 mJ is based on starting T = 25 C, L = 3 mH, I = 15 A, V = 80 V, V = 10 V. 100% tested at L = 0.1mH, I = 49 A.
AS
J
AS
DD
GS
AS
4. Pulsed Id please refer to Fig 11 and Fig 24 SOA graph for more details.
5. Computed continuous current limited to max junction temperature only, actual continuous current will be limited by thermal & electro-mechanical application board design.
©2015 Fairchild Semiconductor Corporation
FDMD8580 Rev.1.0
3
www.fairchildsemi.com
Typical Characteristics (Q1 N-Channel) TJ = 25°C unless otherwise noted.
180
150
120
90
6.0
4.5
3.0
1.5
0.0
VGS = 10 V
VGS = 8 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = 5.5 V
VGS = 7 V
VGS = 6 V
VGS = 7 V
VGS = 8 V
VGS = 6 V
60
VGS = 5.5 V
30
VGS = 10 V
150 180
0
0.0
0
30
60
90
120
0.5
1.0
1.5
2.0
VDS, DRAIN TO SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
Figure 1. On Region Characteristics
Figure2. N o r m a l i z e d O n - R e s i s ta n c e
vs. Drain Current and Gate Voltage
2.0
25
ID = 16 A
1.9
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = 10 V
20
15
10
5
ID = 16 A
TJ = 125 o
C
TJ = 25 o
C
0
-75 -50 -25
0
25 50 75 100 125 150
4
5
6
7
8
9
10
TJ, JUNCTION TEMPERATURE (oC)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On Resistance
vs. Junction Temperature
Figure4. On-Resistance vs. Gate to
Source Voltage
180
200
100
PULSE DURATION = 80 μs
VGS = 0 V
DUTY CYCLE = 0.5% MAX
150
120
90
60
30
0
VDS = 5 V
10
TJ = 150 o
C
1
TJ = 25 o
C
0.1
TJ = 25 o
C
TJ = 150 o
C
0.01
TJ = -55 o
C
TJ = -55 o
C
0.001
2
3
4
5
6
7
8
9
10
0.0
0.2
0.4
0.6
0.8
1.0
1.2
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure6. Source to Drain Diode
Forward Voltage vs. Source Current
©2015 Fairchild Semiconductor Corporation
FDMD8580 Rev.1.0
4
www.fairchildsemi.com
Typical Characteristics (Q1 N-Channel) TJ = 25°C unless otherwise noted.
10
8
10000
1000
100
10
ID = 16 A
Ciss
VDD = 30 V
VDD = 40 V
Coss
6
VDD = 50 V
4
f = 1 MHz
GS = 0 V
2
Crss
V
0
1
0
12
24
36
48
60
0.1
1
10
80
150
1
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
Figure8. C a p a c i t a n c e v s . D r a i n
to Source Voltage
90
72
54
36
18
0
100
10
1
VGS = 10 V
TJ = 25 o
C
VGS = 8 V
TJ = 100 o
C
TJ = 125 o
C
RθJC = 2.1 oC/W
0.001
0.01
0.1
1
10
100
1000
25
50
75
100
125
TC, CASE TEMPERATURE (oC)
tAV, TIME IN AVALANCHE (ms)
Figure9. U n c l a m p e d I n d u c t i v e
Switching Capability
Figure10. Maximum Continuous Drain
Current vs. Case Temperature
1000
100
10
10000
SINGLE PULSE
RθJC = 2.1 oC/W
C = 25 oC
T
1000
100
10
10 μs
THIS AREA IS
LIMITED BY rDS(on)
100 μs
SINGLE PULSE
TJ = MAX RATED
RθJC = 2.1 oC/W
C = 25 oC
1
1 ms
10 ms
CURVE BENT TO
MEASURED DATA
T
100 ms
0.1
0.1
10-5
10-4
10-3
t, PULSE WIDTH (sec)
10-2
10-1
1
10
100 300
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure11. Forward Bias Safe
Operating Area
Figure12. Single Pulse Maximum Power
Dissipation
©2015 Fairchild Semiconductor Corporation
FDMD8580 Rev.1.0
5
www.fairchildsemi.com
Typical Characteristics (Q1 N-Channel) TJ = 25°C unless otherwise noted.
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
0.2
0.1
0.05
P
DM
0.1
0.02
0.01
t
1
t
2
NOTES:
(t) = r(t) x R
0.01
Z
θJC
θJC
SINGLE PULSE
o
R
= 2.1 C/W
θJC
Peak T = P
x Z (t) + T
J
DM
θJC C
Duty Cycle, D = t / t
1
2
0.001
10-5
10-4
10-3
t, RECTANGULAR PULSE DURATION (sec)
10-2
10-1
1
Figure 13. Junction-to-Case Transient Thermal Response Curve
©2015 Fairchild Semiconductor Corporation
FDMD8580 Rev.1.0
6
www.fairchildsemi.com
Typical Characteristics (Q2 N-Channel) TJ = 25 °C unless otherwise noted.
180
150
120
90
6.0
4.5
3.0
1.5
0.0
VGS = 10 V
VGS = 8 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = 5.5 V
VGS = 7 V
VGS = 6 V
VGS = 7 V
VGS = 8 V
VGS = 6 V
60
VGS = 5.5 V
30
VGS = 10 V
150 180
0
0.0
0
30
60
90
120
0.5
1.0
1.5
2.0
VDS, DRAIN TO SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
Figure 14. On- Region Characteristics
Figure 15. Normalized on-Resistance vs. Drain
Current and Gate Voltage
25
2.0
ID = 16 A
GS = 10 V
1.9
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
20
V
ID = 16 A
15
10
TJ = 125 o
C
5
0
TJ = 25 o
C
4
5
6
7
8
9
10
-75 -50 -25
0
25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 17. On-Resistance vs. Gate to
Source Voltage
Figure 16. Normalized On-Resistance
vs. Junction Temperature
180
200
100
PULSE DURATION = 80 μs
VGS = 0 V
DUTY CYCLE = 0.5% MAX
150
120
90
60
30
0
VDS = 5 V
10
TJ = 150 o
C
1
TJ = 25 oC
0.1
TJ = 25 o
C
TJ = 150 o
C
0.01
TJ = -55 o
C
TJ = -55 o
C
0.001
2
3
4
5
6
7
8
9
10
0.0
0.2
0.4
0.6
0.8
1.0
1.2
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 18. Transfer Characteristics
Figure 19. Source to Drain Diode
Forward Voltage vs. Source Current
©2015 Fairchild Semiconductor Corporation
FDMD8580 Rev.1.0
7
www.fairchildsemi.com
Typical Characteristics (Q2 N-Channel) TJ = 25°C unless otherwise noted.
10000
1000
100
10
10
8
ID = 16 A
Ciss
VDD = 30 V
VDD = 40 V
Coss
6
VDD = 50 V
4
f = 1 MHz
GS = 0 V
Crss
2
V
1
0
0.1
1
10
80
150
1
0
12
24
36
48
60
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 21. Capacitance vs. Drain
to Source Voltage
Figure 20. Gate Charge Characteristics
90
72
54
36
18
0
100
10
1
VGS = 10 V
TJ = 25 o
C
VGS = 8 V
TJ = 100 o
C
TJ = 125 o
C
R
θJC = 2.1 oC/W
0.001
0.01
0.1
1
10
100
1000
25
50
75
100
125
TC, CASE TEMPERATURE (oC)
tAV, TIME IN AVALANCHE (ms)
Figure 22. Unclamped Inductive
Switching Capability
F ig ure 23 . Ma ximum C on tin uo us D rain
Current vs. Case Temperature
1000
100
10
10000
1000
100
SINGLE PULSE
RθJC = 2.1 oC/W
T
C = 25 o
C
10 μs
THIS AREA IS
LIMITED BY rDS(on)
100 μs
SINGLE PULSE
TJ = MAX RATED
RθJC = 2.1 oC/W
TC = 25 oC
1
1 ms
10 ms
CURVE BENT TO
MEASURED DATA
100 ms
0.1
0.1
10
10-5
10-4
10-3
t, PULSE WIDTH (sec)
10-2
10-1
1
10
100
300
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 24. Forward Bias Safe
Operating Area
Figure 25. Single Pulse Maximum Power
Dissipation
©2015 Fairchild Semiconductor Corporation
FDMD8580 Rev.1.0
8
www.fairchildsemi.com
Typical Characteristics (Q2 N-Channel) TJ = 25 °C unless otherwise noted.
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
0.2
0.1
0.05
P
DM
0.1
0.02
0.01
t
1
t
2
NOTES:
(t) = r(t) x R
0.01
Z
θJC
θJC
o
SINGLE PULSE
R
= 2.1 C/W
θJC
Peak T = P
x Z (t) + T
J
DM
θJC C
Duty Cycle, D = t / t
1
2
0.001
10-5
10-4
10-3
t, RECTANGULAR PULSE DURATION (sec)
10-2
10-1
1
Figure 26. Junction-to-Case Transient Thermal Response Curve
©2015 Fairchild Semiconductor Corporation
FDMD8580 Rev.1.0
9
www.fairchildsemi.com
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are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
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FAIRCHILD
FDME1034CZT
Complementary PowerTrench® MOSFET N-channel: 20 V, 3.8 A, 66 mΩ P-channel: -20 V, -2.6 A, 142 mΩ
FAIRCHILD
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