FDMD84100 [ONSEMI]
双 N 沟道,PowerTrench® MOSFET,100V,21A,20mΩ;型号: | FDMD84100 |
厂家: | ONSEMI |
描述: | 双 N 沟道,PowerTrench® MOSFET,100V,21A,20mΩ |
文件: | 总8页 (文件大小:356K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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June 2016
FDMD84100
Dual N-Channel PowerTrench® MOSFET
100 V, 21 A, 20 mΩ
Features
General Description
Max rDS(on) = 20 mΩ at VGS = 10 V, ID = 7 A
Max rDS(on) = 32 mΩ at VGS = 6 V, ID = 5.5 A
This package integrates two N-Channel devices connected
internally in common-source configuration. This enables very
low package parasitics and optimized thermal path to the
common source pad on the bottom. Provides a very small
footprint (3.3 x 5 mm) for higher power density.
Ideal for flexible layout in secondary side synchronous
rectification
Termination is Lead-free and RoHS Compliant
100% UIL tested
Applications
Isolated DC-DC Synchronous Rectifiers
Common Ground Load Switches
Bottom
Top
D2
D2
D2
D2
D2
D2
G2
1
2
3
4
G1
D1
D1
D1
8
7
6
5
Pin 1
G2
S1/S2
G1
D1
D1
D1
S1,S2 to backside
Pin 1
Power 3.3 x 5
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
VGS
Parameter
Ratings
Units
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous
-Continuous
100
V
V
±20
TC = 25 °C
TA = 25 °C
21
ID
(Note 1a)
(Note 4)
(Note 3)
7
80
A
-Pulsed
EAS
Single Pulse Avalanche Energy
Power Dissipation
121
mJ
W
TC = 25 °C
TA = 25 °C
23
PD
Power Dissipation
(Note 1a)
2.1
TJ, TSTG
Operating and Storage Junction Temperature Range
-55 to +150
°C
Thermal Characteristics
RθJC
RθJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
5.3
60
°C/W
(Note 1a)
Package Marking and Ordering Information
Device Marking
Device
Package
Reel Size
13 ’’
Tape Width
Quantity
84100
FDMD84100
Power 3.3 x 5
12 mm
3000 units
©2014 Fairchild Semiconductor Corporation
FDMD84100 Rev.1.1
1
www.fairchildsemi.com
Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = 250 μA, VGS = 0 V
100
V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
I
D = 250 μA, referenced to 25 °C
74
mV/°C
IDSS
IGSS
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
VDS = 80 V, VGS = 0 V
VGS = ±20 V, VDS = 0 V
1
μA
±100
nA
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 μA
2
3.1
-9
4
V
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
I
D = 250 μA, referenced to 25 °C
VGS = 10 V, ID = 7 A
GS = 6 V, ID = 5.5 A
mV/°C
16
24
30
17
20
32
38
rDS(on)
gFS
Static Drain to Source On Resistance
Forward Transconductance
V
mΩ
VGS = 10 V, ID = 7 A, TJ = 125 °C
VDD = 5 V, ID = 7 A
S
Dynamic Characteristics
Ciss
Coss
Crss
Rg
Input Capacitance
734
168
6.6
980
225
15
pF
pF
pF
Ω
VDS = 50 V, VGS = 0 V
f = 1 MHz
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
0.1
1.3
3
Switching Characteristics
td(on)
tr
td(off)
tf
Turn-On Delay Time
Rise Time
8.4
2.6
14
17
10
25
10
16
11
ns
ns
VDD = 50 V, ID = 7 A
VGS = 10 V, RGEN = 6 Ω
Turn-Off Delay Time
Fall Time
ns
2.8
11
ns
Total Gate Charge
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
VGS = 0 V to 10 V
VGS = 0 V to 6 V
nC
nC
nC
nC
Qg(TOT)
7.3
3.4
2.5
VDD = 50 V
D = 7 A
I
Qgs
Qgd
Drain-Source Diode Characteristics
VSD
trr
Source to Drain Diode Forward Voltage
Reverse Recovery Time
VGS = 0 V, IS = 7 A
(Note 2)
0.8
43
44
1.2
70
71
V
ns
nC
IF = 7 A, di/dt = 100 A/μs
Qrr
Reverse Recovery Charge
NOTES:
2
1. R
is determined with the device mounted on a 1 in pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
is guaranteed by design while R
is determined by
θCA
θJA
θJC
the user's board design.
b.160 °C/W when mounted on
a minimum pad of 2 oz copper
a. 60 °C/W when mounted on
a 1 in padof 2oz copper
2
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0 %.
o
3. E of 121 mJ is based on starting T = 25 C, L = 3 mH, I = 9 A, V = 100 V, V = 10 V. 100% tested at L = 0.1 mH, I = 30 A.
AS
J
AS
DD
GS
AS
4. Pulse Id refers to Figure.11 Forward Bias Safe Operation Area.
2
www.fairchildsemi.com
©2014 Fairchild Semiconductor Corporation
FDMD84100 Rev.1.1
Typical Characteristics TJ = 25 °C unless otherwise noted
4
3
2
1
0
80
VGS = 10 V
VGS = 8 V
VGS = 5 V
60
VGS = 6 V
VGS = 7 V
VGS = 7 V
40
VGS = 8 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = 6 V
20
0
VGS = 10 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = 5 V
0
20
40
60
80
0
1
2
3
4
5
ID, DRAIN CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 1. On-Region Characteristics
Figure2. Normalized On- Resistance
v s D r a i n C u r r e n t a n d G a t e V o l t a g e
2.2
100
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
ID = 7 A
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
VGS = 10 V
80
60
40
20
0
ID = 7 A
TJ = 125 o
C
TJ = 25 o
C
4
5
6
7
8
9
10
-75 -50 -25
0
25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
VGS, GATE TO SOURCE VOLTAGE (V)
F i gu re 3. No rma li zed O n- Resi sta nce
vs Junction Temperature
Figure 4. On-Resistance vs Gate to
Source Voltage
80
100
VGS = 0 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
10
1
60
40
20
0
TJ = 150 o
C
VDS = 5 V
TJ = 25 oC
0.1
TJ = 150 o
C
TJ = -55 o
C
TJ = 25 o
C
0.01
0.001
TJ = -55 o
C
2
4
6
8
10
0.0
0.2
0.4
0.6
0.8
1.0
1.2
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure6. Source to Drain Diode
Forward Voltage vs Source Current
3
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©2014 Fairchild Semiconductor Corporation
FDMD84100 Rev.1.1
Typical Characteristics TJ = 25 °C unless otherwise noted
2000
1000
10
Ciss
VDD = 50 V
ID = 7 A
8
6
4
2
0
Coss
VDD = 25 V
VDD = 75 V
100
10
1
Crss
f = 1 MHz
VGS = 0 V
0.1
1
10
100
0
2
4
6
8
10
12
VDS, DRAIN TO SOURCE VOLTAGE (V)
Q , GATE CHARGE (nC)
g
Figure8. Capacitance vs Drain
to Source Voltage
Figure 7. Gate Charge Characteristics
50
25
20
15
10
5
RθJC = 5.3 oC/W
TJ = 25 o
C
10
VGS = 10 V
TJ = 100 o
C
Limited by Package
TJ = 125 o
C
VGS = 6 V
1
0
25
0.001
0.01
0.1
1
10
50
50
75
100
125
150
TC, CASE TEMPERATURE (oC)
tAV, TIME IN AVALANCHE (ms)
Figure9. U n c l a m p e d I n d u c t i v e
Switching Capability
Figure10.M a x i m u m C o n t i n u o u s D r a i n
Current vs Case Temperature
200
100
10000
SINGLE PULSE
θJC = 5.3 oC/W
TC = 25 oC
R
10 µs
1000
100
10
10
1
THIS AREA IS
LIMITED BY rDS(on)
100 µs
SINGLE PULSE
TJ = MAX RATED
R
θJC = 5.3 oC/W
TC = 25 oC
1 ms
CURVE BENT TO
MEASURED DATA
10 ms
DC
0.1
0.1
10-5
10-4
10-3
t, PULSE WIDTH (sec)
10-2
10-1
1
1
10
100
300
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 12. Single Pulse Maximum
Power Dissipation
Figure11. ForwardBiasSafe
Operating Area
4
www.fairchildsemi.com
©2014 Fairchild Semiconductor Corporation
FDMD84100 Rev.1.1
Typical Characteristics TJ = 25 °C unless otherwise noted
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
0.2
P
0.1
DM
0.05
0.02
0.01
0.1
t
1
t
2
NOTES:
(t) = r(t) x R
0.01
Z
θJC
θJC
o
R
= 5.3 C/W
θJC
SINGLE PULSE
Peak T = P
x Z (t) + T
J
DM
θJC C
Duty Cycle, D = t / t
1
2
0.001
10-5
10-4
10-3
10-2
10-1
1
t, RECTANGULAR PULSE DURATION (sec)
Figure 13. Junction-to-Case Transient Thermal Response Curve
5
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©2014 Fairchild Semiconductor Corporation
FDMD84100 Rev.1.1
B
KEEP OUT
AREA
2X
A
2X
LAND PATTERN
RECOMMENDATION
SEE DETAIL A
C
SCALE: 2X
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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