FSL306LRL [ONSEMI]
650V 集成电源开关，带误差放大器，无偏置绕组，用于 3W 离线反激转换器;
| 型号： | FSL306LRL |
| 厂家： | 
ONSEMI |
| 描述： | 650V 集成电源开关，带误差放大器，无偏置绕组，用于 3W 离线反激转换器 开关 放大器 电源开关 转换器 |
| 文件： | 总16页 (文件大小：531K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
www.onsemi.cn
ൂᰁꢀ onsemi ℝꢁꢂꢃ
FSL306LR
PDIP−7 (PDIP−8 LESS PIN 6)
CASE 626A
ᛄ
®
FSL336LRꢀꢀᏰꢁඝꢂЖꢃꢂ
ࡈ
(PWM)ꢀ٬
SENSEFET ，ꢁ ꢂᲗ✈ᣠ᮸ঔꢃŔ▨ሇ்ҋএℝի、ԧℝի∮Ⅴҋჯრ͓
ꢀ⁰ (SMPS)ꢀᚎᙱ。ᚵᚎ૧ꢀᏰf▨ꢀիѿ╧ꢂ
ࡈ
，ईẁᣩ ᩕ҉ȯիএ
ࣨ
ŔእΕ⛻᪠ᨼ。⛰ꢄͥ᮸ᢸොଇࡈ
ί֭ጵ ɟꢀᢿŔ᮸ঔꢃ。
PDIP7 MINUS PIN 6 GW
CASE 707AA
ꢀᏰŔ PWMꢀᖇЖ
ࡈ
ӥᓌ：✈nៀ᮸ȯիꢀᢿŔ 10 Vꢂ ࡈ
、ᴀիῑൺ (UVLO)、ЭẟὨⅠ (LEB)、øӶŔ᧥ᥡො/͓ ឍ╁҈
ࡈ
、EMIꢀፀίࡈ
、⋍͓ឍ (TSD)、✈n▏ᢿጵɟŔꢁႆ ጵɟ
ގ
ඦꢀἡ⁰ᥡ٬ᜥ
Ⅼƽᒄꢀᢿ。ƽᒄѿ்ӥᓌ：᪗ᩍƽᒄ (OLP)、᪗իƽᒄ (OVP)、֭რ▏ƽᒄ (FB_OLP)、ტဘ᪗ἡ
ƽᒄ (AOCP)。FSL306LRई؏҈ᖰŻിଢ଼Ŕᨿ؏҈ሇ்。
ͥ᮸▨
ի؏҈რ͓٬Ցֱᰁჯ
᪠ጜş✈ᥡĮŔ࿅ļꢀἡℝĮ MARKING DIAGRAM
$Y&Z&2&K
FSL306LR
L336LR
&Z&3
fᅥᤚᰁჯ⛻Ŕѿ૧。ণ᠏，ᩣͅꢀիꢂ 230 V ꢀ៖，ୢ
AC
ẁᣩ᮸ȯի，ѿ૧
்А 120 mW，ୢᣩ᮸ȯի，ѿ૧ ¥ꢂ 25 mW。
FSL306LRN
FSL306LRLX
LR306LR, = Specific Device Code
FSR306LR
ꢄ
$Y
&Z
&2
&3
&K
= Logo
•ꢅͥਾ↺༉ૠ✈ SENSEFET：650 V
= Assembly Plant Code
= 2−Digit Date Code
= 3−Digit Date Code
= 2−Digits Lot Run Traceability Code
•ꢅ
ࣚ
ൺ࿅ļ⍡╧：50 kHz •ꢅៀᩍѿ૧：230 V ✄ဆᣩ᮸ȯի៖෯n 25 mW；230 V
AC
AC
✄⛽ဆ᮸ȯի៖෯n 120 mW
•ꢅៀꢄᩕ҉ȯիথঔ
•ꢅᖰŻ⍡╧ꢂЖѿ்，
ί EMI ꢅ •ꢅꢆꢁΒꢇἡ
ORDERING INFORMATION
See detailed ordering and shipping information on page 13 of
this data sheet.
•ꢅꢈĮ᪠ጜꢀἡ：250 mA
•ꢅͥਾᨿ
؏҈٬؏҈ꢀ
ᢿ •ꢅ
ꢂ໐Ȝꢇἡ •ꢅͥਾᢸො (ꢉ࿎) ଇ
ࡈ
•ꢅᖰŻ
פ
ҝƽᒄ：᪗ᩍƽᒄ (OLP)、᪗իƽᒄ (OVP)、֭რ▏ƽ ᒄ (FB_OLP)、ტဘ᪗ἡƽᒄ (AOCP)、⋍͓ឍ (TSD)
•ꢅ෦ᐠᣩƽᒄѿ்Ŕ൩͈ꢊ҈ꢋ؏ᰁჯŔꢋ؏៖
ࣚ
ൺꢂ 650 ms • These Devices are Pb−Free, Halide Free and are RoHS Compliant
ꢅ✈
•ꢅꢌ✈nඖ✈ꢀ
ࡈ
٬࿅
✊ၴ✈Ŕ SMPS •ꢅ✈ļᩕ҉ꢀ⁰Ŕრ͓ꢀ⁰
© Semiconductor Components Industries, LLC, 2013
1
Publication Order Number:
November, 2022 − Rev. 3
FSL306LRCN/D
FSL306LR
ꢅ✈ᨦꢆ
+
+
DC
OUT
_
VCOMP
Drain
VFB
HV−DC
INPUT
ILIMIT
VCC
Drain GND
HV−DC
INPUT
DC
OUT
_
ꢆ 1. ℝꢁᨼꢇꢈꢅ✈
ꢆ 2. ∮Ⅴҋꢉ↠ꢀᨼꢇꢈꢅ✈
ᨦꢆ
Drain
6, 7
V
CC
2
10 V HV
REG
Internal
Bias
V
Good
CC
V
V
BIAS
START
/ V
STOP
Transconductance
Amplifier
V
4
FB
V
/V
Green−
Mode
BURH BURL
OSC
Controller
V
BIAS
V
REF
Q
Q
S
R
I
PK
Gate
Driver
3R
R
PWM
Soft−
Start
LEB
I
3
5
LIMIT
V
SENSE
650 ms
Protection
Timing Control
V
COMP
40 ms
Delay
V
SENSE
LEB
V
OLP
R
SENSE
V
CC
1
GND
V
FB
V
OVP
V
AOCP
TSD
V
FB_OLP
ꢆ 3. ꢊ᮸ᨦꢆ
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2
FSL306LR
ჵ௪ᰝਾ
GND
VCC
Drain
Drain
7DIP
ILIMIT
VFB
VCOMP
ꢆ 4. ꢋ௪ᰝਾ
ꢋ௪ꢌꢍ
ꢋ௪ꢎ
ꢏӀ
ꢐᫀ
1
2
GND
ꢀꢁ。ꢀꢀꢁꢂꢁꢃꢄꢂꢅꢃꢆ SENSEFET ꢇꢈꢁ。
V
CC
ꢂꢃꢄꢅꢄꢆꢇꢈ。ꢉꢊꢋꢄꢌꢇꢍꢎͅ，ꢄ؏҈ꢂԃᇡ᪠ጜᖰŻꢁꢃ࿅ļꢌἡ。ईẁᣩꢃȯիꢌᢿꢆእΕ⛻，ꢉ
ꢊꢋꢌի᪗ꢁꢃ▨իꢌἡꢇ፻ᛓꢄ10 V (֢ᒑ
ࣞ
3)。ᄳꢃȯի▨n10 Vꢅ៖，ꢉꢊꢋё✈ꢁꢃ▨իᛓࡈ
ၖℝĮѿ ૧。
3
4
I
ꢉꢊꢋꢌ。ᛓ SENSEFETꢅꢆ໐Ȝ℠ἡ。ꢁꢃ 50ĂmAꢅꢌἡꢇἡ᪗⛰ꢆꢁꢃ 46 kW (3R + R)ꢅꢌℋ⛾ꢉꢊꢋꢃᖅА
GND ꢆÛĵꢃꢌℋꢆၖତঔ
ר
，Å̾ൺ໐Ȝꢌἡ℠ꢂ。 LIMIT
V
FB
ꢍꢎꢄꢆ。ᢸොଇ
ࡈ
ꢆ֭Ljꢎͅ。ꢉꢊꢋ᪗nVCOMPꢊꢋꢎϚꢌἡ᥅ꢄꢂᨼᕂࡈ
ꢎϚꢌի，ꢉꢌἡ⛾֢ꢌի⛾ ট᪗ϦիꢌℋਡবϦի
ꢆꢎϚꢌի+࿎Ᏸꢍᶴ。 5
V
COMP
ꢏꢐꢄꢆ。ᢸොଇ
ࡈ
ꢆꢎϚ。ጵɟਡবਾई V ꢂ GND ꢊꢋ+，Åൾ▐ԃൺሇꢂിଢ଼ꢆ҈ᇡሇ்。
COMP
6, 7
Drain
ꢑꢃ。▨իѿ╧ SENSEFETꢅ⃯ꢈᖅ。ᵄ，ई؏҈ꢂԃᇡ᪠ጜ，ꢁꢃ▨իꢌἡꢇᖰŻꢁꢃȯիၖꢄᖅА
ꢊꢋꢆꢃꢌ
ࡈ
̥ꢌ。⛰ំ V ꢅА8 V，ᐠᣩꢁꢃᰁषᯍ፻↠Ἓ。ꢁꢃ▨իꢌἡꢇꢈई V ꢅА10 Vꢅ៖ᐭ V
CC
CC
CC
ú፻͓ឍ。⌖
，ꢁꢃ▨իᛓࡈ
ൺොꢂ͓ឍ，®şV ꢅৄᓡई 10 V。 CC
www.onsemi.cn
3
FSL306LR
ভꢑᣠꢒ⍭ꢌꢓ(ℴ∮
׆
ᣩᛄ，T = 25°C。) A
ꢎ ꢔᝐ
ᣠꢕꢓ
ᣠꢒꢓ
ꢖꢗ
V
V
DS
⃯ꢈꢊꢋꢌի
ꢌꢇꢌի
−0.3
−0.3
−0.3
−0.3
−0.3
−
650.0
V
CC
26.0
V
V
COMP
V
COMP
ꢊꢋꢌի
ꢁꢃ
٭
ĭꢌի (Ỉ 1) V
V
֭ꢌի
12.0
12.0
2.8
V
FB
LIMIT
I
℠ἡꢊꢋꢌի
Β⃯ꢌἡ (Ỉ 2)
ԵΒ↺༉்Ჟ (Ỉ 3)
ማѿ૧
V
I
A
DM
E
AS
−
10.5
1.25
125
150
150
mJ
W
°C
°C
°C
P
D
−
T
J
−40
−
࿅ļণꢏ (Ỉ 4)
ᣠଇণꢏ
T
STG
സʈꢏႆ
−55
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
(֢ᚡᝧ)
ℴ∮
׆
ᣩᛄ，“ꢌᷴሇ”ጸꢇϷϚꢆ᠏ᐠϷἫᚥÖ⛻ꢆڡ
ሇ்֢ᝐ。ୢई⛽
Ö⛻᪠ጜ，ڡ
ሇ்
்⛾“ꢌᷴሇ”ጸ ꢇᐠϷሇ்֢ᝐ⛽⛰ೄ。
1.
2. Ო૭⍭ൺȜ：Βꢑႆꢒ℠nᣠଇণꢏ。
V
ꢐꢁꢃ
٭
ĭlꢈٱ
᪫ጜ٭
ĭ(11 V、I < 100 mA)。
COMP
CLAMP_MAX
3. L = 10 mH，؏҈T = 25°C。
J
4. ꢓ⌖ᵄ֢ᝐƽꢔ IC ࿅ļ，Ħ⛽ƽꢔᐠᣩꢌᷴሇ。
⋍ℋἫᚥ (ℴ∮
׆
ᣩꢕൺ，ꢖϹT = 25°C。) A
ꢎ ꢔᝐ
ᝐꢓ
ꢖꢗ
q
ণꢗꢘꢙꢚℋ (Ỉꢛ 5)
100
°C/W
JA
5. JEDEC ꢜꢝꢘꢙ，JESD51-2 ꢂἫᚥꢞ JESD51-3，͗ᣩᣠꢟꢠꢡꢢꢣ。
∩ꢀꢀ (ESD) ்ꢘ
ꢎ ꢔᝐ
ᝐꢓ
ꢖꢗ
ESD
4
2
kV
ijᰁꢤ，JESD22-A114 (Ỉꢛ 6)
̣Ö̥ꢌᰁꢤ，JESD22-C101 (Ỉꢛ 6)
6. ꢥ
ר
JEDEC ꢦΦJESD 22-A114 ꢂ JESD 22-C101。 ꢀᷴꢄ(ℴ∮
׆
ᣩᛄ，ꢖϹT = 25°C。) A
ꢎ ꢔᝐ
ꢙꢚꢛ
ᣠꢕꢓ ꢜꢝꢓ ᣠꢒꢓ
ꢖꢗ
SENSEFET ᮸Ϧ
BV
⃯ꢇꢈϛꢧꢌի
V
CC
V
DS
V
GS
V
GS
V
GS
V
GS
V
DD
V
DD
= 0 V, I = 250 mA
650
−
−
−
−
250
18
−
V
DSS
D
I
ꢨꢩꢈꢌի⃯ꢈꢌἡ
⃯ꢇꢈොꢌℋ
ꢎͅꢌ
= 520 V, T = 125°C
mA
W
DSS
A
R
DS(ON)
= 10 V, I = 0.3 A
−
12
D
C
ISS
= 0 V, V = 25 V, f = 1 MHz
−
97
pF
pF
pF
ns
ns
DS
C
ꢎϚꢌ
= 0 V, V = 25 V, f = 1 MHz
−
13.6
2.4
7.6
26.1
−
OSS
RSS
DS
C
֭ꢪĀꢎꢌ
ꢃԧ៖
= 0 V, V = 25 V, f = 1 MHz
−
−
DS
t
= 325 V, I = 0.7 A
−
−
r
D
t
⛻ℝ៖
= 325 V, I = 0.7 A
−
−
f
D
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4
FSL306LR
ꢀᷴꢄ(ℴ∮
׆
ᣩᛄ，ꢖϹT = 25°C。) (ᖅꢃꢫ) A
ꢎ ꢔᝐ
ꢙꢚꢛ
ᣠꢕꢓ ꢜꢝꢓ ᣠꢒꢓ
ꢖꢗ
ᖇЖ᮸Ϧ
f
ꢬ͓ꢭ╧
V
V
V
V
= 2.5 V
45
−
50
3
55
−
kHz
kHz
ms
OSC
COMP
COMP
COMP
COMP
f
M
ꢭ╧ᛓꢂ(Ỉ 7)
ᣠଇො៖
UVLO ꢰȜꢌի
= 2.5 V ៖, ꢮꢯ᪫ጜꢭ╧ᛓꢂ
t
= 2.5 V
11.2
7.2
6.3
35
7
13.3
8.0
7.0
50
15.4
8.8
7.7
65
on.max
V
START
= 0 V ៖, V ꢱꢭ
V
CC
V
STOP
ො
V
I
t
ꢌἡ℠ꢂꢇꢌἡ
ꢲ؏҈៖
V
V
= 2.5 V
= 2.5 V
mA
ms
PK
COMP
10
13
SS
COMP
ᴧᰁꢀ᮸Ϧ
V
ꢳᰁꢴ▨ꢵȜꢌի
ꢳᰁꢴĮꢵȜꢌի
ꢳᰁꢴꢶꢷ
V
V
= 15 V ៖, V
= 15 V ៖, V
ꢃԧ
0.58
0.52
−
0.65
0.59
60
0.72
0.66
−
V
V
BURH
CC
COMP
V
ℝĮ
BURL
CC
COMP
HYS
mV
BUR
ƽᒄ᮸Ϧ
I
໐Ȝ℠ἡ
V
= 2.5 V, di/dt = 300 mA/ms
0.40
−
0.45
−
0.50
200
3.3
1.2
−
A
ns
V
LIM
COMP
t
℠ἡꢸꢹ (Ỉ 7)
᪗ꢺƽꢻ
CLD
V
V
V
ꢃԧ
2.7
0.8
−
3.0
1.0
200
0.5
24.5
135
60
OLP
COMP
V
AOCP
ꢼꢽ᪗ἡƽꢻ (Ỉ 7)
Эꢾꢿꣀ៖ (Ỉ 7)
FB ꢬꢘƽꢻ
= 2.5 V
V
COMP
t
ns
V
LEB
V
V
V
ℝĮ
0.4
23.0
125
−
0.6
26.0
150
−
FB_OLP
FB
V
᪗իƽꢻ
ꢃԧ
V
OVP
CC
TSD
ꢚ͓ꣁꢏႆ (Ỉ 7)
TSD ꢶꢷꢏႆ (Ỉ 7)
᪗ꢺƽꢻꢸꢹ (Ỉ 7)
ƽꢻ
҈Ო؏៖ (Ỉ 7) °C
°C
ms
ms
HYS
TSD
t
V
COMP
> 3 V
−
40
−
DELAY
t
−
650
−
RESTART
ᢸොꢒꢈ᮸Ϧ
G
ꣂ࿎ଇ
ࡈ
ᢸො ꢌի֢֭
ꢎϚꢇꢌἡ
190
2.45
−
240
2.50
−12
12
290
2.55
−
mmho
V
m
V
REF
I
V
V
= V
= V
− 0.05 V
+ 0.05 V
mA
EA.SR
FB
REF
I
ꢎϚꣃꢌἡ
−
−
mA
EA.SK
FB
REF
▨ꢁᛓꢈ᮸Ϧ
V
▨իᛓ
ࡈ
ꢌի V
COMP
= 0 V, V
= 40 V
9
10
11
V
HVREG
DRAIN
ማꢈꢛ᮸Ϧ
I
I
࿅ļꢌꢇꢌἡ (¥ꢄꢂꢃϦ，꣄ꢬ͓᪗ꣅ)
࿅ļꢌꢇꢌἡ (ꢬ͓᪗ꣅꢇ)
؏҈̥ꢌꢌἡ
0 V < V
< V
−
−
−
−
−
0.25
0.8
6
0.35
1.3
−
mA
mA
mA
mA
V
OP1
COMP
BURL
V
V
V
V
< V
< V
COMP OLP
OP2
BURL
I
= 0 V, V
> 40 V
CH
CC
CC
CC
DRAIN
I
؏҈ꢌἡ
= Before V
, V = 0 V
120
35
155
−
START
START COMP
V
DRAIN
ᣠĮ⃯ꢈꢌꢇꢌի
= V
= 0 V ៖, V
ꢃԧ
COMP
DRAIN
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
(֢ᚡᝧ)
ℴ∮
׆
ᣩᛄ，“ꢌᷴሇ”ጸꢇϷϚꢆ᠏ᐠϷἫᚥÖ⛻ꢆڡ
ሇ்֢ᝐ。ୢई⛽
Ö⛻᪠ጜ，ڡ
ሇ்
்⛾“ꢌᷴሇ”ጸ ꢇᐠϷሇ்֢ᝐ⛽⛰ೄ。
7. ꢓ⌖ᣩƽꢔ，Ħট 100%
ڡ
Ἣᚥ。 www.onsemi.cn
5
FSL306LR
ꢜꢝꢄ்ᅡ
Switching Frequency (f
)
HV Regulator Voltage (V
)
OSC
HVREG
1.15
1.10
1.05
1.00
0.95
0.90
0.85
1.15
1.10
1.05
1.00
0.95
0.90
0.85
−40 −20
0
25
50
75
100 125
100 125
100 125
−40 −20
0
25
50
75
100 125
Temperature (°C)
Temperature (°C)
ꢆ 5. ꢙꢚ⍡╧⛾ꢁႆŔꢃ
ߋ
ꢆ 6. ▨ꢁᛓꢈꢀꢁ⛾ꢁႆŔꢃ
ߋ
Start Threshold Voltage (V
)
Stop Threshold Voltage (V
)
START
STOP
1.15
1.10
1.05
1.00
0.95
0.90
0.85
1.15
1.10
1.05
1.00
0.95
0.90
0.85
−40 −20
0
25
50
75
−40 −20
0
25
50
75
100 125
Temperature (°C)
Temperature (°C)
ꢆ 7. ؏҈⃘ꢓꢀꢁ⛾ꢁႆ
ꢆ 8. ȼᵂ⃘ꢓꢀꢁ⛾ꢁႆŔꢃ
ߋ
Burst Mode High Voltage (V
)
Burst Mode Low Voltage (V
)
BURH
BURL
1.15
1.10
1.05
1.00
0.95
0.90
0.85
1.15
1.10
1.05
1.00
0.95
0.90
0.85
−40 −20
0
25
50
75
−40 −20
0
25
50
75
100 125
Temperature (°C)
Temperature (°C)
ꢆ 9. ᴧᰁꢀ▨ꢀꢁ⛾ꢁႆŔꢃ
ߋ
ꢆ 10. ᴧᰁꢀĮꢀꢁ⛾ꢁႆŔꢃ
ߋ
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6
FSL306LR
ꢜꢝꢄ்ᅡ(ᖅꢃꢫ)
Operating Supply Current (I
)
Feedback Voltage Reference (V
)
OP1
REF
1.15
1.10
1.05
1.00
0.95
0.90
0.85
1.15
1.10
1.05
1.00
0.95
0.90
0.85
−40 −20
0
25
50
75
100 125
−40 −20
0
25
50
75
100 125
Temperature (°C)
Temperature (°C)
ꢆ 11. ꢙꢚꢀ⁰ꢀἡ 1 ⛾ꢁႆŔꢃ
ߋ
ꢆ 12. ꢉꢀꢁꢔ⛾ꢁႆŔꢃ
ߋ
Transconductance of gm amp (G )
FB Open Loop Protection (V
)
m
FB_OLP
1.15
1.10
1.05
1.00
0.95
0.90
0.85
1.15
1.10
1.05
1.00
0.95
0.90
0.85
−40 −20
0
25
50
75
100 125
−40 −20
0
25
50
75
100 125
Temperature (°C)
Temperature (°C)
ꢆ 13. gm ꢒꢈᢸො⛾ꢁႆŔꢃ
ߋ
ꢆ 14. FB ꢂᢿƽᒄꢀꢁ⛾ꢁႆŔꢃ
ߋ
Overload Protection (V
)
Over−Voltage Protection (V
)
OLP
OVP
1.15
1.10
1.05
1.00
0.95
0.90
0.85
1.15
1.10
1.05
1.00
0.95
0.90
0.85
−40 −20
0
25
50
75
100 125
−40 −20
0
25
50
75
100 125
Temperature (°C)
Temperature (°C)
ꢆ 15. ᪗ᩍƽᒄ⛾ꢁႆŔꢃ
ߋ
ꢆ 16. ᪗ꢁƽᒄ⛾ꢁႆŔꢃ
ߋ
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7
FSL306LR
ꢞ்ᛄ
؏҈ꢟ▨ꢁԃꢁꢈ
ᖇЖᩣϚꢀի，✄ៀꢄ᮸ঔꢃ，ūୢꢞঃlᥡ
ٱ
٬
ᡖij
ٱ
。 ؏҈，▨իԃի
ࡈ
Ŕͥ᮸▨իꢀἡ⁰ (I )ꢀᖰ CH
Żͥ᮸ȯਾꢀἡ (I
)，ၖ
ױ
ꢍᖅꢎ V ꢀჵꢏŔ CC
START
Drain
6,7
᮸ꢀ
ࡈ
(C )ꢀ̥ꢀ，ୢᐠЊ。ࣞ
17ꢀᚵͥ᮸▨իꢀἡ A
Green−
⁰⛰DŽnş்⒖ᇡ，DŽꢎꢀV Аꢀ10 V。ԃᇡ᪠ጜ
CC
OSC
VOUT
mode
VBIAS
᪗ӛꢆ，ᵄͥ᮸▨իԃի
ࡈ
(HV ) ꢐ V ৄᓡ 10 V Controller
Transconductance
Amplifier
4
REG
CC
VFB
IPK
Ŕꢀի，ၖꢂᐠᣩͥ᮸ꢀᢿᖰŻ࿅ļꢀἡ (I )。
ࣀ
OP
3R
PWM
LEB
ᵄ，FSL306LRꢀៀꢄ᮸ȯਾꢀᢿ。᮸ȯի▨n
10 V ៖，෦ё✈ᚵ▨իꢂ
ࡈ
。 Gate
driver
VREF
D2
D1
R
VCOMP
RSENSE
VDC.link
Drain
6, 7
5
CC1
RC1
CC2
VCC
ICH
3
10 V HVREG
ꢆ 19. ꢣᛓЖ(PWM) ꢀᢿ
ISTART (during start−up)
ᢸොଇ
ࡈ
(gm ଇࡈ
) Iop (during steady−state operation)
CA
ᢸොଇ
ࡈ
ŔᩣϚϦЋױ
ꢀV ჵꢏ⛺ꢍᖅŔጵɟ
COMP
VBIAS
UVLO
ꢀᢿᖰŻ⁰ꢀἡၖᖅ∬ꢀἡꢀ(ꢟ
ࣞ
ꢀ20)。᪗⛾ ꢀꢇֿŔꢀիꢠጜᶴꢡ，ᵄጵɟꢀV ჵꢏꢀ
R
SENSE
COMP
իᖇЖȐრ͓ՀՊᶴ。֭ჵꢏꢀիꢈ᪗ꢀ2.5 V Ŕͥ
᮸֢ꢢꢀիꢀ(V ) ៖，ᢸොଇ
ࡈ
෦®ጵɟꢀᢿᖅ ꢆ 17. ؏҈ꢟHVREG ᰁꢠ
REF
ꢡัꢈᰁꢠ
∬ꢀἡ，V
ᒩĮ，ՀՊᶴί෯。ꢣҝእΕဘई
ᩣͅꢀիᖰ▨ᩣϚᩍℝĮ៖ֱ⛿。ꢂfꢤᅷᣠœ
COMP
ᔏꢑ
ࡈ
⍡╧ईͥ᮸ᚎൺ，FSL306LRꢀ͗ᣩꢒᤚ⍡╧ Ể҈ѿ்。რ͓⍡╧ŔỂ҈෦்ꢓϦईᶴ EMI Ἣꢔ
ᚎ૧ἫᅷŔဆඝᣔඝŔ⍡╧ꢕ
ࣔ
ͥ，ࣀ
்૿ί EMI。EMIꢀℝĮꢓDŽᖅ⛾⍡╧ָӶꢕ
ࣔ
Lj͓。⍡╧ָ Ӷꢕ
ࣔ
ईͥ᮸ࣚ
ൺ；⌖，⍡╧ꢕࣔ
Ŕꢖᓉꢂ᮸֭
ꢀի٬ͥ
᮸ꢊ↠ᔏꢑࡈ
͑
ꢒᤚΓൺ。ꢒᤚꢖᓉŔ რ͓⍡╧෦ꢀEMI
ࡊ
ૐᣩᜨऐϦईრ͓⍡╧ꢗꢘ，ၖ ̡ꢙş✈͗ᣩᏰᤌᜨƚŔꢀዿ
ࡈ
，⛽᠏ἡᩣͅꢀ ⁰Ể
ࡈ
，᥅ꢚ͈◣ EMI ꢛḢ。 ᩣ
ϚꢀիᖇЖ٬
ꢀAC ҈ᇡ，ლꢥᲗ✈֬ᥡ⊙Եꢦ⊙ጵ ɟꢧব。C 、R
٬
ꢀC Ŕ͘५ȜϦЋꢂꢀ220 nF、 C1
C1
C2
220 kW
٬
330 pF。 Sinking current 12 mA
at 2.55 V
I
(A)
EA
+24 mA
−24 mA
IDS
Sourcing current 12 mA
several
mseconds
at 2.45 V
t
= 1/f
SW
SW
tSW
G
m
(mmho)
480 mmho
240 mmho
t
Dt
fSW
MAX
t
+ 1/2D f
SW
SW
V
2.4 V
V
2.6 V
V
FB
FB
REF
(2.5 V)
MAX
t
− 1/2D f
SW
SW
no repetition
several
miliseconds
ꢆ 20. gm ꢒꢈŔꢄ
Β℠ἡ
t
ꢂnᲗ✈ꢀἡᰁჯᖇЖ，
ࣀ
ᵄ᪗ PWMꢀᶴꢡࡈ
Ŕ ֭LjᩣͅꢇЖfἡট SENSEFETꢀŔ໐Ȝꢀἡ，ୢ
ࣞ
19 ᐠЊ。ȧᚎ 50 mA Ŕ⁰ꢀἡ
ἡটͥ᮸ꢀꢜ (3R + R = 46 kW)，Ϲlᥡ
ٱ
D2ꢀŔꢨᥡꢀիॶꢂ ꢆ 18. ⍡╧Ể҈Ểꢢ
ꢉᖇЖ
Თ✈ꢀἡᰁჯᖇЖ，෦ᢸොଇ
ࡈ
✈n֭ᖇЖ， ୢ
ࣞ
ꢀ19ꢀᐠЊ。ဘईꢀV ჵꢏ⛺ş✈ꢇꢄϦիꢀꢜ 2.4 V。ꢂn V
ꢀꢈ᪗ 2.4 Vꢀ៖ D1ꢀַꢜ，ᐠÅ D2
Ŕ ᣠ ଇ ꢨ ᥡ ꢀ ի ෦
٭
ĭ ई ᵄ ꢀ ի Ȝ 。 ࣀ
ᵄ ， COMP
FB
᥅᪠ἫᩣϚꢀի。ᖈꢝईꢀV
ჵꢏ⛺ꢍᖅ᮸ጵɟ
ꢀᢿ，®ᖇЖᩣϚꢀի。ͥਾᢸොଇ
ࡈ
Åގ
̾ COMP
SENSEFET Ŕꢀἡ໐Ȝ෦ַАꢇЖ。
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8
FSL306LR
VCC
ЭẟὨⅠ (LEB)
ईͥ᮸ SENSEFETꢀොŔɼ，֭↠ჯၴ✈ꢆϽॷ
ֿꢀ٬ᴁॷֿἡ
lᥡٱ
Ŕ֭ױ
ቂ૭，ℝիၴ✈Ŕ ঽἡlᥡ
ٱ
֭ױ
ቂ૭Å֪͖ൣඤ⛿ꢀဘúොꢩ▨ HVREG
VSTART
VSTOP
20 ms
IDS
40 ms 650 ms
Normal
with SS
SS 40 ms 650 ms
ꢀἡ໐᪗ SENSEFET。ዿἫꢀꢜ (R
)ꢀꢇֿŔ
SENSE
᪗ଇꢀիúොꢩꢀἡᰁჯᖇЖꢆϚ▐⛽ᵃ̾Ŕ֭᪠
ጜ⒖Ε。ꢂfᒕὨꢣҝᜨၴ，FSL306LRꢀᲗ✈fЭẟ
ὨⅠ (LEB)ꢀꢀᢿ (ꢟ
ࣞ
19)。SENSEFETꢀො
，ᵄꢀ ᢿ෦ईʽ៖ͥᑱЖ PWM ᶴꢡ
ࡈ
(t )。
LEB
Power on
Over loading
Over loading Over loading
Stops
Over loading
Stops
ƽᒄꢀᢿ
ƽᒄѿ்ӥᓌ᪗ᩍƽᒄ (OLP)、᪗իƽᒄ (OVP)、
ᴀիῑൺ (UVLO)、֭რ▏ƽᒄ (FB_OLP)、ტဘ᪗
ἡƽᒄ (AOCP)ꢀÅ֪⋍͓ឍ (TSD)。ᐠᣩꢣ{ƽᒄѿ
்ꢪईꢊ҈ꢋ؏ᰁჯ⛻࿅ļ。ꢂnꢣ{ƽᒄꢀᢿꢪ൬
͈ꢀᏰई ICꢀꢆ，ៀꢄÛĵ᮸̣ꢃ，
ࣀ
ᵄ்૿ई⛽ ҀᏰᤌ٬
PCBꢀՊŔእΕ⛻ᖰ▨
ꢫሇ。ୢϚ▐ ᜥⅬእΕ，რ͓෦ঘᵂ，✄ SENSEFETꢀƽᓡ͓ឍ。
៖ꢬú↠Ἓͥ᮸ƽᒄᙱ៖ᖇЖ，ÅƟℝĮꢊꢋ؏᪗ӛ
ꢆ
ៀ⁰٬ᣩ⁰
̣ꢃ⛺Ŕѿ૧٬ၴѻ
。ͥ᮸ƽᒄᙱ៖ᖇ ꢆ 22. ᪗ᩍƽᒄ(OLP) Ểꢢ
ტဘ᪗ἡƽᒄ (AOCP)
ᩣϚֿई▨ᩣͅꢀիꢃ⛻ʽᢿ៖，ᶴꢆꢁΒꢇἡ
▨ϚᅨૺŔ⃯ᥡꢀἡ໐Ȝ
ἡট SENSEFET，ࣀ
ꢂො ៖⛾ FSL306LRꢀŔᣠʽො៖Lj
。ईꢣҝტ ဘእΕ⛻，OLPꢀɖ෴?⛽ꢚÅƽᒄ FSL306LR，
ࣀ
ꢂ ⛰DŽАꢱֱ OLPꢀ+Э，SENSEFETꢀַАfꢈꢋŔꢀ
ἡၴѻ。FSL306LRꢀӥ
؋
ͥ᮸ტဘ᪗ἡƽᒄ (AOCP) ꢀᢿ，ୢ
ࣞ
23ꢀᐠЊ。t ꢀ+
，R )ꢀꢠጜᶴꢡ，ୢ R
ꢀꢇֿŔꢀի
SENSE
LEB
Ж↠Ἓ៖，V ꢀ෦᪗ͥ᮸▨իԃի
ࡈ
ꢂꢂ 10 V， CC
DŽАঘᵂრ͓。ꢣҝͥ᮸ƽᒄᙱ៖ᖇЖú⛰DŽᓡঽА
෦⛾ AOCPꢀꢀၓ (V
ꢀꢇ
SENSE
AOCP
ֿŔꢀիଇn AOCPꢀꢀၓ，෦ई
ࢻ
ᴁრ͓
ꢂ⛰ꢄͥ ᮸ 2ꢀĭᙱᝐ
ࡈ
ꢱֱᚎൺǁח
，®͓ឍ SMPS，ୢ ࣞ
24ꢀᐠЊꢀꢣҝ LEBꢀ៖்૿ᑱЖꢂЭẟ໐ොꢩŔ ꢉꢱֱ。
ꢋ؏៖ (650 ms)ꢀণ。ᙱᝐА 650 msꢀ៖，෦ё✈
ͥ᮸▨իԃի
ࡈ
ၖℝĮ V 。V ꢀА UVLOꢀȼᵂꢀ CC
CC
ի V
(7 V)ꢀ៖，෦૭ĭƽᒄѿ்，ͥ᮸▨իꢀἡ
STOP
⁰ͭᴁ᪗⃯ᥡჵꢏ
ױ
V ꢀꢀࡈ
̥ꢀ。ᄳ V А CC
CC
UVLOꢀ؏҈ꢀի V
(8 V)ꢀ៖，FSL306LRꢀቂ૭ᵃ
ဘᚭļ。᪗ꢣҝយჯ，ꢊꢋ؏ѿ்
Åᣟş்٬
START
OSC
AOCP
ё✈ѿ╧ SENSEFET Ŕრ͓，DŽАὨꢭᜥⅬ⒖Ε。
S Q
3R
PWM
᪗ᩍƽᒄ (OLP)
Gate
driver
Q
R
LEB
᪗ᩍൺ)ꢂᩍꢀἡ
ࣀ
ዯkꢃꢈ᪗ᚎൺȜ。ꢣ ҝእΕ⛻，ၴᚵ↠Ἓƽᒄꢀᢿ，®ƽᒄ SMPS。⌖
，Փş SMPSꢀᵃဘ࿅ļ，OLPꢀꢀᢿ?úईᩍɼ
ָӶ؏҈ꢠͅş்⒖ᇡ。ꢂfꢮ̭Ϛ▐ꢣҝ⛽
ᆥꢛŔ࿅ļ⒖Ε，ͥ᮸
ࣚ
ൺზꢯ (40 ms)ꢀꢀᢿ෦̾ൺ ꢣ᠏ɼᇡእΕꢬ᠏ǯᵃŔ᪗ᩍእΕ (ꢟ
ࣞ
21)。ꢀἡᰁ ჯ֭ᢿᅤúꢇЖᣠଇꢀ⁰ᩣϚꢀἡ，⛰ំᩣϚֿѿ
R
R
LEB
SENSE
2−bit
AOCP
counter
V
AOCP
ꢆ 23. AOCP ꢀᢿ
૧ꢈϚᵄᣠଇȜ，ᩣϚꢀի (V )ꢀ෦ℝꢎ͖ꢰൺꢀիÅ
O
⛻。ꢣᨗúℝĮ֭ჵꢏꢀի，®ᖰ▨ͥ᮸ᢸො
Vcc
ଇ
ࡈ
ŔᩣϚꢀἡ。ᣠঘ V А 3 Vꢀ៖，෦↠Ἓͥ᮸
ࣚ
ൺ OLPꢀზꢯ (40 ms)。ईᵄ ზꢯ+
，რ͓ᚭļ෦ঘᵂ，ୢࣞ
22 ᐠЊ。 ꢀꢒ+ᖰ▨。V
ꢀ
COMP
COMP
HV
V
REG
START
V
STOP
Ids
650 ms
650 ms
Normal
with SS
4 switchings
OSC
OLP
S Q
3R
PWM
Gate
driver
LEB
Q
R
R
Output Short
SS &
4 switchings
Output Short
disappear
VCOMP
RSENSE
5
40 ms
delay
OLP
ꢆ 24. AOCP Ểꢢ
VOLP
⋍͓ឍ (TSD)
SENSEFET
٬ᖇЖ
IC ꢀᏰई
⛰ꢲꢆយƟf᪠Ἣ SENSEFETꢀŔꢁႆ。ণꢁꢈ᪗ 135 Cꢀ៖，෦↠Ἓ⋍͓
ឍ。ꢁႆℝꢎ 60 C ៖，෦ꢋ؏ FSL306LR。
ꢆ 21. ᪗ᩍƽᒄꢊ᮸ꢀᢿ
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9
FSL306LR
1.25 ms
᪗իƽᒄ (OVP)
ୢᣩÛĵ֭▏ᢿঔꢃ
ࣀ
ꢂ⋪ᖅꢳꢴϚ▐ᜥ Ⅼ，V ꢀ෦Å
Ĝn᪗ᩍእΕŔយჯᛠԧ，®ො ILIM
COMP
ꢩᄚЖ
ױ
SMPSꢀᖰŻᣠଇꢀἡ，DŽАꢱֱ OLP。ꢣҝ እΕ⛻，ꢂn
ױ
ᩣϚֿᖰŻf᪗ଇ்ꢓ，ई OLPꢀ↠Ἓ +Э，ᩣϚꢀի
்ฑꢈϚfꢰൺꢀի。ꢂꢵᵂϚ▐ ꢣҝ▐ꢶ，Თ✈f᪗իƽᒄ (OVP)ꢀꢀᢿ。⛰ꢷꢸ，
Soft−start envelope
0.2ILIM
᪗ V ꢀơᖇᩣϚꢀի，ᄳ V ꢀꢈ᪗ 24.5 Vꢀ៖， CC
CC
Drain Current
8−Steps
෦ꢱֱ OVP，ꢠොꢩრ͓ᚭļঘᵂ。ꢂꢮ̭ईᵃဘ
t
࿅ļ↠Ἓ OVP，V ꢀၴᚵᚎᙱꢂĮn 24.5 V
CC
(ꢟ
ࣞ
25)。 ꢆ 27. ꢊ᮸ᨿ؏҈
OSC
OVP
Ցꢤᰁꢀ᪠ጜ
ꢂᣠଇӛႆऐℝĮᅥᤚᰁჯ⛻Ŕѿ૧，FSL306LR
úꢠͅՑֱᰁჯ。ꢒȐᩍℝĮ，comp ꢀի (V
S Q
3R
PWM
Gate
driver
)
COMP
ꢀÅ⛻
LEB
Q
R
R
?úℝĮୢᐠЊ
ࣞ
28，֭ꢀիℝꢎ V BURL
៖，
ࡈ
ꢃꢊ҈ꢠͅᴧ᪠ጜᰁჯ。ᵄ៖，რ͓ᚭļ෦ ȼᵂ，ᩣϚꢀիრℝĮ，ℝĮŔꢾ╧ֶΓnᅥᤚꢀ
VCC
RSENSE
2
OVP
ἡ ᩍ 。 ꢣ ú ො ꢩV
ꢀ ԧ ▨ 。 ⛰ ំ ᵄ Ȝ ꢈ ᪗
ꢀꢒՓℝĮ，ꢋ૭⛺
comp
VOVP
comp
V
，რ͓ᚭļ෦ቂ૭。V
BURH
ꢿ᪗ӛ。ᴧ᪠ጜᰁჯúᣟş்
٬ё✈
SENSEFET Ŕრ͓ᚭļ，ၖℝĮᅥᤚᰁჯ⛻Ŕრ͓ᔿ૧。
ꢆ 25. ᪗ꢁƽᒄꢀᢿ
֭რ▏ƽᒄ (FB_OLP)
Ϛ▐֭▏ᢿᜥⅬ៖，ค͖᠏֭ჵꢏŔʽᢿĮֿ
ꢀꢜ，⛽¥ V ꢀúÅ
Ĝn᪗ᩍእΕŔយჯԧ V
O
set
V
O
COMP
▨，V ꢀ?რℝꢎ ICꢀᖅऐꢀၓ。ฝ
ٱ
OLPꢀ٬
OVP FB
?்ईꢣҝእΕ⛻ƽᒄ SMPS，Ħ FB_OLPꢀ
Åᣔૺ ऐℝĮ SENSEFETꢀ⛺Ŕၴѻ。ୢẁᣩ FB_OLP，ई
OLPꢀ OVPꢀꢱֱ+Э，ᩣϚꢀիฑ࿒টꢹꢹ▨nꢰ
V
COMP
V
BURH
ൺꢀի。V ꢀℝꢎ 0.5 VꢀÅ⛻៖，෦↠Ἓ FB_OLP，
FB
V
BURL
®ঘᵂრ͓ᚭļ。ꢂꢮ̭ई؏҈Ϛ▐⛽ᆥꢛŔ
↠Ἓ▐ꢶ，ईᨿ؏҈ᵄѿ்únё✈⒖ᇡ。
I
DS
OSC
FB_OLP
S
R
Q
Q
3R
PWM
VOUT
Gate
driver
LEB
R
RH
V
DS
VFB
RSENSE
4
FB_OLP
RL
VFB_OLP
time
Switching
disabled
Switching
disabled
ꢆ 26. ꢉꢂ▏ƽᒄꢀᢿ
t1
t2 t3
t4
ᨿ؏҈
ꢆ 28. ᴧᰁꢀ᪠ጜ
ͥ᮸ᨿ؏҈ꢀᢿ؏҈
，úꢺፂᖰ▨ SENSEFETꢀꢀ ἡ。͘५ᨿ؏҈៖ꢂ 10 ms，ୢ
ࣞ
27ꢀᐠЊ，؏҈᪗ ӛꢆ̡ꢙ SENSEFETꢀꢀἡꢆꢻ。ᩣͅѿ╧რ͓
ࡈ
ꢃŔꢁඝꢆҀ，®ლ֛ꢌ
ר
ָիࡈ
、ꢀዿࡈ
٬
ꢀ
ࡈ
Ŕᵃ̾࿅ļꢃ。ᩣϚꢀࡈ
⛺Ŕꢀիꢆ Ҁ，®ꢼꢃऐლ֛ᐠꢄŔᩣϚꢀի。ᨿ؏҈?ᣩ҉
nꢵᵂָի
ࡈ
ꢽ٬
，ၖℝĮᴁॷlᥡٱ
⛺Ŕၴѻ。 ൂᰁꢀ᪠ጜ
ꢒȐᩣϚᩍꢃί，რ͓ᔿ૧úָꢂᣠଇŔѿ
╧ᔿ૧
ࣀ
߰。FSL306LRꢀЉ✈ V ꢀჵꢏꢀիơᖇᩣ Ϛᩍꢃ。ꢒȐᩣϚᩍί෯，V
COMP
ꢀ?úℝĮ，
ꢀ⛻
COMP
რ͓⍡╧?ꢆ⛻ℝ，ୢ
ࣞ
29ꢀᐠЊ。⛰ំ V COMP
ℝꢎ 0.8 V，ꢠͅՑֱᰁჯЭრ͓⍡╧úई 21 kHzꢀ
٬
23 kHzꢀ+ָӶ。ईՑֱᰁჯ⛻，ꢒᤚ⍡╧Ể҈ꢉ⌖
സई。
www.onsemi.cn
10
FSL306LR
Random Frequency
modulation range
Switching frequency
53 kHz
͘५ SENSEFETꢀ໐Ȝꢇἡꢂ 0.45 A。᪗ई I
ꢀჵ
LIMIT
ꢏ
٬ᖅऐ⊙
+ᖲͅ R ，
෦ꢇἡꢂꢂ 0.3 A。ᨙ X
ᕎÅ⛻ؙჯ
ꢋ٧
R ŔȜ： X
47 kHz
0.45 A : 0.3 A + (46 kW ) Rx) : Rx
(eq. 1)
Transconductance
4
V
FB
Amplifier
23 kHz
21 kHz
V
BIAS
V
REF
I
PK
1.9 V
VCOMP
VBURL VBURH 0.8 V
PWM
3R
V
5
3
ꢆ 29. ൂᰁꢀ᪠ጜ
COMP
R
ᛓ℠ἡ
I
LIMIT
V
SENSE
ୢ
ࣞ
30ꢀᐠЊ，PWMꢀᶴꢡࡈ
Ŕ֭Ljჵꢏ⛺ꢍᖅf⛰ ꢄঔ
ר
ჯ 46 kWꢀͥ᮸ꢀꢜ (3R + R)。ᄳͥ᮸lᥡٱ
ꢂ R
X
50ĂmAꢀŔꢊꢀἡ⁰ȯਾ៖，I
ꢀჵꢏ⛺Ŕ Rxꢀ᮸ꢀ
LIMIT
ꢜᅂᏰf⛾ 46 kWꢀၖꣀŔꢀꢜ。ūୢ，FSL306LRꢀŔ
ꢆ 30. ℠ἡᛓ
www.onsemi.cn
11
FSL306LR
ꢜꢝꢅ✈ꢀᢿ
ꢅ✈
ᩣꢥꢀꢁ
⍭ꢌᩣꢦ
12 V (150 mA)
5 V (50 mA)
⍭ꢌꢞ╧
85~300 VAC
2.05 W
҉ꢌꢇ
ꢌꢇ
Ო⊙ᚎᙱᛄ
• ꢂfൾ▐ിଢ଼Ŕ EMIꢀሇ்，ᚎਾf෯ꢰൺꢀἡꢀዿ
ࡈ
(L1 & L2)、SMDꢀ५ꢀꢜࡈ
(R1)ꢀ٬
⛰ꢄꢰŔἡἡ lᥡ
ٱ
(D2)。 • ᮸ȯիꢀᢿ、SMD ५ꢀꢜ
ࡈ
(R2) ٬෯
ǁח
lᥡٱ
(D5) ்૿ίͥ᮸▨իꢂࡈ
Ŕѿ૧。 D5
1N4148
SOD32−F
R2
10 W
0805
VCC
U1
FSL306LR
C9
R3
330 pF
0805
20 kW
0805
C8
5.Vcomp
4.VFB
12 V
Output
220 nF
0805
C5
2.2 mF
0805
3.ILIMIT
R4
D4
ES1J
SMA
D1
VCC
R5
220 W
2.VCC
5.1 kW
0805
L3
680 mH
S1M
SMA
6.Drain
7.Drain
F1
L1
470 mH
10 W/1 W
0805
1.GND
U2
KA78L05AI
C6
1 mF
0805
C7
10 nF
0805
R1
5 V
Output
D3
ES1J
SMA
AC
3.3 kW
0805
C3
100 mF/25 V
D2
S1M
SMA
C1
L2
C2
6.8 mF
400 V
C4
47 mF
25 V
4.7 mF 470 mH
400 V
ꢆ 31. ꢧ◦ꢆ
ጸ 1. ᤰῥꢖ
᮸ꢛ
ᝐꢓ
ꢨỈ
᮸ꢛ
ᝐꢓ
ꢨỈ
ƽℹꢩ
ꢪᥡ
ٱ
F1
10 W
1 W, Fusible Resistor
D1
D1
D2
S1M
S1M
S1M
1 A / 1000 V, ✈ἡ
ࡈ
onsemi
ꢀℋ
R1
R2
R3
R4
R5
3.3 kW
10 W
SMD 0805, 5%
SMD 0805, 5%
SMD 0805, 1%
SMD 0805, 1%
SMD 0805, 5%
1 A / 1000 V, ✈ἡ
ࡈ
onsemi
D3
D4
D5
ES1J
ES1J
20 kW
5.1 kW
220 kW
1 A / 600 V ꣎૭ἡ
ࡈ
onsemi
1 A / 600 V ꣎૭ἡ
ࡈ
onsemi
ꢀꢫ
C1
C2
C3
C4
C5
C6
C7
C8
C9
4.7 mF / 400 V
6.8 mF / 400 V
100 mF / 25 V
47 mF / 25 V
2.2 mF
ꢌ꣏ꢌ
ࡈ
ꢌ꣏ꢌ
ࡈ
ꢌ꣏ꢌ
ࡈ
ꢌ꣏ꢌ
ࡈ
SMD 0805
SMD 0805
SMD 0805
SMD 0805
SMD 0805
1N4148
▨ꢌොlꢈ
ٱ
onsemi
ꢀꢬ
L1
L2
L3
470 mH
470 mH
680 mH
SYNTON
SYNTON
1 mF
PKS−0807−681K
3L Electronic
10 nF
220 nF
330 pF
U1
U2
FSL306LRN /
FSL306LRL
onsemi
KA78L05AIMTF
0.1 A / 5 V ꢍիᛓ
ࡈ
onsemi
www.onsemi.cn
12
FSL306LR
ᙲꢭꢮ
ꢜꢝᩣꢦꢞ╧ (Ỉꢛ 8)
85 V ೃ 265 V & ꢂᦖꢀ(Ỉꢛ 9)
AC
AC
†
ℝꢁꢅ✈ (꣐ 10)
ꢉ↠ꢀꢅ✈
ꢈꢛꢝꢎ
FSL306LRN
FSL306LRLX
ꢙꢚণꢁ
PKG
7−DIP
ꢯ᎕យẵ
℠ἡ
R
DS(ON),MAX
−40°C~125°C
0.45 A
184 W
3 W
7 W
꣑
7−LSOP
꣒ꢂꢡ
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
8. ণꢏ
℠ꢂᣠଇꢎϚѿ╧。 9. 50°C aꢘꢙꢏႆ៖ꢬ꣓ꢴꢇꢆᣠଇൾ꣔ᓡ꣕ѿ╧。
10. ꣖n15 V ꢆꢎϚꢌիÖ。ꢎϚꢌի
Å℠ꢂᣠଇꢎϚѿ╧。 SENSEFET is registered trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States
and/or other countries.
www.onsemi.cn
13
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
PDIP−7 (PDIP−8 LESS PIN 6)
CASE 626A
ISSUE C
DATE 22 APR 2015
SCALE 1:1
NOTES:
D
A
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
E
3. DIMENSIONS A, A1 AND L ARE MEASURED WITH THE PACK-
AGE SEATED IN JEDEC SEATING PLANE GAUGE GS−3.
4. DIMENSIONS D, D1 AND E1 DO NOT INCLUDE MOLD FLASH
OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS ARE
NOT TO EXCEED 0.10 INCH.
5. DIMENSION E IS MEASURED AT A POINT 0.015 BELOW DATUM
PLANE H WITH THE LEADS CONSTRAINED PERPENDICULAR
TO DATUM C.
H
8
5
4
E1
1
6. DIMENSION eB IS MEASURED AT THE LEAD TIPS WITH THE
LEADS UNCONSTRAINED.
7. DATUM PLANE H IS COINCIDENT WITH THE BOTTOM OF THE
LEADS, WHERE THE LEADS EXIT THE BODY.
8. PACKAGE CONTOUR IS OPTIONAL (ROUNDED OR SQUARE
CORNERS).
NOTE 8
c
b2
B
END VIEW
WITH LEADS CONSTRAINED
NOTE 5
TOP VIEW
INCHES
DIM MIN MAX
−−−−
A1 0.015
MILLIMETERS
A2
A
MIN
−−−
0.38
2.92
0.35
MAX
5.33
−−−
4.95
0.56
e/2
A
0.210
−−−−
NOTE 3
A2 0.115 0.195
L
b
b2
C
0.014 0.022
0.060 TYP
0.008 0.014
1.52 TYP
0.20
9.02
0.13
7.62
6.10
0.36
10.16
−−−
8.26
7.11
D
0.355 0.400
SEATING
PLANE
D1 0.005
0.300 0.325
E1 0.240 0.280
−−−−
A1
D1
E
C
M
e
eB
L
0.100 BSC
−−−− 0.430
0.115 0.150
−−−− 10°
2.54 BSC
−−−
2.92
−−−
10.92
3.81
10°
e
eB
8X
b
END VIEW
M
NOTE 6
M
M
M
0.010
C A
B
SIDE VIEW
GENERIC
MARKING DIAGRAM*
XXXXXXXXX
AWL
YYWWG
XXXX = Specific Device Code
A
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
WL
YY
WW
G
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON11774D
PDIP−7 (PDIP−8 LESS PIN 6)
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
PDIP7 MINUS PIN 6 GW
CASE 707AA
ISSUE O
DATE 31 JAN 2017
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13755G
PDIP7 MINUS PIN 6 GW
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
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A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
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