FSUSB45L10X [ONSEMI]
高速USB2.0 (480Mbps)开关，带专用充电器端口检测;
| 型号： | FSUSB45L10X |
| 厂家： | 
ONSEMI |
| 描述： | 高速USB2.0 (480Mbps)开关，带专用充电器端口检测 开关 |
| 文件： | 总12页 (文件大小：1057K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right
to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON
Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON
Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA
Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended
or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out
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is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
July 2013
FSUSB45 — High-Speed USB2.0 (480Mbps) Switch
with Dedicated Charger Port Detect
Features
Description
The FSUSB45 is a bi-directional, low-power, two-port,
High-Speed, USB2.0 switch. Configured as a double-
pole, double-throw (DPDT) switch, it is optimized for
switching between two HS (480 Mbps) sources or an
HS source and a Full-Speed (12 Mbps) source.
.
.
.
Low On Capacitance: 7.0 pF Typical
Low On Resistance: 3.9 Ω Typical
Low Power Consumption: 1 μA Maximum
- 15 μA Maximum ICCT over an Expanded Voltage
The FSUSB45 is compatible with the requirements of
USB2.0 and features an extremely low on capacitance
(CON) of 7.0 pF. The wide bandwidth of this device
(720 MHz) exceeds the bandwidth needed to pass the
third harmonic, resulting in signals with minimum edge
and phase distortion. Superior channel-to-channel
crosstalk also minimizes interference.
Range (VIN=1.8 V, VCC=4.3 V)
.
.
Wide -3 db Bandwidth: > 720 MHz
Packaged in:
- 10-Lead MicroPak™ (1.6 x 2.1 mm)
- 10-Lead UMLP (1.4 x 1.8 mm)
.
.
8 kV ESD Rating, >16 kV Power/GND ESD Rating
Power-Off Protection on All Ports When VCC=0 V
- D+/D- Pins Tolerate up to 5.25 V
The FSUSB45 contains special circuitry on the switch
I/O pins for applications where the VCC supply is
powered-off (VCC=0), which allows the device to
withstand an over-voltage condition. This device is
designed to minimize current consumption even when
the control voltage applied to the SEL pin is lower than
the supply voltage (VCC). This feature is especially
valuable to mobile applications, such as cell phones,
allowing for direct interface with the general-purpose
I/Os of the baseband processor. An additional feature is
the detection of the 1,1 state on D+/D- to signal an
interrupt (INT) to the processor when entering a
dedicated charging port mode of operation.
Applications
.
.
Cell Phone, PDA, Digital Camera, and Notebook
LCD Monitor, TV, and Set-Top Box
IMPORTANT NOTE:
For additional performance information, please contact
analogswitch@fairchildsemi.com.
INT
HSD1+
D+
HSD2+
HSD1-
D-
HSD2-
Sel
Figure 1. Analog Symbol
Ordering Information
Operating
Part Number Top Mark
Package
Temperature Range
FSUSB45L10X
FSUSB45UMX
JA
JB
-40 to +85°C
10-Lead, MicroPak™ 1.6 x 2.1 mm, JEDEC MO-255B
10-Lead, Quad, Ultrathin Molded Leadless Package
(UMLP), 1.4 x 1.8 mm
-40 to +85°C
MicroPak™ is a trademark of Fairchild Semiconductor Corporation.
© 2007 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSUSB45 • Rev. 1.0.7
Pin Assignments
Vcc
10
HSD1+
1
1
HSD2+
2
Sel
INT
9
8
HSD1-
Sel
HSD1+
2
3
4
D+
GND
D-
3
4
5
10
9
Vcc
INT
HSD2-
D-
7
6
HSD2+
D+
8
6
7
5
HSD2- HSD1-
GND
Figure 2. Pad Assignments for MicroPak
(Top Through View)
Figure 3. Pin Assignments for UMLP
(Top Through View)
Pin Definitions
MicroPak™ Pin #
UMLP Pin #
Name
Description
9
8
10
INT
Sel
Interrupt Signaling Output Pin
Switch Select
1
4, 6
3, 5
D+, D-
USB Data Bus
2, 3, 7, 8
5
1, 2, 6, 7
4
HSDn+, HSDn-
GND
Multiplexed Source Inputs
Ground
Truth Table
Sel
Switch Connection
INT Output
L
D+, D-=HSD1+, HSD1-
D+, D-=HSD2+, HSD2-
LOW
H
HIGH
© 2007 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSUSB45 • Rev. 1.0.7
2
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameter
Min.
Max.
+5.5
VCC
Unit
VCC
VCNTRL
VSW
Supply Voltage
-0.5
-0.5
-0.50
-50
V
V
DC Input Voltage (S)(1)
DC Switch I/O Voltage(1)
DC Input Diode Current
DC Output Current
5.25
V
IIK
mA
mA
°C
IOUT
50
+150
7
TSTG
Storage Temperature
-65
All Pins
Human Body Model, JEDEC: JESD22-A114 I/O to GND
Power to GND
8
ESD
kV
16
2
Charged Device Model, JEDEC: JESD22-C101
Note:
1. The input and output negative ratings may be exceeded if the input and output diode current ratings are observed.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
Parameter
Min.
Max.
Unit
VCC
Supply Voltage
3.0
0
4.3
VCC
VCC
85
V
V
(2)
VCNTRL
Control Input Voltage (Sel)
Switch I/O Voltage
VSW
TA
-0.5
-40
V
Operating Temperature
°C
Note:
2. The control input must be held HIGH or LOW; it must not float.
© 2007 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSUSB45 • Rev. 1.0.7
3
DC Electrical Characteristics
All typical value are at 25°C, VCC=3.3 V unless otherwise specified.
TA=- 40ºC to +85ºC
Min. Typ. Max.
Symbol
Parameter
Conditions
IIN=-18 mA
VCC (V)
Units
VIK
VIH
Clamp Diode Voltage
Input Voltage High
3.0
3.0 to 3.6
4.3
-1.2
V
V
V
V
V
1.3
1.7
3.0 to 3.6
4.3
0.5
0.7
VIL
Input Voltage Low
3.0 to 3.6
4.3
2.4
VOH
Output Voltage High
IOH=-2 mA
V
2.4
3.0 to 3.6
4.3
0.25
0.25
VOL
IIN
Output Voltage Low
IOL=2 mA
V
Control Input Leakage
VSW=0 to VCC
4.3
-1
-2
1
µA
HSD1n or HSD2n=0 V,
3.6 V or floating,
D+/-=0 or 3.6 V
INC(OFF),
INO(OFF)
Off State Leakage
ON State Leakage
4.3
4.3
2
µA
µA
HSD1n or HSD2n=0 V,
3.6 V or floating,
D+/-=0 or 3.6 V
IDn(ON)
-2
-2
2
Power-Off Leakage Current VSW=0 V to 4.3 V, VCC=0 V,
(All I/O Ports)
IOFF
RON
0
2
µA
Figure 5
VSW=0.4 V, ION=-8 mA,
Figure 4
HS Switch On Resistance(3)
3.0
3.9
6.5
(4)
∆RON
HS Delta RON
VSW=0.4 V, ION=-8 mA
VCNTRL=0 or VCC, IOUT=0
VCNTRL=2.6 V, VCC=4.3 V
VCNTRL=1.8 V, VCC=4.3 V
3.0
4.3
4.3
4.3
0.65
ICC
Quiescent Supply Current
1.0
µA
µA
µA
10.0
20.0
Increase in ICC Current per
Control Voltage and VCC
ICCT
Notes:
3. Measured by the voltage drop between HSDn and Dn pins at the indicated current through the switch.
On resistance is determined by the lower of the voltage on the two (HSDn or Dn ports).
4. Guaranteed by characterization.
© 2007 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSUSB45 • Rev. 1.0.7
4
AC Electrical Characteristics
All typical value are for VCC=3.3 V at 25°C unless otherwise specified.
TA=- 40 to +85°C
Min. Typ. Max.
Symbol
Parameter
Conditions
VCC (V)
Units
RL=50 Ω, CL=5 pF, VSW=0.8 V,
Figure 6, Figure 7
tON
tOFF
tPD
Turn-On Time, S to Output
Turn-Off Time, S to Output
Propagation Delay(5)
3.0 to 3.6
3.0 to 3.6
3.3
13
12
30
25
ns
ns
ns
ns
RL=50 Ω, CL=5 pF, VSW=0.8V,
Figure 6, Figure 7
CL=5 pF, RL=50 Ω, Figure 6,
Figure 8
0.25
RL=50 Ω, CL=5 pF,
VSW1=VSW2=0.8 V, Figure 12
tBBM
Break-Before-Make
3.0 to 3.6
2.0
6.5
10
tPLH/HL INT Propagation Delay(5)
RL=50 Ω, CL=5 pF
3.0 to 3.6
3.0 to 3.6
ns
OIRR
Off Isolation
RL=50 Ω, f=24 0MHz, Figure 14
-30
-45
dB
Non-Adjacent Channel
Crosstalk
Xtalk
RL=50 Ω, f=240 MHz, Figure 15
3.0 to 3.6
3.0 to 3.6
dB
RL=50 Ω, CL=0 pF, Figure 13
RL=50 Ω, CL=5 pF, Figure 13
720
550
MHz
MHz
BW
-3 db Bandwidth
Note:
5. Guaranteed by characterization.
USB Hi-Speed-Related AC Electrical Characteristics
TA=- 40 to +85°C
Symbol
Parameter
Conditions
VCC (V)
3.0 to 3.6
3.0 to 3.6
Units
ps
Min. Typ. Max.
Skew of Opposite Transitions of CL=5 pF, RL=50 Ω,
tSK(P)
20
the Same Output(6)
Figure 9
RL=50 Ω, CL=5 pF,
tJ
Total Jitter(6)
tR=tF=500 ps (10-90%) at
200
ps
480 Mbps (PRBS=215 – 1)
Note:
6. Guaranteed by characterization.
Capacitance
TA=- 40 to +85°C
Symbol
Parameter
Conditions
Units
Min. Typ. Max.
CIN
COUT
CON
Control Pin Input Capacitance
INT Pin Output Capacitance
D+/D- On Capacitance
VCC=0
VCC=0
1.5
2.5
pF
pF
pF
pF
VCC=3.3 V, f=1 MHz, Figure 11
VCC=3.3 V, Figure 10
7.0
2.0
7.9
COFF
D1n, D2n Off Capacitance
© 2007 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSUSB45 • Rev. 1.0.7
5
Test Diagrams
VON
HSD1n
HSD2n
D+, D-
HSD
n
A
Dn
V
VSW
SW
ION
Sel
0 or VCC
GND
Select
GND
V
Sel= 0 orVcc
R
ON = VON / ION
Figure 4. On Resistance
Figure 5. Off/On Leakage
tRISE= 2.5ns tFALL = 2.5ns
HSD
n
Dn
C
V
SW
V
CC
VOUT
90%
CC /2
90%
CC /2
R
R
GND
L
L
S
Input– V/OE, V
Sel
V
V
GND
10%
10%
90%
GND
V
V
Sel
OH
90%
GND
Output- V
OUT
RL , RS, and CL are functions of the application
environment (see AC Tables for specific values)
CL includes test fixture and stray capacitance.
VOL
tON
tOFF
Figure 6. AC Test Circuit Load
Figure 7. Turn-On / Turn-Off Waveforms
tRISE= 500ps
tFALL = 500ps
+400mV
-400mV
90%
0V
90%
10%
10%
Output
tPHL
tPLH
Figure 8. Propagation Delay (tRtF – 500ps)
Figure 9. Intra-Pair Skew Test tSK(P)
HSD
n
HSD
Capacitance
Meter
n
S
S
V
Capacitance
Meter
V
= 0 or V
cc
Sel
= 0 or V
cc
Sel
HSD
HSD
n
n
Figure 10. Channel Off Capacitance
Figure 11. Channel On Capacitance
© 2007 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSUSB45 • Rev. 1.0.7
6
Test Diagrams (Continued)
tRISE= 2.5ns
Vcc
Input - VSel
HSD
n
90%
Vcc/2
Dn
C
V
SW1
10%
0V
VOUT
GND
V
L
R
SW2
L
VOUT
GND
0.9*Vout
GND
0.9*Vout
R
S
tBBM
V
Sel
RL , RS, and CL are functions of the application
environment (see AC Tables for specific values)
CL includes test fixture and stray capacitance.
GND
Figure 12. Break-Before-Make Interval Timing
Network Analyzer
RS
VIN
V
GND
S
GND
VOUT
V
Sel
GND
GND
RT
GND
RS and RT are functions of the application
environment (see AC Tables for specific values).
Figure 13. Bandwidth
Network Analyzer
R
S
V
IN
V
S
GND
R
T
GND
V
GND
Sel
V
OUT
GND
GND
R
T
RS and RT are functions of the application
environment (see AC Tables for specific values).
GND
Off isolation = 20 Log (VOUT / VIN)
Figure 14. Channel Off Isolation
Network Analyzer
NC
R
S
V
IN
V
GND
S
GND
V
Sel
GND
R
T
GND
V
OUT
GND
R
T
RS and RT are functions of the application environment
(see AC Tables for specific values).
GND
Crosstalk = 20 Log (VOUT / VIN)
Figure 15. Non-Adjacent Channel-to-Channel Crosstalk
© 2007 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSUSB45 • Rev. 1.0.7
7
Physical Dimensions
0.10 C
2.10
A
2X
1.62
B
KEEPOUT ZONE, NO TRACES
OR VIAS ALLOWED
(0.11)
0.56
1.12
1.60
PIN1 IDENT IS
2X LONGER THAN
OTHER LINES
0.10 C
10X
(0.35)
(0.25)
2X
10X
0.50
TOP VIEW
RECOMMENDED LAND PATTERN
0.55 MAX
0.05 C
0.05 C
0.05
0.00
(0.20)
C
0.35
0.25
SIDE VIEW
(0.15)
D
DETAIL A
(0.36)
0.35
0.25
0.65
0.55
0.35
0.25
DETAIL A 2X SCALE
1
4
0.56
NOTES:
10
5
A. PACKAGE CONFORMS TO JEDEC
REGISTRATION MO-255, VARIATION UABD .
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 1994.
D. PRESENCE OF CENTER PAD IS PACKAGE
SUPPLIER DEPENDENT. IF PRESENT IT
IS NOT INTENDED TO BE SOLDERED AND
HAS A BLACK OXIDE FINISH.
(0.29)
0.35
6
9
9X
0.25
0.50
0.25
0.15
9X
1.62
0.10
0.05
C
C
A B
ALL FEATURES
E. DRAWING FILENAME: MKT-MAC10Arev5.
BOTTOM VIEW
Figure 16. 10-Lead MicroPak™
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/dwg/MA/MAC10A.pdf.
© 2007 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSUSB45 • Rev. 1.0.7
8
Physical Dimensions
0.10 C
1.40
A
B
2X
(9X)
0.563
1.70
0.663
1.80
1
PIN#1 IDENT
2.10
0.10 C
0.40
TOP VIEW
0.55 MAX.
2X
0.225
(10X)
RECOMMENDED
LAND PATTERN
(0.15)
0.10 C
0.08 C
9X
0.45
1.45
SEATING
PLANE
0.55
0.40
C
0.05
0.00
SIDE VIEW
1.85
0.35
(9X)
0.45
0.225
(10X)
3
OPTIONAL MINIMIAL
TOE LAND PATTERN
0.40
6
DETAIL A
1
NOTES:
PIN#1 IDENT
A. PACKAGE DOES NOT CONFORM TO
ANY JEDEC STANDARD.
B. DIMENSIONS ARE IN MILLIMETERS.
0.15
0.25
10
(10X)
0.10 C A B
0.05 C
BOTTOM VIEW
C. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 1994.
D. LAND PATTERN RECOMMENDATION IS
BASED ON FSC DESIGN ONLY.
0.55
0.45
E. DRAWING FILENAME: MKT-UMLP10Arev5.
F. FAIRCHILD SEMICONDUCTOR.
PACKAGE
EDGE
45°
LEAD
OPTION 2
LEAD
OPTION 1
0.25
0.15
DETAIL A
SCALE : 2X
SCALE : 2X
SCALE : 2X
Figure 17. 10-Lead Ultrathin Molded Leadless Package (UMLP)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/dwg/UM/UMLP10A.pdf.
© 2007 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSUSB45 • Rev. 1.0.7
9
© 2007 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSUSB45 • Rev. 1.0.7
10
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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