MJD148-2T4 [ONSEMI]
TRANSISTOR 4 A, 45 V, NPN, Si, POWER TRANSISTOR, CASE 369A-13, DPAK-3, BIP General Purpose Power;型号: | MJD148-2T4 |
厂家: | ONSEMI |
描述: | TRANSISTOR 4 A, 45 V, NPN, Si, POWER TRANSISTOR, CASE 369A-13, DPAK-3, BIP General Purpose Power 开关 晶体管 |
文件: | 总5页 (文件大小:97K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
MJD148, NJVMJD148T4G
NPN Silicon Power
Transistor
DPAK for Surface Mount Applications
Designed for general purpose amplifier and low speed switching
applications.
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Features
POWER TRANSISTOR
4.0 AMPERES
45 VOLTS, 20 WATTS
• High Gain
• Low Saturation Voltage
• High Current Gain − Bandwidth Product
• Epoxy Meets UL 94 V−0 @ 0.125 in
• NJV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable
COLLECTOR
2, 4
1
BASE
• These Devices are Pb−Free and are RoHS Compliant
3
MAXIMUM RATINGS
EMITTER
Rating
Collector−Emitter Voltage
Collector−Base Voltage
Emitter−Base Voltage
Collector Current − Continuous
Collector Current − Peak
Base Current
Symbol
Value
45
Unit
Vdc
Vdc
Vdc
Adc
Adc
mAdc
4
V
CEO
V
CB
45
1
2
3
V
EB
5.0
4.0
7.0
50
DPAK
I
C
CASE 369C
STYLE 1
I
CM
I
B
MARKING DIAGRAM
Total Power Dissipation
P
D
D
@ T = 25°C
20
0.16
W
W/°C
C
Derate above 25°C
AYWW
J148G
Total Power Dissipation (Note 1)
P
@ T = 25°C
1.75
0.014
W
W/°C
A
Derate above 25°C
Operating and Storage Junction
Temperature Range
T , T
−55 to +150
°C
J
stg
A
Y
WW
= Assembly Location
= Year
= Work Week
ESD − Human Body Model
ESD − Machine Model
HBM
MM
3B
C
V
V
J148 = Device Code
G
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. These ratings are applicable when surface mounted on the minimum pad
sizes recommended.
= Pb−Free Package
ORDERING INFORMATION
†
Device
Package
Shipping
MJD148T4G
DPAK
2,500/Tape & Reel
(Pb−Free)
NJVMJD148T4G
DPAK
2,500/Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2013
1
Publication Order Number:
August, 2013 − Rev. 8
MJD148/D
MJD148, NJVMJD148T4G
THERMAL CHARACTERISTICS
Characteristic
Thermal Resistance, Junction−to−Case
Thermal Resistance, Junction−to−Ambient (Note 2)
Symbol
Max
6.25
71.4
Unit
°C/W
°C/W
R
q
JC
JA
R
q
2. These ratings are applicable when surface mounted on the minimum pad sizes recommended.
ELECTRICAL CHARACTERISTICS (T = 25°C, unless otherwise noted)
C
Characteristic
Symbol
Min
Max
Unit
OFF CHARACTERISTICS
Collector−Emitter Sustaining Voltage (Note 3)
V
Vdc
mAdc
mAdc
CEO(sus)
(I = 100 mAdc, I = 0)
45
−
−
20
1
C
B
Collector Cutoff Current
(V = 45 Vdc, I = 0)
I
CBO
CB
E
Emitter Cutoff Current
(V = 5 Vdc, I = 0)
I
EBO
−
BE
C
ON CHARACTERISTICS (Note 3)
DC Current Gain
h
FE
−
(I = 10 mAdc, V = 5 Vdc)
40
85
50
30
−
375
−
C
CE
(I = 0.5 Adc, V = 1 Vdc)
C
CE
(I = 2 Adc, V = 1 Vdc)
C
CE
(I = 3 Adc, V = 1 Vdc)
−
C
CE
Collector−Emitter Saturation Voltage
(I = 2 Adc, I = 0.2 Adc)
V
Vdc
Vdc
CE(sat)
−
−
0.5
1.1
C
B
Base−Emitter On Voltage
(I = 2 Adc, V = 1 Vdc)
V
BE(on)
C
CE
DYNAMIC CHARACTERISTICS
Current−Gain−Bandwidth Product
f
T
MHz
(I = 250 mAdc, V = 1 Vdc, f = 1 MHz)
3
−
C
CE
3. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%.
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2
MJD148, NJVMJD148T4G
TYPICAL CHARACTERISTICS
10
T = 150°C
J
V
CE
V
CE
= 2 V
= 10 V
5
3
2
1
= 25°C
−55°C
0.5
0.3
0.2
0.1
0.004
0.007 0.01
0.02 0.03
0.05
0.1
0.2
0.3
0.5
1
2
3
4
I , COLLECTOR CURRENT (A)
C
Figure 1. DC Current Gain
2
1.6
1.2
0.8
0.4
0
T = 25°C
J
I
= 10 mA
100 mA
1 A
3 A
C
0.05 0.07 0.1
0.2 0.3
0.5 0.7
1
2
3
5
7
10
20
30
50 70 100
200 300 500
I , BASE CURRENT (mA)
B
Figure 2. Collector Saturation Region
2
1.6
1.2
0.8
0.4
0
+2.5
+2
*APPLIES FOR I /I ≤ h /2
*T = −65°C to +150°C
J
C
B
FE
T = 25°C
J
+1.5
+1
+0.5
*q for V
V
CE(sat)
0
−0.5
−1
V
@ I /I = 10
BE(sat)
C
B
V
@ V = 2 V
CE
BE
−1.5
−2
q
for V
BE
V
V
@ I /I = 10
C B
CE(sat)
−2.5
0.005 0.01 0.020.030.05 0.1 0.20.3 0.5
1
2
3 4
0.005 0.01 0.020.030.05 0.1 0.20.3 0.5
1
2
3 4
I , COLLECTOR CURRENT (A)
C
I , COLLECTOR CURRENT (A)
C
Figure 3. “On” Voltages
Figure 4. Temperature Coefficients
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3
MJD148, NJVMJD148T4G
3
2
10
V
CE
= 30 V
10
T = 150°C
J
1
10
10
0
100°C
REVERSE
FORWARD
−1
10
10
−2
25°C
I
CES
−3
10
−0.4 −0.3 −0.2 −0.1
0
+0.1 +0.2 +0.3 +0.4 +0.5 +0.6
V
BE
, BASE−EMITTER VOLTAGE (V)
Figure 5. Collector Cut−Off Region
1
0.7
0.5
D = 0.5
0.2
0.3
0.2
P
(pk)
Z
q
= r(t) R
qJC
0.1
JC(t)
R
= 6.25°C/W MAX
qJC
0.05
0.01
SINGLE PULSE
0.1
0.07
0.05
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t
t
1
t
2
1
T
J(pk)
− T = P
Z
(t)
C
(pk) qJC
DUTY CYCLE, D = t /t
1 2
0.03
0.02
0.01
0.01 0.02
0.05
0.1
0.2
0.5
1
2
5
10
20
50
100
200
500
1 k
t, TIME (ms)
Figure 6. Thermal Response
10
Forward Bias Safe Operating Area Information
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
5
3
2
500 ms
dc
breakdown. Safe operating area curves indicate I − V
C
CE
1
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
5 ms
0.5
1 ms
0.3
0.2
The data of Figure 7 is based on T
= 150°C; T is
J(pk)
C
BONDING WIRE LIMIT
THERMAL LIMIT
SECOND BREAKDOWN LIMIT
0.1
variable depending on conditions. Second breakdown pulse
limits are valid for duty cycles to 10% provided T
J(pk)
0.05
0.03
0.02
≤ 150°C. T
may be calculated from the data in Figure 6.
J(pk)
T
= 25°C SINGLE PULSE, D ≤ 0.1%
C
At high case temperatures, thermal limitations will reduce
the power that can be handled to values less than the
limitations imposed by second breakdown.
T = 150°C
J
0.01
1
2
3
5
7
10
20 30
50 70
V
, COLLECTOR−EMITTER VOLTAGE (V)
CE
Figure 7. Maximum Rated Forward Bias
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4
MJD148, NJVMJD148T4G
PACKAGE DIMENSIONS
DPAK (SINGLE GAUGE)
CASE 369C
ISSUE D
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI-
MENSIONS b3, L3 and Z.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.006 INCHES PER SIDE.
5. DIMENSIONS D AND E ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY.
6. DATUMS A AND B ARE DETERMINED AT DATUM
PLANE H.
C
A
D
A
E
c2
b3
B
4
2
L3
L4
Z
H
DETAIL A
1
3
INCHES
DIM MIN MAX
0.086 0.094
A1 0.000 0.005
0.025 0.035
MILLIMETERS
MIN
2.18
0.00
0.63
0.76
4.57
0.46
0.46
5.97
6.35
MAX
2.38
0.13
0.89
1.14
5.46
0.61
0.61
6.22
6.73
A
b2
c
b
b
b2 0.030 0.045
b3 0.180 0.215
M
0.005 (0.13)
C
H
e
c
0.018 0.024
c2 0.018 0.024
GAUGE
SEATING
PLANE
L2
PLANE
C
D
E
e
0.235 0.245
0.250 0.265
0.090 BSC
2.29 BSC
9.40 10.41
1.40 1.78
2.74 REF
0.51 BSC
0.89 1.27
H
L
L1
L2
0.370 0.410
0.055 0.070
0.108 REF
L
A1
L1
0.020 BSC
DETAIL A
ROTATED 905 CW
L3 0.035 0.050
L4
Z
−−− 0.040
0.155 −−−
−−−
3.93
1.01
−−−
SOLDERING FOOTPRINT*
STYLE 1:
PIN 1. BASE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
6.20
3.0
0.244
0.118
2.58
0.101
5.80
1.6
0.063
6.172
0.243
0.228
mm
inches
ǒ
Ǔ
SCALE 3:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
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MJD148/D
相关型号:
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