MJD148T4G [ONSEMI]
NPN Silicon Power Transistor; NPN硅功率晶体管
| 型号： | MJD148T4G |
| 厂家： | 
ONSEMI |
| 描述： | NPN Silicon Power Transistor |
| 文件： | 总5页 (文件大小：110K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MJD148
NPN Silicon Power
Transistor
DPAK For Surface Mount Applications
Designed for general purpose amplifier and low speed switching
applications.
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Features
POWER TRANSISTOR
4.0 AMPERES
45 VOLTS, 20 WATTS
• High Gain − 50 Min @ I = 2.0 A
C
• Low Saturation Voltage − 0.5 V @ I = 2.0 A
C
• High Current Gain − Bandwidth Product − f = 3.0 MHz Min @
T
I = 250 mAdc
C
MARKING
• Epoxy Meets UL 94 V−0 @ 0.125 in
• ESD Ratings: Human Body Model, 3B; >8000 V
Machine Model, C; >400 V
• This is a Pb−Free Package
DIAGRAM
4
DPAK
CASE 369C
STYLE 1
AYWW
J148G
2
1
3
A
Y
= Assembly Location
= Year
MAXIMUM RATINGS
Rating
Collector−Emitter Voltage
Collector−Base Voltage
Emitter−Base Voltage
Symbol
Value
45
Unit
Vdc
Vdc
Vdc
Adc
WW
= Work Week
J148 = Device Code
= Pb−Free Package
V
CEO
G
V
45
CB
EB
V
5.0
ORDERING INFORMATION
Collector Current − Continuous
− Peak
I
C
4.0
7.0
†
Device
Package
Shipping
Base Current
I
50
mAdc
B
MJD148T4
DPAK
2500/Tape & Reel
2500/Tape & Reel
Total Power Dissipation @ T = 25°C
P
20
0.16
W
W/°C
C
D
MJD148T4G
DPAK
(Pb−Free)
Derate above 25°C
Total Power Dissipation (Note 1)
P
D
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
@ T = 25°C
1.75
W
A
Derate above 25°C
0.014
W/°C
Operating and Storage Junction
Temperature Range
T , T
J
−55 to +150
°C
stg
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
6.25
71.4
Unit
°C/W
°C/W
Thermal Resistance, Junction−to−Case
R
q
JC
Thermal Resistance, Junction−to−Ambient
R
q
JA
(Note 1)
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. These ratings are applicable when surface mounted on the minimum pad
sizes recommended.
© Semiconductor Components Industries, LLC, 2011
1
Publication Order Number:
January, 2011 − Rev. 5
MJD148/D
MJD148
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
C
Characteristic
OFF CHARACTERISTICS
Test Conditions
Symbol
Min
Max
Unit
Collector−Emitter Sustaining Voltage (Note 2)
I
= 100 mAdc, I = 0
V
CEO(sus)
45
−
−
20
1
Vdc
mAdc
mAdc
C
B
Collector Cutoff Current
V
V
= 45 Vdc, I = 0
I
CBO
CB
E
Emitter Cutoff Current
= 5 Vdc, I = 0
I
−
BE
C
EBO
ON CHARACTERISTICS
DC Current Gain (Note 2)
I
C
I
C
I
C
I
C
= 10 mAdc, V = 5 Vdc
h
FE
40
85
50
30
−
375
−
−
CE
= 0.5 Adc, V = 1 Vdc
CE
= 2 Adc, V = 1 Vdc
CE
= 3 Adc, V = 1 Vdc
−
CE
Collector−Emitter Saturation Voltage (Note 2)
I
C
I
C
= 2 Adc, I = 0.2 Adc
V
CE(sat)
−
−
0.5
1.1
Vdc
Vdc
B
Base−Emitter On Voltage (Note 2)
= 2 Adc, V = 1 Vdc
V
BE(on)
CE
DYNAMIC CHARACTERISTICS
Current−Gain−Bandwidth Product
I
C
= 250 mAdc, V = 1 Vdc, f = 1 MHz
f
T
3
−
MHz
CE
2. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%.
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2
MJD148
TYPICAL CHARACTERISTICS
10
T = 150°C
J
V
CE
V
CE
= 2 V
= 10 V
5
3
2
1
= 25°C
−55°C
0.5
0.3
0.2
0.1
0.004
0.007 0.01
0.02 0.03
0.05
0.1
0.2
0.3
0.5
1
2
3
4
I , COLLECTOR CURRENT (A)
C
Figure 1. DC Current Gain
2
1.6
1.2
0.8
0.4
0
T = 25°C
J
I
= 10 mA
100 mA
1 A
3 A
C
0.05 0.07 0.1
0.2 0.3
0.5 0.7
1
2
3
5
7
10
20
30
50 70 100
200 300 500
I , BASE CURRENT (mA)
B
Figure 2. Collector Saturation Region
2
1.6
1.2
0.8
0.4
0
+2.5
+2
*APPLIES FOR I /I ≤ h /2
*T = −65°C to +150°C
J
C
B
FE
T = 25°C
J
+1.5
+1
+0.5
*q for V
V
CE(sat)
0
−0.5
−1
V
@ I /I = 10
BE(sat)
C
B
V
@ V = 2 V
CE
BE
−1.5
−2
q
for V
BE
V
V
@ I /I = 10
C B
CE(sat)
−2.5
0.005 0.01 0.020.030.05 0.1 0.20.3 0.5
1
2
3 4
0.005 0.01 0.020.030.05 0.1 0.20.3 0.5
1
2
3 4
I , COLLECTOR CURRENT (A)
C
I , COLLECTOR CURRENT (A)
C
Figure 3. “On” Voltages
Figure 4. Temperature Coefficients
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3
MJD148
3
2
10
V
CE
= 30 V
10
T = 150°C
J
1
10
10
0
100°C
REVERSE
FORWARD
−1
10
10
−2
25°C
I
CES
−3
10
−0.4 −0.3 −0.2 −0.1
0
+0.1 +0.2 +0.3 +0.4 +0.5 +0.6
V
BE
, BASE−EMITTER VOLTAGE (V)
Figure 5. Collector Cut−Off Region
1
0.7
0.5
D = 0.5
0.2
0.3
0.2
P
(pk)
Z
q
= r(t) R
qJC
0.1
JC(t)
R
= 6.25°C/W MAX
qJC
0.05
0.01
SINGLE PULSE
0.1
0.07
0.05
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t
t
1
t
1
2
T
J(pk)
− T = P
Z
(t)
C
(pk) qJC
DUTY CYCLE, D = t /t
1 2
0.03
0.02
0.01
0.01 0.02
0.05
0.1
0.2
0.5
1
2
5
10
20
50
100
200
500
1 k
t, TIME (ms)
Figure 6. Thermal Response
10
FORWARD BIAS SAFE OPERATING AREA
INFORMATION
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate I − V
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
5
500 ms
3
dc
2
1
C
CE
5 ms
0.5
0.3
0.2
1 ms
BONDING WIRE LIMIT
THERMAL LIMIT
The data of Figure 7 is based on T
= 150°C; T
0.1
J(pk)
C
is variable depending on conditions. Second breakdown
pulse limits are valid for duty cycles to 10% provided T
0.05
0.03
0.02
SECOND BREAKDOWN LIMIT
= 25°C SINGLE PULSE, D ≤ 0.1%
J(pk)
T
C
v 150°C. T
may be calculated from the data in
T = 150°C
J
J(pk)
Figure 6. At high case temperatures, thermal limitations will
reduce the power that can be handled to values less than the
limitations imposed by second breakdown.
0.01
1
2
3
5
7
10
20 30
50 70
V
, COLLECTOR−EMITTER VOLTAGE (V)
CE
Figure 7. Maximum Rated Forward Bias
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4
MJD148
PACKAGE DIMENSIONS
DPAK (SINGLE GAUGE)
CASE 369C−01
ISSUE D
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI-
MENSIONS b3, L3 and Z.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.006 INCHES PER SIDE.
5. DIMENSIONS D AND E ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY.
6. DATUMS A AND B ARE DETERMINED AT DATUM
PLANE H.
C
A
D
A
E
c2
b3
B
4
2
L3
L4
Z
H
DETAIL A
1
3
INCHES
DIM MIN MAX
0.086 0.094
A1 0.000 0.005
0.025 0.035
MILLIMETERS
MIN
2.18
0.00
0.63
0.76
4.57
0.46
0.46
5.97
6.35
MAX
2.38
0.13
0.89
1.14
5.46
0.61
0.61
6.22
6.73
A
b2
c
b
b
b2 0.030 0.045
b3 0.180 0.215
M
0.005 (0.13)
C
H
e
c
0.018 0.024
c2 0.018 0.024
GAUGE
SEATING
L2
PLANE
C
D
E
e
0.235 0.245
0.250 0.265
0.090 BSC
PLANE
2.29 BSC
9.40 10.41
1.40 1.78
2.74 REF
0.51 BSC
0.89 1.27
H
L
L1
L2
0.370 0.410
0.055 0.070
0.108 REF
L
A1
L1
0.020 BSC
DETAIL A
L3 0.035 0.050
ROTATED 905 CW
L4
Z
−−− 0.040
0.155 −−−
−−−
3.93
1.01
−−−
SOLDERING FOOTPRINT*
STYLE 1:
PIN 1. BASE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
6.20
3.0
0.244
0.118
2.58
0.101
5.80
1.6
0.063
6.172
0.243
0.228
mm
inches
ǒ
Ǔ
SCALE 3:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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MJD148/D
相关型号：
MJD200I
Power Bipolar Transistor, 5A I(C), 25V V(BR)CEO, 1-Element, NPN, Silicon, Plastic/Epoxy, 3 Pin, IPAK-3
FAIRCHILD
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