NL27WZ125/D [ONSEMI]

Dual Buffer with 3-State Outputs ; 双缓冲器,具有三态输出\n
NL27WZ125/D
型号: NL27WZ125/D
厂家: ONSEMI    ONSEMI
描述:

Dual Buffer with 3-State Outputs
双缓冲器,具有三态输出\n

文件: 总8页 (文件大小:93K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
NL27WZ125  
Dual Buffer with 3-State  
Outputs  
The NL27WZ125 is a high performance dual noninverting buffer  
operating from a 1.65 V to 5.5 V supply.  
Extremely High Speed: t 2.6 ns (typical) at V = 5 V  
PD  
CC  
http://onsemi.com  
Designed for 1.65 V to 5.5 V V Operation  
CC  
Over Voltage Tolerant Inputs and Outputs  
MARKING  
DIAGRAM  
LVTTL Compatible – Interface Capability With 5 V TTL Logic with  
= 3 V  
V
CC  
8
LVCMOS Compatible  
8
24 mA Balanced Output Sink and Source Capability  
D
1
M0  
Near Zero Static Supply Current Substantially Reduces System  
Power Requirements  
US8  
US SUFFIX  
CASE 493–01  
3–State OE Input is Active–Low  
Replacement for NC7WZ125  
Chip Complexity = 72 FETs  
1
D = Date Code  
ORDERING INFORMATION  
8
7
6
OE  
A
V
CC  
1
2
1
See detailed ordering and shipping information in the package  
dimensions section on page 5 of this data sheet.  
OE  
1
2
Y
1
Y
2
3
4
A
1
1
Y
Y
1
OE  
EN  
1
5
A
2
GND  
A
2
2
OE  
2
Figure 1. Pinout (Top View)  
Figure 2. Logic Symbol  
FUNCTION TABLE  
PIN ASSIGNMENT  
Pin  
Function  
1
OE  
Input  
Output  
1
2
3
4
5
6
7
8
A
Y
OE  
L
A
Y
n
1
2
n
n
L
L
GND  
L
H
X
H
Z
A
2
Y
1
H
X = Don’t Care  
n = 1, 2  
OE  
2
V
CC  
Semiconductor Components Industries, LLC, 2002  
1
Publication Order Number:  
July, 2002 – Rev. 3  
NL27WZ125/D  
NL27WZ125  
MAXIMUM RATINGS  
Symbol  
Parameter  
Value  
Unit  
V
V
V
V
DC Supply Voltage  
DC Input Voltage  
DC Output Voltage  
*0.5 to )7.0  
*0.5 to )7.0  
CC  
I
V
V
O
Output in High Impedance State  
Output in HIGH or LOW State  
*0.5 to )7.0  
–0.5 to V + 0.5  
CC  
I
I
I
I
I
DC Input Diode Current  
V < GND  
*50  
mA  
mA  
mA  
mA  
mA  
°C  
IK  
I
DC Output Diode Current  
V
< GND  
O
*50  
OK  
O
DC Output Sink Current  
$50  
DC Supply Current per Supply Pin  
DC Ground Current per Ground Pin  
Storage Temperature Range  
$100  
CC  
GND  
$100  
T
T
T
*65 to )150  
STG  
Lead Temperature, 1 mm from Case for 10 Seconds  
Junction Temperature under Bias  
Thermal Resistance  
260  
°C  
L
)150  
°C  
J
q
(Note 1)  
250  
250  
°C/W  
mW  
JA  
P
Power Dissipation in Still Air at 85°C  
Moisture Sensitivity  
D
MSL  
Level 1  
F
R
Flammability Rating  
Oxygen Index: 28 to 34  
UL 94 V–0 @ 0.125 in  
V
ESD  
ESD Withstand Voltage  
Human Body Model (Note 2)  
Machine Model (Note 3)  
Charged Device Model (Note 4)  
> 2000  
> 200  
N/A  
V
Maximum Ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those  
indicated may adversely affect device reliability. Functional operation under absolute maximum–rated conditions is not implied. Functional  
operation should be restricted to the Recommended Operating Conditions.  
1. Measured with minimum pad spacing on an FR4 board, using 10 mm–by–1 inch, 2–ounce copper trace with no air flow.  
2. Tested to EIA/JESD22–A114–A.  
3. Tested to EIA/JESD22–A115–A.  
4. Tested to JESD22–C101–A.  
RECOMMENDED OPERATING CONDITIONS  
Symbol  
Parameter  
Min  
Max  
Unit  
V
CC  
Supply Voltage  
Operating  
Data Retention Only  
1.65  
1.5  
5.5  
5.5  
V
V
V
Input Voltage  
(Note 5)  
0
0
5.5  
5.5  
V
V
I
Output Voltage  
(HIGH or LOW State)  
O
T
Operating Free–Air Temperature  
Input Transition Rise or Fall Rate  
*40  
)85  
°C  
A
Dt/DV  
V
CC  
V
CC  
V
CC  
= 2.5 V $0.2 V  
= 3.0 V $0.3 V  
= 5.0 V $0.5 V  
0
0
0
20  
10  
5
ns/V  
5. Unused inputs may not be left open. All inputs must be tied to a high– or low–logic input voltage level.  
http://onsemi.com  
2
NL27WZ125  
DC ELECTRICAL CHARACTERISTICS  
*405C v T  
v
A
855C  
T
A
= 255C  
Typ  
V
(V)  
CC  
Min  
Max  
Min  
Max  
Symbol  
Parameter  
Condition  
Unit  
V
V
V
High–Level Input Voltage  
1.65  
2.3 to 5.5  
0.75 V  
0.75 V  
CC  
V
IH  
CC  
0.7 V  
0.7 V  
CC  
CC  
Low–Level Input Voltage  
1.65  
2.3 to 5.5  
0.25 V  
0.3 V  
0.25 V  
0.3 V  
V
V
IL  
CC  
CC  
CC  
CC  
High–Level Output Volt-  
age  
I
I
= 100 mA  
= –3 mA  
= –8 mA  
= –12 mA  
= –16 mA  
= –24 mA  
= –32 mA  
1.65 to 5.5  
1.65  
2.3  
V
– 0.1  
1.29  
V
V
CC  
–0.1  
OH  
OH  
OH  
CC  
CC  
1.52  
2.1  
2.4  
2.7  
2.5  
4.0  
1.29  
1.9  
2.2  
2.4  
2.3  
3.8  
V
IN  
= V or V  
I
1.9  
2.2  
2.4  
2.3  
3.8  
IL  
IH  
OH  
I
2.7  
3.0  
3.0  
4.5  
OH  
I
OH  
I
OH  
I
OH  
V
OL  
Low–Level Output Voltage  
= V  
I
= 100 mA  
= 3 mA  
= 8 mA  
= 12 mA  
= 16 mA  
= 24 mA  
= 32 mA  
1.65 to 5.5  
0.1  
0.24  
0.3  
0.4  
0.4  
0.55  
0.55  
0.1  
0.24  
0.3  
0.4  
0.4  
0.55  
0.55  
V
OL  
V
I
OL  
0.08  
0.20  
0.22  
0.28  
0.38  
0.42  
IN  
IL  
I
OL  
2.3  
2.7  
3.0  
3.0  
4.5  
I
OL  
I
OL  
I
OL  
I
OL  
I
I
Input Leakage Current  
V
= V or GND  
5.5  
0
$0.1  
$1.0  
mA  
mA  
IN  
IN  
CC  
Power Off  
Leakage Current  
V
V
= 5.5 V  
= 5.5 V  
1.0  
10  
OFF  
OUT  
IN  
IN  
IN  
I
I
Quiescent Supply Current  
3–State Output Leakage  
V
V
= V or GND  
5.5  
1.0  
10  
mA  
mA  
CC  
CC  
= V or V  
2.3 to 5.5  
$0.5  
$5  
OZ  
IL  
IH  
0V v V  
v 5.5 V  
OUT  
AC ELECTRICAL CHARACTERISTICS (t = t = 3.0 ns)  
R
F
T
A
= 255C  
*405C v T v 855C  
A
V
(V)  
CC  
Min  
Typ Max  
Min  
Max  
Symbol  
Parameter  
Condition  
R = 1 MW  
Unit  
t
t
Propagation Delay  
AN to YN  
(Figures 3 and 4)  
C = 15 pF 1.8 $ 0.15  
2.0  
1.0  
12  
7.5  
2.0  
1.0  
13  
8
ns  
PLH  
L
L
2.5 $ 0.2  
PHL  
R = 1 MW  
L
C = 15 pF 3.3 $ 0.3  
0.8  
1.2  
0.5  
0.8  
5.2  
5.7  
4.5  
5.0  
1.0  
0.8  
0.8  
1.2  
0.5  
0.8  
5.5  
6.0  
4.8  
5.3  
1.0  
0.8  
L
R = 500 W  
L
C = 50 pF  
L
R = 1 MW  
L
C = 15 pF 5.0 $ 0.5  
L
R = 500 W  
L
C = 50 pF  
L
t
t
Output to Output Skew  
(Note 6)  
R = 500 W  
L
C = 50 pF 3.3 $ 0.3  
ns  
ns  
OSLH  
L
OSHL  
R = 500 W  
L
C = 50 pF 5.0 $ 0.5  
L
t
t
Output Enable Time  
(Figures 5, 6 and 7)  
1.8 $ 0.15  
2.5 $ 0.2  
3.0  
1.8  
14  
8.5  
3.0  
1.8  
15  
9.0  
PZH  
PZL  
3.3 $ 0.3  
5.0 $ 0.5  
1.2  
0.8  
6.2  
5.5  
1.2  
0.8  
6.5  
5.8  
t
t
Output Enable Time  
(Figures 5, 6 and 7)  
1.8 $ 0.15  
2.5 $ 0.2  
2.5  
1.5  
12  
8.0  
2.5  
1.5  
13  
8.5  
ns  
PHZ  
PLZ  
3.3 $ 0.3  
5.0 $ 0.5  
0.8  
0.3  
5.7  
4.7  
0.8  
0.3  
6.0  
5.0  
6. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.  
This specification applies to any outputs switching in the same direction, either HIGH–to–LOW (t  
) or LOW–to–HIGH (t  
); parameter  
OSHL  
OSLH  
guaranteed by design.  
http://onsemi.com  
3
NL27WZ125  
CAPACITIVE CHARACTERISTICS  
Symbol  
Parameter  
Condition  
Typical  
7.0  
Unit  
pF  
C
C
C
Input Capacitance  
Output Capacitance  
V
V
= 5.5 V, V = 0 V or V  
I
IN  
CC  
CC  
CC  
= 5.5 V, V = 0 V or V  
7.0  
pF  
OUT  
PD  
CC  
I
Power Dissipation Capacitance  
(Note 7)  
10 MHz, V = 3.3 V, V = 0 V or V  
18  
27  
pF  
CC  
I
CC  
CC  
10 MHz, V = 5.5 V, V = 0 V or V  
CC  
I
7. C is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.  
PD  
Average operating current can be obtained by the equation: I  
) = C V f + I . C is used to determine the no–load dynamic  
CC(OPR  
PD CC in CC PD  
2
power consumption; P = C V  
f + I V  
.
D
PD  
CC  
in  
CC  
CC  
t = 3 ns  
f
t = 3 ns  
f
OE = GND  
V
CC  
90%  
50%  
90%  
50%  
INPUT  
OUTPUT  
INPUT  
A and B  
10%  
10%  
C *  
L
R
L
GND  
t
t
PHL  
PLH  
V
V
OH  
50%  
50%  
OUTPUT Y  
*Includes all probe and jig capacitance.  
A 1 MHz square input wave is recommended for  
OL  
propagation delay tests.  
Figure 3. Switching Waveform  
Figure 4. TPLH or TPHL  
V
CC  
50%  
50%  
OE  
0 V  
t
t
PHZ  
PZH  
V
CC  
V
– 10%  
OH  
50%  
50%  
On  
0 V  
t
t
PLZ  
PZL  
V  
CC  
On  
V
+ 10%  
OL  
GND  
Figure 5. AC Output Enable and Disable Waveform  
http://onsemi.com  
4
NL27WZ125  
2   V  
CC  
INPUT  
INPUT  
R = 500 W  
1
V
CC  
OUTPUT  
R = 500 W  
OUTPUT  
R = 250 W  
C = 50 pF  
L
C = 50 pF  
L
L
L
A 1 MHz square input wave is recommended for  
propagation delay tests.  
A 1 MHz square input wave is recommended for  
propagation delay tests.  
Figure 6. TPZL or TPL  
Figure 7. TPZH or TPHZ  
DEVICE ORDERING INFORMATION  
Device Nomenclature  
Temp  
Logic  
No. of  
Device Order  
Number  
Device  
Function  
Package Package  
Tape and  
Reel Size  
Circuit  
Gates per  
Range  
Suffix  
Type  
Indicator Package Identifier  
Technology  
NL27WZ125US  
NL  
2
7
WZ  
125  
US  
US8  
178 mm, 3000 Unit  
http://onsemi.com  
5
NL27WZ125  
TAPE TRAILER  
(Connected to Reel Hub)  
NO COMPONENTS  
160 mm MIN  
TAPE LEADER  
NO COMPONENTS  
400 mm MIN  
COMPONENTS  
DIRECTION OF FEED  
CAVITY TOP TAPE  
TAPE  
Figure 8. Tape Ends for Finished Goods  
TAPE DIMENSIONS mm  
4.00  
4.00  
Ğ1.50 TYP  
2.00  
1.75  
3.50 $ 0.25  
+ 0.30  
8.00  
– 0.10  
1
Ğ1.00 ± 0.25 TYP  
DIRECTION OF FEED  
Figure 9. US8 Reel Configuration/Orientation  
http://onsemi.com  
6
NL27WZ125  
t MAX  
13.0 mm $0.2 mm  
(0.512 in $0.008 in)  
1.5 mm MIN  
(0.06 in)  
50 mm MIN  
(1.969 in)  
20.2 mm MIN  
(0.795 in)  
A
FULL RADIUS  
G
Figure 10. Reel Dimensions  
REEL DIMENSIONS  
Tape Size  
T and R Suffix  
A Max  
G
t Max  
8 mm  
US  
178 mm  
(7 in)  
8.4 mm, + 1.5 mm, –0.0  
(0.33 in + 0.059 in, –0.00)  
14.4 mm  
(0.56 in)  
DIRECTION OF FEED  
BARCODE LABEL  
POCKET  
HOLE  
Figure 11. Reel Winding Direction  
http://onsemi.com  
7
NL27WZ125  
PACKAGE DIMENSIONS  
US8  
US SUFFIX  
CASE 493–01  
ISSUE O  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
–X–  
2. CONTROLLING DIMENSION: MILLIMETERS  
3. DIMENSION A" DOES NOT INCLUDE MOLD  
FLASH, PROTRUSION OR GATE BURR. MOLD  
FLASH. PROTRUSION AND GATE BURR SHALL  
NOT EXCEED 0.140 MM (0.0055") PER SIDE.  
4. DIMENSION B" DOES NOT INCLUDE  
INTER-LEAD FLASH OR PROTRUSION.  
INTER-LEAD FLASH AND PROTRUSION SHALL  
NOT E3XCEED 0.140 (0.0055") PER SIDE.  
5. LEAD FINISH IS SOLDER PLATING WITH  
THICKNESS OF 0.0076-0. 0203 MM. (300-800  
mINCH).  
A
J
8
5
–Y–  
DETAIL E  
B
L
6. ALL TOLERANCE UNLESS OTHERWISE  
SPECIFIED ±0.0508 (0.0002").  
1
4
R
S
MILLIMETERS  
INCHES  
MIN  
G
DIM MIN  
MAX  
2.10  
2.40  
0.90  
0.25  
0.35  
MAX  
0.083  
0.094  
0.035  
0.010  
0.014  
P
A
B
C
D
F
1.90  
2.20  
0.60  
0.17  
0.20  
0.075  
0.087  
0.024  
0.007  
0.008  
U
C
G
H
J
0.50 BSC  
0.40 REF  
0.020 BSC  
0.016 REF  
H
–T–  
0.10 (0.004)  
T
K
0.10  
0.18  
0.10  
3.20  
6
0.004  
0.007  
0.004  
0.126  
6
SEATING  
PLANE  
D
N
K
L
0.00  
3.00  
0
0.000  
0.118  
0
M
R 0.10 TYP  
M
0.10 (0.004)  
T
X Y  
M
N
P
R
S
U
V
_
_
_
_
5
10  
5
10  
_
_
_
_
0.28  
0.23  
0.37  
0.60  
0.44  
0.33  
0.47  
0.80  
0.011  
0.009  
0.015  
0.024  
0.017  
0.013  
0.019  
0.031  
V
0.12 BSC  
0.005 BSC  
F
DETAIL E  
3.8  
1.8 TYP  
0.5 TYP  
0.3 TYP  
1.0  
(mm)  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make  
changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any  
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all  
liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or  
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be  
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.  
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death  
may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC  
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees  
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that  
SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.  
PUBLICATION ORDERING INFORMATION  
Literature Fulfillment:  
JAPAN: ON Semiconductor, Japan Customer Focus Center  
4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031  
Phone: 81–3–5740–2700  
Literature Distribution Center for ON Semiconductor  
P.O. Box 5163, Denver, Colorado 80217 USA  
Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada  
Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada  
Email: ONlit@hibbertco.com  
Email: r14525@onsemi.com  
ON Semiconductor Website: http://onsemi.com  
For additional information, please contact your local  
Sales Representative.  
N. American Technical Support: 800–282–9855 Toll Free USA/Canada  
NL27WZ125/D  

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