NTH4L040N65S3F [ONSEMI]
Power MOSFET, N-Channel, SUPERFET® III, FRFET®,650 V, 65 A, 40 mΩ, TO-247 4lead;型号: | NTH4L040N65S3F |
厂家: | ONSEMI |
描述: | Power MOSFET, N-Channel, SUPERFET® III, FRFET®,650 V, 65 A, 40 mΩ, TO-247 4lead |
文件: | 总10页 (文件大小:969K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
MOSFET – Power, N-Channel,
SUPERFET) III, FRFET)
650 V, 65 A, 40 mW
NTH4L040N65S3F
Description
www.onsemi.com
SUPERFET III MOSFET is ON Semiconductor’s brand−new high
voltage super−junction (SJ) MOSFET family that is utilizing charge
balance technology for outstanding low on-resistance and lower gate
charge performance. This advanced technology is tailored to minimize
conduction loss, provide superior switching performance, and
withstand extreme dv/dt rate.
V
R
MAX
I MAX
D
DSS
DS(ON)
650 V
40 mW
65 A
Consequently, SUPERFET III MOSFET is very suitable for the
various power system for miniaturization and higher efficiency.
SUPERFET III FRFET MOSFET’s optimized reverse recovery
performance of body diode can remove additional component and
improve system reliability.
D
G
Features
S1: Driver Source
S2: Power Source
• 700 V @ T = 150°C
J
S1
S2
• Typ. R
= 32 mW
DS(on)
POWER MOSFET
• Ultra Low Gate Charge (Typ. Q = 158 nC)
g
• Low Effective Output Capacitance (Typ. C
= 1366 pF)
oss(eff.)
• 100% Avalanche Tested
• These Devices are Pb−Free and are RoHS Compliant
Applications
D
S2
S1
• Telecom / Server Power Supplies
• Industrial Power Supplies
• EV Charger
G
TO−247−4LD
CASE 340CJ
• UPS / Solar
MARKING DIAGRAM
$Y&Z&3&K
NTH4L040
N65S3F
$Y
&Z
&3
&K
= ON Semiconductor Logo
= Assembly Plant Code
= Data Code (Year & Week)
= Lot
NTH4L040N65S3F = Specific Device Code
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
© Semiconductor Components Industries, LLC, 2018
1
Publication Order Number:
November, 2019 − Rev. 1
NTH4L040N65S3F/D
NTH4L040N65S3F
ABSOLUTE MAXIMUM RATINGS (T = 25°C, Unless otherwise noted)
C
Symbol
Parameter
Value
650
Unit
V
V
DSS
V
GSS
Drain to Source Voltage
Gate to Source Voltage
− DC
30
V
− AC (f > 1 Hz)
30
I
D
Drain Current
− Continuous (T = 25°C)
65
A
C
− Continuous (T = 100°C)
45
C
I
Drain Current
− Pulsed (Note 1)
162.5
1009
9
A
mJ
A
DM
E
Single Pulsed Avalanche Energy (Note 2)
Avalanche Current (Note 2)
Repetitive Avalanche Energy (Note 1)
MOSFET dv/dt
AS
AS
I
E
4.46
100
mJ
V/ns
AR
dv/dt
Peak Diode Recovery dv/dt (Note 3)
Power Dissipation
50
P
(T = 25°C)
446
W
W/°C
°C
D
C
− Derate Above 25°C
3.57
−55 to +150
300
T , T
Operating and Storage Temperature Range
J
STG
T
Maximum Lead Temperature for Soldering, 1/8″ from Case for 5 seconds
°C
L
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Repetitive rating: pulse−width limited by maximum junction temperature.
2. I = 9 A, R = 25 W, starting T = 25°C.
AS
G
J
3. I ≤ 32.5 A, di/dt ≤ 200 A/ms, V ≤ 400 V, starting T = 25°C.
SD
DD
J
THERMAL CHARACTERISTICS
Symbol
Parameter
Value
0.28
40
Unit
R
Thermal Resistance, Junction to Case, Max.
Thermal Resistance, Junction to Ambient, Max.
_C/W
q
JC
JA
R
q
PACKAGE MARKING AND ORDERING INFORMATION
Packing
Method
Part Number
Top Marking
Package
Reel Size
Tape Width
Quantity
NTH4L040N65S3F
NTH4L040N65S3F
TO−247 − 4LD
Tube
N/A
N/A
30 Units
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2
NTH4L040N65S3F
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
C
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
OFF CHARACTERISTICS
BV
Drain to Source Breakdown Voltage
650
700
V
V
V
V
I
= 0 V, I = 1 mA, T = 25_C
DSS
GS
D
J
= 0 V, I = 1 mA, T = 150_C
GS
D
J
DBV
/DT
Breakdown Voltage Temperature
Coefficient
= 15 mA, Referenced to 25_C
0.63
213
V/_C
DSS
J
D
I
Zero Gate Voltage Drain Current
V
DS
V
DS
V
GS
= 650 V, V = 0 V
10
mA
DSS
GS
= 520 V, T = 125_C
C
I
Gate to Body Leakage Current
=
30 V, V = 0 V
100
nA
GSS
DS
ON CHARACTERISTICS
V
Gate Threshold Voltage
V
GS
V
GS
V
DS
= V , I = 2.1 mA
3.0
5.0
40
V
mW
S
GS(th)
DS(on)
DS
D
R
Static Drain to Source On Resistance
Forward Transconductance
= 10 V, I = 32.5 A
32
48
D
g
FS
= 20 V, I = 32.5 A
D
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
= 400 V, V = 0 V, f = 1 MHz
5940
140
1366
247
158
48
pF
pF
pF
pF
nC
nC
nC
W
iss
DS
GS
C
Output Capacitance
oss
C
Effective Output Capacitance
Energy Related Output Capacitance
Total Gate Charge at 10V
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
Equivalent Series Resistance
V
DS
V
DS
V
DS
= 0 V to 400 V, V = 0 V
GS
oss(eff.)
C
= 0 V to 400 V, V = 0 V
GS
oss(er.)
Q
= 400 V, I = 32.5 A, V = 10 V
D GS
g(tot)
(Note 4)
Q
gs
Q
60
gd
ESR
f = 1 MHz
1.1
SWITCHING CHARACTERISTICS
t
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
V
V
= 400 V, I = 32.5 A,
44
23
96
6
ns
ns
ns
ns
d(on)
DD
GS
D
= 10 V, R = 2.2 W
g
t
r
(Note 4)
t
d(off)
t
f
SOURCE-DRAIN DIODE CHARACTERISTICS
I
Maximum Continuous Source to Drain Diode Forward Current
Maximum Pulsed Source to Drain Diode Forward Current
65
162.5
1.3
A
A
V
S
I
SM
V
SD
Source to Drain Diode Forward
Voltage
V
GS
= 0 V, I = 32.5 A
SD
t
Reverse Recovery Time
V
= 400 V, I = 32.5 A,
145
737
ns
rr
DD
F
SD
dI /dt = 100 A/ms
Q
Reverse Recovery Charge
nC
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Essentially independent of operating temperature typical characteristics.
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3
NTH4L040N65S3F
TYPICAL PERFORMANCE CHARACTERISTICS
200
100
300
VGS
=
10.0V
V
= 20 V
DS
8.0V
7.0V
6.5V
6.0V
5.5V
250 ms Pulse Test
100
10
1
150oC
10
25oC
−55oC
*Notes:
1. 250ms Pulse Test
2. TC = 25oC
1
0.2
1
10
20
2
3
4
5
6
7
8
VDS, Drain−Source Voltage[V]
VGS, Gate−Source Voltage[V]
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
0.05
0.04
0.03
0.02
1000
100
10
V
= 0 V
T
C
= 25°C
GS
250 ms Pulse Test
150oC
VGS = 10V
1
25oC
VGS = 20V
0.1
−55oC
0.01
0.001
0
50
100
150
200
0.0
0.5
1.0
1.5
2.0
ID, Drain Current [A]
VSD, Body Diode Forward Voltage [V]
Figure 3. On−Resistance Variation
Figure 4. Body Diode Forward Voltage
vs. Drain Current and Gate Voltage
Variation vs. Source Current and Temperature
10
1000000
100000
10000
1000
100
I
D
= 32.5 A
8
6
4
2
0
Ciss
VDS = 130V
VDS= 400V
Coss
V
= 0 V
GS
10
f = 1 MHz
C
C
C
= C + C (C = shorted)
Crss
iss
gs gd ds
1
= C + C
gd
oss
rss
ds
= C
gd
0.1
0.1
1
10
100
1000
0
40
80
120
160
VDS, Drain−Source Voltage [V]
Qg, Total Gate Charge [nC]
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
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4
NTH4L040N65S3F
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
1.2
1.1
1.0
0.9
0.8
2.5
V
I
= 10 V
= 35 A
V
I
= 0 V
= 15 mA
GS
GS
D
D
2.0
1.5
1.0
0.5
0.0
−50
0
50
100
150
−50
0
50
100
150
TJ, Junction Temperature [oC]
TJ, Junction Temperature [oC]
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On−Resistance Variation
vs. Temperature
80
60
40
20
0
500
100
30ms
100ms
1ms
10ms
DC
10
1
Operation in This Area
is Limited by R
DS(on)
0.1
T
C
= 25°C
T = 150°C
J
Single Pulse
0.01
25
50
75
100
125
150
1
10
100
1000
TC, Case Temperature [oC]
VDS, Drain−Source Voltage [V]
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current
vs. Case Temperature
45
30
15
0
0
130
260
390
520
650
, Drain to Source Voltage [V]
VDS
Figure 11. Eoss vs. Drain to Source Voltage
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5
NTH4L040N65S3F
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
2
1
DUTY CYCLE−DESCENDING ORDER
D = 0.5
0.2
0.1
P
DM
0.1
0.01
0.05
0.02
0.01
t
1
t
2
(t) = r(t) x R
o
Z
qJC
qJC
R
= 0.28 C/W
qJC
Peak T = P
Duty Cycle, D = t / t
x Z (t) + T
SINGLE PULSE
10−4
J
DM
qJC C
1
2
0.001
10−5
10−3
10−2
10−1
100
101
102
t, RECTANGULAR PULSE DURATION (sec)
Figure 12. Transient Thermal Response Curve
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6
NTH4L040N65S3F
Figure 13. Gate Charge Test Circuit & Waveform
Figure 14. Resistive Switching Test Circuit & Waveforms
Figure 15. Unclamped Inductive Switching Test Circuit & Waveforms
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7
NTH4L040N65S3F
Figure 16. Peak Diode Recovery dv/dt Test Circuit & Waveforms
SUPERFET and FRFET are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States
and/or other countries.
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8
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TO−247−4LD
CASE 340CJ
ISSUE A
DATE 16 SEP 2019
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13852G
TO−247−4LD
PAGE 1 OF 1
ON Semiconductor and
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