NTMFSC2D9N08H [ONSEMI]
MOSFET - Power, Single, N-Channel, DUAL COOLTM, DFN8 5x6. 15, 80V, 2.9m, 154A;型号: | NTMFSC2D9N08H |
厂家: | ONSEMI |
描述: | MOSFET - Power, Single, N-Channel, DUAL COOLTM, DFN8 5x6. 15, 80V, 2.9m, 154A |
文件: | 总7页 (文件大小:390K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
DATA SHEET
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MOSFET - Power, Single
N-Channel, DUAL COOL),
DFN8 5x6.15
V
R
MAX
I MAX
D
(BR)DSS
DS(ON)
80 V
2.9 mW @ 10 V
154 A
N−Channel MOSFET
80 V, 2.9 mW, 154 A
S
S
S
1
8
D
D
D
NTMFSC2D9N08H
2
3
7
6
Features
• Advanced Dual−Side Cooled Packaging
• Ultra Low R
to Minimize Conduction Losses
• MSL1 Robust Packaging Design
DS(on)
G
4
5
D
• Low Qg and Qoss to Minimize Charge Losses
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
• DC−DC Conversion
• Orring FET/Load Switching
• Synchronous Rectification
DFN8 5x6.15
CASE 506EG
MAXIMUM RATINGS (T = 25°C, Unless otherwise specified)
J
Parameter
Drain−to−Source Breakdown Voltage
Gate−to−Source Voltage
Symbol
Value
80
Unit
V
MARKING DIAGRAM
V
(BR)DSS
V
GS
20
V
3PAYWZ
Continuous Drain
Current R
I
154
A
D
q
JC
Steady
State
(Note 2)
T
= 25°C
C
Power Dissipation
P
166
23
W
A
D
R
(Note 2)
q
JC
Continuous Drain
Current R
I
D
3P
A
Y
= Specific Device Code
= Assembly Location
= Year
q
JA
Steady
State
(Note 1, 2)
T = 25°C
A
W
Z
= Work Week
= Assembly Lot Code
Power Dissipation
P
3.8
W
D
R
(Note 1, 2)
q
JA
Pulsed Drain Current T = 25°C, t = 100 ms
I
DM
638
A
A
p
Operating Junction and Storage Temperature
Range
T , T
−55 to
°C
J
stg
ORDERING INFORMATION
See detailed ordering and shipping information on page 5 of
this data sheet.
+175
Source Current (Body Diode)
I
S
138
173
A
Single Pulse Drain−to−Source Avalanche
E
AS
mJ
Energy (I = 34 A)
AV
Lead Temperature Soldering Reflow for Sol-
dering Purposes (1/8″ from case for 10 s)
T
L
260
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
2
1. Surface−mounted on FR4 board using 1 in pad size, 1 oz Cu pad.
2. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
© Semiconductor Components Industries, LLC, 2020
1
Publication Order Number:
January, 2023 − Rev. 2
NTMFSC2D9N08H/D
NTMFSC2D9N08H
THERMAL CHARACTERISTICS
Symbol
Parameter
Max
0.9
1.4
39
Unit
Junction−to−Case – Steady State (Note 2)
Junction−to−Top Source – Steady State (Note 2)
Junction−to−Ambient – Steady State (Note 2)
°C/W
R
q
JC
R
R
q
JT
q
JA
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
V
V
GS
= 0 V, I = 250 mA
80
V
(BR)DSS
D
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V
/ T
J
58
mV/°C
(BR)DSS
Zero Gate Voltage Drain Current
I
T = 25°C
10
mA
DSS
J
V
= 0 V,
GS
DS
V
= 80 V
T = 125°C
J
100
100
Gate−to−Source Leakage Current
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage
I
V
= 0 V, V = 20 V
nA
GSS
DS
GS
V
V
= V , I = 250 mA
2.0
4.0
V
GS(TH)
GS
DS
D
/ T
Negative Threshold Temperature
Coefficient
V
−7.3
mV/°C
GS(TH)
J
I
D
= 250 mA, ref to 25°C
Drain−to−Source On Resistance
R
V
= 10 V, I = 50 A
2.2
3.1
294
1
2.9
4.4
mW
DS(on)
GS
D
V
= 6 V, I = 25 A
D
GS
DS
GS
Forward Trans-conductance
Gate−Resistance
g
FS
V
= 15V, I = 50 A
S
D
R
V
= 0 V, f = 1 MHz
2.6
W
G
CHARGES & CAPACITANCES
Input Capacitance
C
4380
610
16
pF
ISS
V
= 0 V, f = 1 MHz,
DS
GS
Output Capacitance
C
OSS
RSS
V
= 40 V
Reverse Transfer Capacitance
Total Gate Charge
C
Q
68
nC
nC
nC
ns
G(TOT)
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
Output Charge
Q
11.8
19
G(TH)
V
GS
= 10 V, V = 40 V, I = 50 A
DS D
Q
GS
Q
15
GD
Q
V
DD
= 40 V, V = 0 V
108
OSS
GS
SWITCHING CHARACTERISTICS (Note 3)
Turn−On Delay Time
Rise Time
t
20.5
14
d(ON)
t
r
V
= 10 V, V = 40 V,
DS
GS
I
D
= 50 A, R = 2.5 W
G
Turn−Off Delay Time
Fall Time
t
42
d(OFF)
t
f
9.5
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
T = 25°C
0.80
0.65
64
1.2
V
SD
J
V
= 0 V,
GS
S
I
= 50 A
T = 150°C
J
Reverse Recovery Time
t
ns
RR
V
GS
= 0 V, dI /dt = 100 A/ms,
S
I
S
= 50 A
Reverse Recovery Charge
Q
81
nC
RR
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Switching characteristics are independent of operating junction temperatures.
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2
NTMFSC2D9N08H
TYPICAL CHARACTERISTICS
300
300
225
150
5.5 V
V
DS
= 5 V
240
180
120
5.0 V
V
GS
= 12 V to 6 V
T = 25°C
T = 150°C
J
J
4.5 V
4.0 V
75
0
60
0
T = 175°C
J
T = −55°C
J
0
1
2
3
4
5
2
3
4
5
6
7
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
70
56
42
28
6
T = 25°C
D
J
V
= 6 V
GS
I
= 50 A
3
0
V
GS
= 10 V
14
0
4
5
6
7
8
9
10
0
60
120
180
240
300
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
D
Figure 3. On−Resistance vs. Gate−to−Source
Figure 4. On−Resistance vs. Drain Current and
Voltage
Gate Voltage
2.4
1E−03
1E−04
1E−05
1E−06
1E−07
V
= 10 V
= 50 A
GS
T = 175°C
J
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
I
D
T = 150°C
J
T = 125°C
J
T = 25°C
J
1E−08
1E−09
−75 −50 −25
0
25 50 75 100 125 150 175
20
30
40
50
60
70
80
T , JUNCTION TEMPERATURE (°C)
J
V
, DRAIN−TO−SOURCE VOLTAGE (V)
DS
Figure 5. On−Resistance Variation with
Figure 6. Drain−to−Source Leakage Current
Temperature
vs. Voltage
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3
NTMFSC2D9N08H
TYPICAL CHARACTERISTICS
10K
1K
10
V
= 40 V
DD
C
ISS
8
6
4
C
OSS
Q
Q
GD
GS
100
C
RSS
10
1
V
= 0 V
GS
2
0
T = 25°C
J
f = 1 MHz
0.1
1
10
100
0
14
28
42
56
70
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Q , TOTAL GATE CHARGE (nC)
G
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source Voltage vs. Total
Charge
100
10
1
1000
100
V
GS
= 0 V
t
d(off)
t
d(on)
T = 175°C
J
0.1
t
r
10
1
t
f
T = 25°C
V
V
= 10 V
= 40 V
= 50 A
J
GS
0.01
DS
I
D
T = 125°C
T = −55°C
J
J
0.001
1
10
R , GATE RESISTANCE (W)
0
0.2
0.4
, SOURCE−TO−DRAIN VOLTAGE (V)
SD
0.6
0.8
1.0
1.2
V
G
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
2000
1000
1000
100
100
10
1
10 ms
100 ms
T
= 25°C
J(initial)
T
= 25°C
C
1 ms
10 ms
Single Pulse
= 0.9°C/W
10
1
T
= 150°C
R
J(initial)
q
JC
R
Limit
DS(on)
100 ms/DC
0.1
Thermal Limit
Package Limit
0.01
0.1
1
10
100
0.001 0.01
0.1
1
10
100
1000
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
t , TIME IN AVALANCHE (mS)
AV
Figure 11. Forward Bias Safe Operating Area
Figure 12. Unclamped Inductive Switching
Capability
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4
NTMFSC2D9N08H
TYPICAL CHARACTERISTICS
10
1
Duty Cycle = 0.5
0.2
0.1
0.05
0.02
0.1
P
DM
Notes:
= 0.9°C/W
0.01 0.01
Single Pulse
R
q
JC
Peak T = P
Duty Cycle, D = t / t
x Z (t) + T
q
JC C
t
1
J
DM
1
2
t
2
0.001
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
t, RECTANGULAR PULSE DURATION (sec)
Figure 13. Transient Thermal Impedance
ORDERING INFORMATION
Device
†
Device Marking
Package
Shipping
NTMFSC2D9N08H
2D9N08
DFN8
3000 / Tape & Reel
(Pb−Free/Halogen Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
DUAL COOL is a registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DFN8 5x6.15, 1.27P, DUAL COOL
CASE 506EG
ISSUE D
DATE 25 AUG 2020
GENERIC
MARKING DIAGRAM*
AYWWZZ
XXXXXX
XXXX = Specific Device Code
*This information is generic. Please refer to
A
Y
= Assembly Location
= Year
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
WW = Work Week
ZZ
= Assembly Lot Code
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON84257G
DFN8 5x6.15, 1.27P, DUAL COOL
PAGE 1 OF 1
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