NVBLS0D7N04M8TXG [ONSEMI]
Power MOSFET, 40 V, 240 A, 0.75 mΩ, Single N-Channel;型号: | NVBLS0D7N04M8TXG |
厂家: | ONSEMI |
描述: | Power MOSFET, 40 V, 240 A, 0.75 mΩ, Single N-Channel 晶体管 |
文件: | 总7页 (文件大小:507K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
NVBLS0D7N04M8
MOSFET – Power, Single,
N-Channel
40 V, 240 A, 0.75 mW
Features
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• Typical R
• Typical Q
= 0.59 mW at V = 10 V, I = 80 A
GS D
DS(on)
= 144 nC at V = 10 V, I = 80 A
g(tot)
GS
D
• UIS Capability
• AEC−Q101 Qualified and PPAP Capable
• These Devices are Pb−Free and are RoHS Compliant
MAXIMUM RATINGS T = 25°C unless otherwise noted
J
MO−299A
CASE 100CU
Parameter
Drain−to−Source Voltage
Gate−to−Source Voltage
Symbol
Ratings
40
Units
V
DSS
V
V
A
V
GS
20
D (9)
Drain Current − Continuous (V = 10)
I
D
240
GS
(Note 1)
T
= 25°C
C
Pulsed Drain Current
T
= 25°C
See
Figure 4
C
G (1)
Single Pulse Avalanche Energy (Note 2)
Power Dissipation
E
737
357
mJ
W
AS
P
D
Derate Above 25°C
2.38
W/°C
°C
S (2−8)
Operating and Storage Temperature
Thermal Resistance, Junction−to−Case
Maximum Thermal Resistance,
T , T
−55 to +175
0.42
J
STG
R
°C/W
°C/W
q
JC
JA
43
ORDERING INFORMATION
R
q
Junction−to−Ambient
(Note 3)
Device
Package
Marking
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Current is limited by bondwire configuration.
NVBLS0D7N04M8TXG MO−299A
(Pb−Free)
0D7N04M8
2. Starting T = 25°C, L = 0.36 mH, I = 64 A, V = 40 V during inductor
J
AS
DD
charging and V = 0 V during time in avalanche.
DD
3. R
is the sum of the junction−to−case and case−to−ambient thermal
q
JA
resistance, where the case thermal reference is defined as the solder
mounting surface of the drain pins. R
is guaranteed by design, while R
q
JA
q
JC
is determined by the board design. The maximum rating presented here is
2
based on mounting on a 1 in pad of 2 oz copper.
© Semiconductor Components Industries, LLC, 2018
1
Publication Order Number:
June, 2019 − Rev. 0
NVBLS0D7N04M8/D
NVBLS0D7N04M8
Table 1. ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
OFF CHARACTERISTICS
B
Drain−to−Source Breakdown Voltage
Drain−to−Source Leakage Current
I
= 250 mA, V = 0 V
40
−
−
−
−
−
−
1
V
VDSS
D
GS
V
= 40 V,
= 0 V
T = 25°C
J
I
mA
mA
nA
DS
GS
DSS
V
T = 175°C (Note 4)
J
−
1
I
Gate−to−Source Leakage Current
V
GS
=
20 V
−
100
GSS
ON CHARACTERISTICS
V
Gate−to−Source Threshold Voltage
Drain−to−Source On Resistance
V
= V , I = 250 mA
2.0
3.3
4.0
V
GS(th)
DS(on)
GS
DS
D
R
I
D
= 80 A, V = 10 V
T = 25°C
J
−
0.59
0.75
mW
GS
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
= 25 V, V = 0 V, f = 1 MHz
−
−
−
−
−
−
−
−
12000
3300
440
3.3
−
−
pF
pF
pF
W
iss
DS
GS
C
Output Capacitance
oss
C
Reverse Transfer Capacitance
Gate Resistance
−
rss
R
f = 1 MHz
−
g
Q
Total Gate Charge at 10 V
Threshold Gate Charge
Gate−to−Source Gate Charge
Gate−to−Drain “Miller” Charge
V
= 0 to 10 V
= 0 to 2 V
V = 32 V
DD
D
144
22
188
26
−
nC
nC
nC
nC
g(ToT)
GS
I
= 80 A
Q
V
GS
g(th)
Q
66
gs
Q
16
−
gd
SWITCHING CHARACTERISTICS
t
Turn−On Time
Turn−On Delay
Rise Time
V
GS
= 20 V, I = 80 A,
−
−
−
−
−
−
−
162
−
ns
ns
ns
ns
ns
ns
on
DD
D
V
= 10 V, R
= 6 W
GEN
t
42
73
83
50
−
d(on)
t
r
−
t
Turn−Off Delay
Fall Time
−
d(off)
t
f
−
t
Turn−Off Time
279
off
DRAIN−SOURCE DIODE CHARACTERISTICS
V
Source−to−Drain Diode Voltage
I
I
= 80 A, V = 0 V
−
−
−
−
−
−
1.25
1.2
V
V
SD
SD
GS
= 40 A, V = 0 V
SD
GS
t
Reverse−Recovery Time
Reverse−Recovery Charge
111
178
129
214
ns
nC
I = 80 A, dI /d = 100 A/ms,
rr
F
SD
DD
t
V
= 32 V
Q
rr
4. The maximum value is specified by design at T = 175°C. Product is not tested to this condition in production.
J
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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2
NVBLS0D7N04M8
Typical Characteristics
600
500
400
300
200
100
0
1.2
1.0
0.8
0.6
0.4
0.2
0.0
CURRENT LIMITED
BY PACKAGE
VGS = 10V
CURRENT LIMITED
BY SILICON
25
50
75 100 125 150 175 200
TC, CASE TEMPERATURE(oC)
0
25
50
75 100 125 150 175
TC, CASE TEMPERATURE(oC)
Figure 2. Maximum Continuous Drain Current vs.
Case Temperature
Figure 1. Normalized Power Dissipation vs. Case
Temperature
2
DUTY CYCLE − DESCENDING ORDER
1
D = 0.50
0.20
0.10
P
DM
0.05
0.02
0.01
t
0.1
1
t
2
NOTES:
DUTY FACTOR: D = t /t
1
2
SINGLE PULSE
0.01
PEAK T = P x Z
x R
+ T
J
DM
qJA
qJA C
10−5
10−4
10−3
10−2
10−1
100
101
t, RECTANGULAR PULSE DURATION(s)
Figure 3. Normalized Maximum Transient Thermal Impedance
10000
VGS = 10V
o
= 25 C
T
C
FOR TEMPERATURES
o
ABOVE 25 C DERATE PEAK
CURRENT AS FOLLOWS:
1000
100
10
175 − T
C
I = I
2
150
SINGLE PULSE
10−5
10−4
10−3
10−2
10−1
100
101
t, RECTANGULAR PULSE DURATION(s)
Figure 4. Peak Current Capability
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3
NVBLS0D7N04M8
Typical Characteristics
2000
1000
If R = 0
= (L)(I )/(1.3*RATED BV
1000
t
AV
− V )
DD
AS
DSS
If R ! 0
t
AV
= (L/R)ln[(I *R)/(1.3*RATED BV
− V ) +1]
AS
DSS DD
100
100
10
1
100us
1ms
OPERATION IN THIS
AREA MAY BE
STARTING T = 25oC
J
10
LIMITED BY r
DS(on)
10ms
100ms
1
STARTING TJ = 150oC
SINGLE PULSE
T
= MAX RATED
= 25oC
J
T
C
0.1
0.001 0.01 0.1
1
10 100 1000 10000
tAV, TIME IN AVALANCHE (ms)
0.1
1
10
100 200
VDS, DRAIN TO SOURCE VOLTAGE (V)
NOTE: Refer to Fairchild Application Notes AN7514 and AN7515
Figure 6. Unclamped Inductive Switching
Capability
Figure 5. Forward Bias Safe Operating Area
300
400
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
VGS = 0 V
100
240
180
120
60
VDD = 5V
TJ = 175oC
TJ = 25o C
10
1
T
J = 25oC
T
J = 175 o
C
TJ = −55 o
C
0
0.1
2
3
4
5
6
7
0
0.2
0.4
0.6
0.8
1.0
1.2
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 7. Transfer Characteristics
Figure 8. Forward Diode Characteristics
300
250
200
150
100
50
300
250
VGS
15V Top
10V
8V
VGS
15V Top
10V
8V
5V
200
150
100
7V
6V
5.5V
5V Bottom
7V
6V
5.5V
5V Bottom
80 ms PULSE WIDTH
Tj=25oC
5V
50
0
80 ms PULSE WIDTH
Tj=175oC
0
0
1
2
3
4
5
0
1
2
3
4
5
VDS, DRAIN TO SOURCE VOLTAGE (V)
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 9. Saturation Characteristics
Figure 10. Saturation Characteristics
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4
NVBLS0D7N04M8
Typical Characteristics
10
2.0
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
ID = 80A
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
8
6
4
2
0
TJ = 175 o
C
TJ = 25oC
ID = 80A
VGS = 10V
2
4
6
8
10
−80 −40
0
40
80 120 160 200
TJ, JUNCTION TEMPERATURE(oC)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 11. RDSON vs. Gate Voltage
Figure 12. Normalized RDSON vs. Junction
Temperature
1.5
1.10
VGS = V
DS
ID = 1mA
I
D
= 250 mA
1.2
0.9
0.6
0.3
0.0
1.05
1.00
0.95
0.90
−80 −40
0
40
80 120 160 200
−80 −40
0
40
80 120 160 200
TJ, JUNCTION TEMPERATURE(oC)
TJ, JUNCTION TEMPERATURE (oC)
Figure 13. Normalized Gate Threshold Voltage vs.
Temperature
Figure 14. Normalized Drain to Source
Breakdown Voltage vs. Junction Temperature
100000
10
ID = 80A
VDD = 20V
8
Ciss
10000
VDD =16V
VDD = 24V
6
4
2
0
Coss
1000
Crss
100
f = 1MHz
V
GS = 0V
10
0.1
1
10
100
0
30
60
90
120
150
Qg, GATE CHARGE(nC)
V
DS, DRAIN TO SOURCE VOLTAGE (V)
Figure 15. Capacitance vs. Drain to Source
Voltage
Figure 16. Gate Charge vs. Gate to Source
Voltage
PowerTrench is a registered trademark of Semiconductor Components Industries, LLC.
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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
H−PSOF8L 11.68x9.80
CASE 100CU
ISSUE C
DATE 22 MAY 2023
GENERIC
MARKING DIAGRAM*
AYWWZZ
XXXXXXXX
XXXXXXXX
A
Y
= Assembly Location
= Year
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
WW = Work Week
ZZ
XXXX = Specific Device Code
= Assembly Lot Code
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13813G
H−PSOF8L 11.68x9.80
PAGE 1 OF 1
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