NVJS4151PT1G [ONSEMI]
单 P 沟道,沟槽功率 MOSFET,-20V,-4.1A,67mΩ;型号: | NVJS4151PT1G |
厂家: | ONSEMI |
描述: | 单 P 沟道,沟槽功率 MOSFET,-20V,-4.1A,67mΩ |
文件: | 总7页 (文件大小:220K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
NVJS4151P
MOSFET – Power, Single
P-Channel, Trench, SC-88
-20 V, -4.1 A
Features
http://onsemi.com
• Leading Trench Technology for Low R
• SC−88 Small Outline (2x2 mm) for Maximum Circuit Board
Utilization, Same as SC−70−6
Extending Battery Life
DS(ON)
V
R
Typ
I Max
D
(BR)DSS
DS(on)
55 mW @ −4.5 V
70 mW @ −2.5 V
180 mW @ −1.8 V
• Gate Diodes for ESD Protection
−4.1 A
−20 V
• AEC−Q101 Qualified and PPAP Capable
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
SC−88 (SOT−363)
Applications
D
D
1
2
3
6
D
D
S
• High Side Load Switch
• Cell Phones, Computing, Digital Cameras, MP3s and PDAs
5
4
MAXIMUM RATINGS (T = 25°C unless otherwise stated)
J
Parameter
Drain−to−Source Voltage
Symbol
Value
−20
12
Unit
V
G
V
DSS
Gate−to−Source Voltage
V
GS
V
Top View
Continuous Drain
Current (Note 1)
Steady T = 25 °C
I
−3.2
−2.3
−4.1
1.2
A
A
D
State
MARKING DIAGRAM &
PIN ASSIGNMENT
T = 85 °C
A
t ≤ 5 s T = 25 °C
A
D
D
S
Power Dissipation
(Note 1)
Steady T = 25 °C
P
W
A
D
6
State
1
VTY M G
Pulsed Drain Current
t = 10 ms
I
−13
A
SC−88/SOT−363
CASE 419B
p
DM
G
Operating Junction and Storage Temperature
T ,
−55 to
150
°C
J
T
STG
1
D
D
G
Source Current (Body Diode)
I
S
−0.8
A
VTY
M
G
= Device Code
= Date Code
= Pb−Free Package
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
260
°C
T
L
ESD
Human Body Model (HBM)
ESD
4000
V
(Note: Microdot may be in either location)
THERMAL RESISTANCE RATINGS (Note 1)
Parameter
Symbol
Max
125
75
Unit
ORDERING INFORMATION
Junction−to−Ambient – Steady State
Junction−to−Ambient − t ≤ 5 s
Junction−to−Lead – Steady State
R
°C/W
q
JA
†
Device
Package
Shipping
R
q
JA
NVJS4151PT1G
SC−88
3000 / Tape & Reel
R
45
q
JL
(Pb−Free)
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Surface mounted on FR4 board using 1 in sq pad size
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
(Cu area = 1.127 in sq [1 oz] including traces).
© Semiconductor Components Industries, LLC, 2014
1
Publication Order Number:
July, 2019 − Rev. 1
NVJS4151P/D
NVJS4151P
ELECTRICAL CHARACTERISTICS (T =25°C unless otherwise stated)
J
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
V
−20
V
(BR)DSS
V
GS
= 0 V, I = −250 mA
D
Drain−to−Source Breakdown Voltage
V
/T
J
−12
mV/°C
(BR)DSS
Temperature Coefficient
Zero Gate Voltage Drain Current
I
T = 25°C
−1.0
−5.0
1.5
mA
DSS
J
V
= −16 V,
DS
GS
V
= 0 V
T = 85°C
J
Gate−to−Source Leakage Current
I
V
= 0 V, V
GS
=
=
4.5 V
12 V
mA
GSS
DS
V
= 0 V, V
10
mA
DS
GS
ON CHARACTERISTICS (Note 2)
Gate Threshold Voltage
V
−0.40
−1.2
V
GS(TH)
V
GS
= V , I = −250 mA
DS D
Negative Threshold Temperature
Coefficient
V
/T
4.0
mV/°C
GS(TH)
J
Drain−to−Source On Resistance
R
V
V
V
= −4.5 V, I = −2.9 A
55
70
67
85
mW
DS(on)
GS
GS
GS
D
= −2.5 V, I = −2.4 A
D
= −1.8 V, I = −1.0 A
180
12
205
D
Forward Transconductance
CHARGES AND CAPACITANCES
Input Capacitance
g
FS
V
= −10 V, I = −3.3 A
S
GS
D
C
850
160
110
10
pF
ISS
V
= 0 V, f = 1.0 MHz,
DS
GS
Output Capacitance
C
C
OSS
RSS
V
= −10 V
Reverse Transfer Capacitance
Total Gate Charge
Q
nC
G(TOT)
V
V
= −4.5 V, V = −10 V,
DS
GS
Gate−to−Source Charge
Gate−to−Drain Charge
SWITCHING CHARACTERISTICS (Note 3)
Turn−On Delay Time
Q
Q
1.5
2.8
GS
I
= −3.3 A
D
GD
t
0.85
1.7
2.7
4.2
ms
d(ON)
Rise Time
t
r
= −4.5 V, V = −10 V,
GS
DD
I
D
= −1.0 A, R = 6.0 W
G
Turn−Off Delay Time
t
d(OFF)
Fall Time
t
f
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
V
V
= 0 V, I = −1.3 A,
−0.75
−1.2
V
SD
GS
S
T = 25°C
J
Reverse Recovery Time
Charge Time
t
63
9.0
54
ns
RR
= 0 V, dI /dt = 100
T
GS
S
a
A/ms,
Discharge Time
T
b
I = −1.3 A
S
Reverse Recovery Charge
Q
0.23
nC
RR
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
2. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%.
3. Switching characteristics are independent of operating junction temperatures.
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2
NVJS4151P
TYPICAL ELECTRICAL CHARACTERISTICS
5
T = 25°C
V
= −1.8 V
J
GS
V
DS
w −10 V
4
3
2
1
0
V
= −2.4 V
= −2.0 V
GS
4
3
2
1
0
V
GS
V
V
= −1.6 V
GS
V
= −2.8 V to 6.0 V
GS
.
= −1.4 V
= −1.2 V
GS
V
= −1.0 V
V
6
GS
GS
0
2
4
8
0
1
2
3
4
−V , DRAIN−TO−SOURCE VOLTAGE (V)
DS
−V , DRAIN−TO−SOURCE VOLTAGE (V)
DS
Figure 1. On−Region Characteristics
Figure 2. On−Region Characteristics
0.6
0.5
0.4
0.3
0.2
0.1
0
0.5
0.4
0.3
0.2
0.1
0
I
= −3.3 A
D
T = 25°C
J
T = 25°C
J
V
= −1.8 V
GS
V
GS
= −2.5 V
V
GS
= −4.5 V
0
2
4
6
1
2
3
4
5
−V , GATE−TO−SOURCE VOLTAGE (V)
GS
−I , DRAIN CURRENT (A)
D
Figure 3. On−Resistance versus
Gate−to−Source Voltage
Figure 4. On−Resistance versus Drain Current
and Gate Voltage
100000
10000
1000
1.7
1.5
1.3
1.1
0.9
0.7
V
= −4.5 V
= −2.9 A
GS
V
GS
= 0 V
I
D
T = 150°C
J
100
−50
−25
0
25
50
75
100
125
150
0
4
8
12
16
20
T , JUNCTION TEMPERATURE (°C)
J
−V , DRAIN−TO−SOURCE VOLTAGE (V)
DS
Figure 5. On−Resistance Variation with
Figure 6. Drain−to−Source Leakage Current
Temperature
versus Voltage
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3
NVJS4151P
TYPICAL ELECTRICAL CHARACTERISTICS
1250
1000
750
500
250
0
5
15
12
9
V
= 0 V
GS
Q
T
T = 25°C
J
4
3
2
1
0
V
GS
C
ISS
V
DS
6
Q
Q
gd
I
= −3.3 A
T = 25°C
gs
D
J
3
0
0
4
8
12
16
20
0
2
4
6
8
10
12
Q , TOTAL GATE CHARGE (nC)
G
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source and
Drain−to−Source Voltage versus Total Charge
10000
1000
100
3
V
= 0 V
GS
T = 25°C
J
t
f
2.5
2
t
d(off)
t
r
1.5
1
t
d(on)
0.5
0
0.4
0.5
0.6
0.7
0.8
0.9
1
10
100
R , GATE RESISTANCE (W)
G
−V , SOURCE−TO−DRAIN VOLTAGE (V)
SD
Figure 9. Resistive Switching Time Variation
Gate Resistance
Figure 10. Diode Forward Voltage versus
Current
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4
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SC−88/SC70−6/SOT−363
CASE 419B−02
ISSUE Y
1
DATE 11 DEC 2012
SCALE 2:1
2X
aaa H
D
NOTES:
D
H
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
A
3. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRU-
SIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END.
4. DIMENSIONS D AND E1 AT THE OUTERMOST EXTREMES OF
THE PLASTIC BODY AND DATUM H.
5. DATUMS A AND B ARE DETERMINED AT DATUM H.
6. DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THE
LEAD BETWEEN 0.08 AND 0.15 FROM THE TIP.
7. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION.
ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN
EXCESS OF DIMENSION b AT MAXIMUM MATERIAL CONDI-
TION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OF THE FOOT.
D
GAGE
PLANE
6
1
5
2
4
3
L
L2
E1
E
DETAIL A
aaa
C
2X
2X 3 TIPS
bbb H
D
e
MILLIMETERS
DIM MIN NOM MAX
−−−
INCHES
MIN
−−−
NOM MAX
−−− 0.043
−−− 0.004
6X b
B
TOP VIEW
A
−−−
−−−
1.10
A1 0.00
A2 0.70
0.10 0.000
M
ddd
C A-B D
0.90
0.20
0.15
2.00
2.10
1.25
0.65 BSC
0.36
1.00 0.027 0.035 0.039
0.25 0.006 0.008 0.010
0.22 0.003 0.006 0.009
2.20 0.070 0.078 0.086
2.20 0.078 0.082 0.086
1.35 0.045 0.049 0.053
0.026 BSC
b
C
D
E
0.15
0.08
1.80
2.00
A2
DETAIL A
A
E1 1.15
e
L
0.26
0.46 0.010 0.014 0.018
0.006 BSC
L2
0.15 BSC
0.15
aaa
bbb
ccc
ddd
0.006
0.012
0.004
0.004
0.30
0.10
0.10
6X
ccc C
A1
SEATING
PLANE
c
C
SIDE VIEW
END VIEW
GENERIC
MARKING DIAGRAM*
RECOMMENDED
SOLDERING FOOTPRINT*
6
6X
0.30
XXXMG
6X
0.66
G
1
2.50
XXX = Specific Device Code
M
= Date Code*
G
= Pb−Free Package
0.65
(Note: Microdot may be in either location)
PITCH
*Date Code orientation and/or position may
vary depending upon manufacturing location.
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
STYLES ON PAGE 2
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42985B
SC−88/SC70−6/SOT−363
PAGE 1 OF 2
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
SC−88/SC70−6/SOT−363
CASE 419B−02
ISSUE Y
DATE 11 DEC 2012
STYLE 1:
PIN 1. EMITTER 2
2. BASE 2
STYLE 2:
CANCELLED
STYLE 3:
CANCELLED
STYLE 4:
STYLE 5:
STYLE 6:
PIN 1. ANODE 2
2. N/C
PIN 1. CATHODE
2. CATHODE
3. COLLECTOR
4. EMITTER
5. BASE
PIN 1. ANODE
2. ANODE
3. COLLECTOR 1
4. EMITTER 1
5. BASE 1
3. COLLECTOR
3. CATHODE 1
4. ANODE 1
5. N/C
4. EMITTER
5. BASE
6. COLLECTOR 2
6. ANODE
6. CATHODE
6. CATHODE 2
STYLE 7:
STYLE 8:
CANCELLED
STYLE 9:
STYLE 10:
STYLE 11:
STYLE 12:
PIN 1. SOURCE 2
2. DRAIN 2
3. GATE 1
PIN 1. EMITTER 2
2. EMITTER 1
3. COLLECTOR 1
4. BASE 1
PIN 1. SOURCE 2
2. SOURCE 1
3. GATE 1
PIN 1. CATHODE 2
2. CATHODE 2
3. ANODE 1
PIN 1. ANODE 2
2. ANODE 2
3. CATHODE 1
4. ANODE 1
5. ANODE 1
6. CATHODE 2
4. SOURCE 1
5. DRAIN 1
6. GATE 2
4. DRAIN 1
5. DRAIN 2
6. GATE 2
4. CATHODE 1
5. CATHODE 1
6. ANODE 2
5. BASE 2
6. COLLECTOR 2
STYLE 13:
PIN 1. ANODE
2. N/C
STYLE 14:
PIN 1. VREF
2. GND
STYLE 15:
STYLE 16:
STYLE 17:
STYLE 18:
PIN 1. VIN1
2. VCC
PIN 1. ANODE 1
2. ANODE 2
PIN 1. BASE 1
2. EMITTER 2
3. COLLECTOR 2
4. BASE 2
PIN 1. BASE 1
2. EMITTER 1
3. COLLECTOR 2
4. BASE 2
3. COLLECTOR
4. EMITTER
5. BASE
3. GND
3. ANODE 3
3. VOUT2
4. VIN2
5. GND
6. VOUT1
4. IOUT
5. VEN
6. VCC
4. CATHODE 3
5. CATHODE 2
6. CATHODE 1
5. EMITTER 1
6. COLLECTOR 1
5. EMITTER 2
6. COLLECTOR 1
6. CATHODE
STYLE 19:
PIN 1. I OUT
2. GND
STYLE 20:
STYLE 21:
PIN 1. ANODE 1
2. N/C
STYLE 22:
PIN 1. D1 (i)
2. GND
STYLE 23:
PIN 1. Vn
2. CH1
3. Vp
STYLE 24:
PIN 1. CATHODE
2. ANODE
PIN 1. COLLECTOR
2. COLLECTOR
3. BASE
3. GND
3. ANODE 2
4. CATHODE 2
5. N/C
3. D2 (i)
3. CATHODE
4. CATHODE
5. CATHODE
6. CATHODE
4. V CC
4. EMITTER
5. COLLECTOR
6. COLLECTOR
4. D2 (c)
5. VBUS
6. D1 (c)
4. N/C
5. V EN
5. CH2
6. N/C
6. V REF
6. CATHODE 1
STYLE 30:
STYLE 25:
STYLE 26:
PIN 1. SOURCE 1
2. GATE 1
STYLE 27:
PIN 1. BASE 2
2. BASE 1
STYLE 28:
PIN 1. DRAIN
2. DRAIN
3. GATE
STYLE 29:
PIN 1. ANODE
2. ANODE
PIN 1. SOURCE 1
2. DRAIN 2
3. DRAIN 2
4. SOURCE 2
5. GATE 1
PIN 1. BASE 1
2. CATHODE
3. COLLECTOR 2
4. BASE 2
3. DRAIN 2
4. SOURCE 2
5. GATE 2
3. COLLECTOR 1
4. EMITTER 1
5. EMITTER 2
6. COLLECTOR 2
3. COLLECTOR
4. EMITTER
5. BASE/ANODE
6. CATHODE
4. SOURCE
5. DRAIN
6. DRAIN
5. EMITTER
6. COLLECTOR 1
6. DRAIN 1
6. DRAIN 1
Note: Please refer to datasheet for
style callout. If style type is not called
out in the datasheet refer to the device
datasheet pinout or pin assignment.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42985B
SC−88/SC70−6/SOT−363
PAGE 2 OF 2
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
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