BD8313HFN_11 [ROHM]
Output 1.5A or Less High-efficiency Step-down Switching Regulator with Built-in Power MOSFET; 输出1.5A或更少的高效率降压开关稳压器具有内置功率MOSFET型号: | BD8313HFN_11 |
厂家: | ROHM |
描述: | Output 1.5A or Less High-efficiency Step-down Switching Regulator with Built-in Power MOSFET |
文件: | 总18页 (文件大小:544K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Single-chip Type with Built-in FET Switching Regulators
Output 1.5A or Less
High-efficiency Step-down Switching Regulator
with Built-in Power MOSFET
No.11027EDT05
BD8313HFN
●Description
BD8313HFN produces step-down output including 1.2, 1.8, 3.3, or 5 V from 4 batteries, batteries such as Li2cell or Li3cell,
etc. or a 5V/12V fixed power supply line.
BD8313HFN allows easy production of small power supply by a wide range of external constants, and is equipped with an
external coil/capacitor downsized by high frequency operation of 1.0 MHz, built-in synchronous rectification SW capable of
withstanding 15 V, and flexible phase compensation system on board.
●Features
1) Incorporates Pch/Nch synchronous rectification SW capable of withstanding 1.2 A/15V.
2) Incorporates phase compensation device between input and output of Error AMP.
3) Small coils and capacitors to be used by high frequency operation of 1.0MHz
4) Input voltage 3.5 V – 14 V
Output current 1.2A(7.4V input, 3.3V output)
0.8A(4.5V input, 3.3V output)
5) Incorporates soft-start function.
6) Incorporates timer latch system short protecting function.
7) As small as 2.9mm×3 mm, SON 8-pin package
HSON8
●Application
For portable equipment like DSC/DVC powered by 4 dry batteries or Li2cell and Li3cell, or general consumer-equipment
with 5 V/12 V lines
●Operating Conditions (Ta = 25°C)
Parameter
Power supply voltage
Symbol
VCC
Voltage circuit
3.5 - 14
Unit
V
Output voltage
VOUT
1.2 - 12
V
●Absolute Maximum Ratings
Parameter
Symbol
VCC, PVCC
Iinmax
Pd
Rating
15
Unit
V
Maximum applied power voltage
Maximum input current
Power dissipation
1.2
A
630
mW
°C
°C
°C
Operating temperature range
Storage temperature range
Junction temperature
Topr
-25~+85
-55~+150
+150
Tstg
Tjmax
*1 When used at Ta = 25℃ or more installed on a 70×70×1.6tmm board, the rating is reduced by 5.04mW/℃.
* These specifications are subject to change without advance notice for modifications and other reasons.
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Technical Note
BD8313HFN
●Electrical Characteristics
(Unless otherwise specified, Ta = 25 °C, VCC = 7.4 V)
Target Value
Typ
Parameter
Symbol
Unit
Conditions
Min
Max
[Low voltage input malfunction preventing circuit]
Detection threshold voltage
Hysteresis range
[Oscillator]
VUV
-
2.9
3.2
V
VREG monitor
ΔVUVhy
100
200
300
mV
Oscillation frequency
[Regulator]
Fosc
0.9
1.0
5.0
1.1
MHz
V
Output voltage
[Error AMP]
VREG
4.65
5.35
INV threshold voltage
Input bias current
Soft-start time
VINV
IINV
Tss
0.99
-50
1.00
0
1.01
50
V
nA
VCC = 12.0 V , VINV = 6.0 V
4.8
8.0
11.1
msec
[PWM comparator]
LX Max Duty
Dmax
-
-
(※)100
%
[Output]
PMOS ON resistance
NMOS ON resistance
Leak current
RONP
RONN
Ileak
-
-
450
300
0
600
420
1
mΩ
mΩ
uA
-1
[STB]
Operation
VSTBH
VSTBL
RSTB
2.5
-0.3
250
-
-
14
0.3
700
V
V
STB pin
control voltage
No-operation
STB pin pull-down resistance
[Circuit current]
400
kΩ
VCC pin
Standby current
PVCC pin
ISTB1
ISTB2
ICC1
-
-
-
-
-
-
1
1
uA
uA
uA
uA
Circuit current at operation VCC
Circuit current at operation PVCC
600
30
900
50
VINV = 1.2 V
VINV = 1.2 V
ICC2
(※1)100% is MAX Duty as behavior of a PWM conparetor.
Using in region where High side PMOS is 100% on state when the same or less input voltage than output voltage is supplied as an
application circuit causes detection of SCP then DC/DC converter stops.
Not designed to be resistant to radiation
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Technical Note
BD8313HFN
●Description of Pins
Pin No. Pin Name
Function
1
2
3
4
5
6
7
8
GND
VCC
VREG
PGND
Lx
Ground terminal
Control part power input terminal
5 V output terminal of regulator for internal circuit
Power transistor ground terminal
Coil connecting terminal
GND
VCC
INV
STB
PVCC
Lx
VREG
PGND
PVCC
STB
DC/DC converter input terminal
ON/OFF terminal
INV
Error AMP input terminal
Fig.1 Terminal layout
●Block Diagram
ON/OFF
STB
PVCC
VCC
VREG
UVLO
Reference
5V REG
STBY_IO
VREF
DC/DC
converter
100% High
Duty
PRE
DRIVER
SCP
OSC
1.0MHz
450mΩ
OSC×4000 count
STOP
LX
TIMMING
CONTROL
PWM
CONTROL
Step down
VREG
PRE
DRIVER
300mΩ
ERROR_AMP
VREF
GND
Soft
PGND
Start
OSC×8000 count
INV
Fig.2 Block diagram
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Technical Note
BD8313HFN
●Description of Blocks
1. Reference
This block produces ERROR AMP standard voltage.
The standard voltage is 1.0 V.
2. 5 V Reg
5 V low saturation regulator for internal analog circuit
BD8313HFN is equipped with this regulator for the purpose of protecting the internal circuit from high voltage. Therefore,
this output is reduced when VCC is less than 5 V, then PMOS ON resistance increases and Power efficiency and
Maximum output current of DC/DC converter decreases in this region. Please see attached data (fig14,15,16,17) about
increasing of PMOS ON resistance in this region.
3
4
UVLO
Circuit for preventing low voltage malfunction
Prevents malfunction of the internal circuit at activation of the power supply voltage or at low power supply voltage.
Monitors VCC pin voltage to turn off all output FET and DC/DC converter output when VCC voltage is lower than 2.9 V,
and reset the timer latch of the internal SCP circuit and soft-start circuit. This threshold contains 200 mV hysteresis.
SCP
Timer latch system short-circuit protection circuit
When DC/DC converter is 100% High Duty , the internal SCP circuit starts counting.
The internal counter is in synch with OSC, the latch circuit is activated about 4 msec after the counter counts about 4000
oscillations to turn off DC/DC converter output.
To reset the latch circuit, turn off the STB pin once. Then, turn it on again or turn on the power supply voltage again.
5
6
OSC
Circuit for oscillating sawtooth waves with an operation frequency fixed at 1.0 MHz
ERROR AMP
Error amplifier for detecting output signals and output PWM control signals
The internal standard voltage is set at 1.0 V.
A primary phase compensation device of 200 pF, 62 kΩ is built in-between the inverting input terminal and the output
terminal of this ERROR AMP.
7
8
9
PWM COMP
Voltage-pulse width converter for controlling output voltage corresponding to input voltage
Comparing the internal SLOPE waveform with the ERROR AMP output voltage, PWM COMP
controls the pulse width to the output to the driver.
SOFT START
Circuit for preventing in-rush current at startup by bringing the output voltage of the DC/DC converter into a soft-start
Soft-start time is in synch with the internal OSC, and the output voltage of the DC/DC converter reaches the set voltage
after about 8000 oscillations.
PRE DRIVER/TIMING CONTROL
CMOS inverter circuit for driving the built-in synchronous rectification SW
The synchronous rectification OFF time for preventing feedthrough is about 25 nsec.
10 STBY_IO
Voltage applied on STB pin (7 pin) to control ON/OFF of IC
Turned ON when a voltage of 2.5 V or higher is applied and turned OFF when the terminal is open or 0 V is applied.
Incorporates approximately 400 kΩ pull-down resistance.
11 Pch/Nch FET SW
Built-in synchronous rectification SW for switching the coil current of the DC/DC converter
Incorporates a 450 mΩ PchFET SW capable of withstanding 15 V.and 300 mΩ SW capable of withstanding 15 V.
Since the current rating of this FET is 1.2 A, it should be used within 1.2 A including the DC current and ripple current of
the coil.
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Technical Note
BD8313HFN
●Reference data
(Unless otherwise specified, Ta = 25°C, VCC = 7.4 V)
1.02
1.01
1.00
0.99
0.98
1.02
1.01
1.00
0.99
0.98
5.3
5.2
5.1
5.0
4.9
4.8
4.7
-40
0
40
80
120
-40
-20
0
20
40
60
80
100
120
0
2
4
6
8
10
12
14
TEMPERATURE [℃]
VCC [V]
TEMPERATURE [℃]
Fig.3. INV
threshold temperature property
Fig.5. VREG
output temperature property
Fig.4. INV
threshold power supply property
1.2
1.2
8
7
6
5
4
3
2
1
0
1.1
1.0
0.9
0.8
1.1
1.0
0.9
0.8
3
6
9
12
15
0
2
4
6
8
10
12
14
-40
0
40
80
120
VCC [V]
TEMPERATURE [℃]
VCC [V]
Fig.8. fosc
voltage property
Fig.6. VREG
output power supply property
Fig.7. fosc
temperature property
3.50
0.25
0.20
0.15
0.10
0.05
0.00
500
400
300
200
100
600
500
400
300
200
100
0
Hysteresis width
ID=500mA
ID=500mA
3.30
3.10
2.90
2.70
2.50
UVLO release voltage
UVLO detection voltage
-40
0
40
80
120
-40
0
40
80
120
3
6
9
12
15
TEMPARATURE [℃]
VCC [V]
Environmental temperature Ta [°C]
Fig.9. UVLO
threshold temperature property
Fig.11. Nch FET ON resistance
power supply property
Fig.10. Nch FET ON resistance
temperature property
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Technical Note
BD8313HFN
800
1000
800
600
400
200
0
3.0
2.5
2.0
1.5
1.0
0.5
0.0
Ta=85℃
ID=500mA
ID=500mA
600
Ta=25℃
400
200
0
Ta=-25℃
0.0
1.0
2.0
-40
0
40
TEMPARATURE [℃]
80
120
3
6
9
12
15
VCC [V]
Io [A]
Fig.13. Pch FET ON resistance
power supply property
Fig.14.PchFET ON resistance
Io property [VCC=3.5V]
Fig.12. Pch FET ON resistance
temperature property
3.0
2.5
2.0
1.5
1.0
0.5
0.0
3.0
3.0
2.5
2.0
1.5
1.0
0.5
0.0
2.5
2.0
1.5
1.0
0.5
0.0
Ta=25℃
Ta=85℃
Ta=85℃
Ta=25℃
Ta=85℃
Ta=25℃
Ta=-25℃
Ta=-25℃
Ta=-25℃
0.0
1.0
2.0
0.0
1.0
2.0
0.0
1.0
2.0
Io [A]
Io [A]
Io [A]
Fig.17.PchFET ON resistance
Io property [VCC=5.0V]
Fig.16.PchFET ON resistance
Io property [VCC=4.5V]
Fig.15.PchFET ON resistance
Io property [VCC=4.0V]
1000
800
600
400
200
0
1000
800
600
400
200
0
2.5
ON
2.0
1.5
1.0
OFF
0
2
4
6
8
10
12
14
-50
0
50
100
150
-40
0
40
80
120
Ta [℃]
TEMPARATURE [℃]
VCC [V]
Fig.20. Circuit current
voltage property
Fig.18. STB
threshold temperature property
Fig.19. Circuit current
temperature property
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Technical Note
BD8313HFN
●Example of Application1
Input: 4.5 to 10 V, output: 3.3 V / 500mA
VBAT=4.5~10V
10μF
GRM31CBE106KA75L
(Murata)
GND
VCC
INV
ON/OFF
STB
10pF
1μF
GRM188B11A105KA61
(Murata)
PVCC
VREG
PGND
68k
3.3V/500mA
200k
Lx
4.7μH
1127AS4R7M(TOKO)
51k
1μF
GRM188B11A105KA61
(Murata)
22k
10μF
GRM31CB11A106KA01
(Murata)
Fig.21 Reference application diagram1
●Reference application data 1 (Example of application1)
3.50
3.45
3.40
3.35
3.30
3.25
3.20
3.15
3.10
3.05
3.00
100
80
VCC=4.5V
VCC=4.5V
VCC=5.5V
60
VCC=7.5V
VCC=5.5V
40
VCC=7.5V
20
0
1
10
100
1000
1
10
100
1000
OUTPUT CURRENT [mA]
OUTPUT CURRENT [mA]
Fig.23 Load regulation (VOUT = 3.3 V)
Fig.22 Power conversion efficiency (VOUT = 3.3 V)
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Technical Note
BD8313HFN
●Reference application data 2 (Input 4.5 V, 6.0 V, 8.4 V, 10 V, output 3.3 V ) (Example of application1)
60
40
180
120
60
60
40
180
60
40
180
120
60
Phase
Phase
Phase
120
60
20
20
20
0
0
0
0
0
0
Gain
Gain
Gain
-20
-40
-60
-60
-120
-180
-20
-40
-60
-60
-120
-180
-20
-40
-60
-60
-120
-180
100
1000
10000 100000 1000000
Frequency[Hz]
100
1000
10000 100000 1000000
Frequency[Hz]
100
1000
10000 100000 1000000
Frequency[Hz]
Fig.24 Frequency response 1
(VCC=4.5V, Io=250mA)
Fig.25 Frequency response 2
(VCC=6.0V, Io=250mA)
Fig.26 Frequency response 3
(VCC=8.4V, Io=250mA)
60
180
120
60
60
180
120
60
60
180
120
60
Phase
Phase
40
40
20
Phase
40
20
20
0
0
0
0
0
0
Gain
Gain
Gain
-20
-40
-60
-60
-120
-180
-20
-40
-60
-60
-120
-180
-20
-40
-60
-60
-120
-180
100
1000
10000 100000 1000000
Frequency[Hz]
100
1000
10000 100000 1000000
Frequency[Hz]
100
1000
10000 100000 1000000
Frequency[Hz]
Fig.27 Frequency response 4
(VCC=10V, Io=250mA)
Fig.28 Frequency response 5
(VCC=4.5V, Io=500mA)
Fig.29 Frequency response 6
(VCC=6.0V, Io=500mA)
60
180
120
60
60
40
20
0
180
120
60
Phase
Phase
40
20
0
0
0
Gain
Gain
-20
-40
-60
-60
-120
-180
-20
-40
-60
-60
-120
-180
100
1000
10000 100000 1000000
Frequency[Hz]
100
1000
10000 100000 1000000
Frequency[Hz]
Fig.30 Frequency response 7
(VCC=8.4V, Io=500mA)
Fig.31 Frequency response 8
(VCC=10V, Io=500mA)
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Technical Note
BD8313HFN
●Example of application2 input4.5 to 12V, output1.2V / 500mA
VBAT=4.5~ 12V
10µF
GRM31CB31E106KA75L
(Murata)
GND
INV
100O
ON/OFF
STB
VCC
10pF
1µF
GRM188B11A105KA61
PVCC
VREG
( Murata)
68kO
3.3V/500mA
560kO
PGND
Lx
1µF
4.7µH
20kO
GRM188B11A105KA61
( Murata)
NR4012-4R7M
(Taiyo yuden)
100kO
10µF 2para
GRM31CB11A106KA01
( Murata)
Fig.32 Reference application diagram2
●Reference application data 1 (Example of application2)
100
80
60
40
20
0
1.36
1.30
1.24
1.18
1.12
1.06
1.00
VCC=7.4V
VCC=5.0V
VCC=7.4V
VCC=5.0V
VCC=12V
VCC=12V
1
10
100
1000
1
10
100
1000
OUTPUT CURRENT [mA]
OUTPUT CURRENT [mA]
Fig.33 Power conversion efficiency
(VOUT = 1.2 V)
Fig.34 Load regulation
(VOUT = 1.2 V)
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Technical Note
BD8313HFN
●Reference application data 2(input5.0V, 7.4V, 10V output1.2V )Example of application(2)
60
40
180
120
60
60
40
20
0
180
120
60
60
40
20
0
180
120
60
Phase
Phase
Phase
20
Gain
0
0
0
0
Gain
Gain
-20
-40
-60
-60
-120
-180
-20
-40
-60
-60
-120
-180
-20
-40
-60
-60
-120
-180
100
1000
10000
100000 1000000
100
1000
10000
100000 1000000
100
1000
10000 100000 1000000
Frequency [Hz]
Frequency [Hz]
Frequency [Hz]
Fig.35 Frequency response 1
(VCC=5.0V, Io=100mA)
Fig.36 Frequency response 2
(VCC=5.0V, Io=300mA)
Fig.37 Frequency response 3
(VCC=5.0V, Io=900mA)
60
40
20
0
180
60
40
20
0
180
120
60
60
40
20
0
180
Phase
Phase
120
60
Phase
120
60
0
0
0
Gain
Gain
Gain
-20
-40
-60
-60
-120
-180
-20
-40
-60
-60
-120
-180
-20
-40
-60
-60
-120
-180
100
1000
10000 100000 1000000
Frequency [Hz]
100
1000
10000
100000 1000000
100
1000
10000
100000 1000000
Frequency [Hz]
Frequency [Hz]
Fig.40 Frequency response 6
(VCC=7.4V, Io=900mA)
Fig.38 Frequency response 4
(VCC=7.4V, Io=100mA)
Fig.39 Frequency response 5
(VCC=7.4V, Io=300mA)
60
40
20
0
180
120
60
60
180
120
60
60
40
20
0
180
120
60
Phase
Phase
40
20
Phase
0
0
0
Gain
0
Gain
Gain
-20
-40
-60
-60
-120
-180
-20
-40
-60
-60
-120
-180
-20
-40
-60
-60
-120
-180
100
1000
10000
100000 1000000
100
1000
10000
100000 1000000
100
1000
10000
100000 1000000
Frequency [Hz]
Frequency [Hz]
Frequency [Hz]
Fig.41 Frequency response 7
(VCC=10V, Io=100mA)
Fig.42 Frequency response 8
(VCC=10V, Io=300mA)
Fig.43 Frequency response 9
(VCC=10V, Io=900mA)
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Technical Note
BD8313HFN
20usec/Div
20usec/Div
20usec/Div
Vout(20m/Div)
Vout(20m/Div)
Vout(20m/Div)
9.2mVpp
24.4mVpp
38.4mVpp
Fig.44 Output ripple 1
(VCC=12V, Io=40mA)
Fig.45 Output ripple 2
(VCC=12V, Io=100mA)
Fig.46 Output ripple 3
(VCC=12V, Io=140mA)
20usec/Div
20usec/Div
Vout(20m/Div)
Vout(20m/Div)
10.4mVpp
14.8mVpp
Fig.47 Output ripple 4
(VCC=12V, Io=170mA)
Fig.48 Output ripple 5
(VCC=12V, Io=900mA)
●Output ripple voltage
0.75
SLOPE
BD8313HFN is controlled by PWM(Pulse Width
Modulation)mode.
PWM output made by comparison SLOPE with FB(error amp
output) controls switching of IC under the PWM mode.
When FB level is completely lower than SLOPE level, DC/DC
converter switches as non- synchronous step-down switching
mode not to make output voltage level drop quickly caused by
full ON state of Low side Nch FET.
FB
0.25
PWMoutput
Ripple voltage of output voltage in non-synchronous mode is
larger than that in synchronous mode.
When voltage difference between input and output voltage is large and output current is small, DCDC converter switches as
this non-synchronous mode then ripple voltage of output voltage could be large.
In the reference data above ( output ripple 1 to 4 ), ripple voltage at 12V input 1.2V output , output current is smaller than
100mA is larger than other region.
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Technical Note
BD8313HFN
●Reference board pattern
VOUT
Lx
VBAT
GND
The radiation plate on the rear should be a GND flat surface of low impedance in common with the PGND flat surface.
It is recommended to install a GND pin in another system as shown in the drawing without connecting it directly to this PNGD.
Produce as wide a pattern as possible for the VBAT, Lx and PGND lines in which large current flows.
●Selection of Part for Applications
(1) Inductor
A shielded inductor that satisfies the current rating
(current value, Ipecac as shown in the drawing below)
and has a low DCR (direct resistance component) is recommended.
ΔIL
Inductor values affect inductor ripple current, which will cause output ripple.
Ripple current can be reduced as the coil L value becomes larger and the
switching frequency becomes higher.
Fig.49 Inductor current
Ipeak =Iout + ⊿IL/2 [A]
・・・(1)
Vin-Vout
1
f
Vout
Vin
⊿IL=
×
×
[A]
・・・(2)
L
(η: Efficiency, ⊿IL: Output ripple current, f: Switching frequency)
As a guide, inductor ripple current should be set at about 20 to 50% of the maximum input current.
*Current over the coil rating flowing in the coil brings the coil into magnetic saturation, which may lead to lower efficiency
or output oscillation. Select an inductor with an adequate margin so that the peak current does not exceed the rated
current of the coil.
(2) Output capacitor
A ceramic capacitor with low ESR is recommended for output in order to reduce output ripple.
There must be an adequate margin between the maximum rating and output voltage of the capacitor, taking the DC bias
property into consideration.
Output ripple voltage is acquired by the following equation.
1
Vpp=⊿IL×
+ ⊿IL×RESR [V]
・・・(3)
2π×f×Co
Setting must be performed so that output ripple is within the allowable ripple voltage.
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Technical Note
BD8313HFN
(3) Output voltage setting
The internal standard voltage of the ERROR AMP is 1.0 V. Output voltage is acquired by Equation (4).
VOUT
ERROR AMP
R1
R2
(R1+R2)
R2
INV
Vo=
×1.0 [V] ・・・ (4)
VREF
1.0V
Fig.50 Setting of voltage feedback resistance
(4) DC/DC converter frequency response adjustment system
Condition for stable application
The condition for feedback system stability under negative feedback is that the phase delay is 135 °or less when gain is 1
(0dB).
Since DC/DC converter application is sampled according to the switching frequency, the bandwidth GBW of the whole
system (frequency at which gain is 0 dB) must be controlled to be equal to or lower than 1/10 of the switching frequency.
In summary, the conditions necessary for the DC/DC converter are:
-
-
Phase delay must be 135°or lower when gain is 1 (0 dB).
Bandwidth GBW (frequency when gain is 0 dB) must be equal to or lower than 1/10 of the switching frequency.
To satisfy those two points, R1, R2, R3, DS and RS in Fig. 51 should be set as follows.
VOUT
[1] R1, R2, R3
Inside of IC
R4 C2
BD8313HFN incorporates phase compensation devices of
R4=62kΩ and C2=200pF. These C2 and R1, R2, and R3 values
decide the primary pole that determines the bandwidth of DC/DC
converter.
Cs
Rs
R1
R2
FB
Primary pole point frequency
R3
1
fp=
R1×R2
・・・・(1)
2π A×(
+R3)×C2
R1+R2
Fig.51 Example of phase
compensation setting
DC/DC converter DC Gain
A: Error AMP Gain
About 100dB = 105
VIN
VO
1
DC Gain =A×
×
・・・・(2)
B: Oscillator amplification = 0.5
VIN: Input voltage
OUT: Output voltage
B
V
By Equations (1) and (2), the frequency fsw of point 0 dB under limitation of the bandwidth of the DC gain at the primary
pole point is as shown below.
1
VIN
VO
1
fSW = fp×DC Gain =
×
×
・・・・(3)
(R1 R2)
・
B
2πC2×(
+R3 )
(R1+R2)
It is recommended that fsw should be approx.10 kHz. When load response is difficult, it may be set at approx. 20 kHz.
By Equation (3), R1 and R2, which determine the voltage value, will be in the order of several hundred kΩ. If an
appropriate resistance value is not available since the resistance is so high and routing may cause noise, the use of R3
enables easy setting.
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Technical Note
BD8313HFN
[2] Cs and Rs setting
For DC/DC converter, the 2nd dimension pole point is caused by the coil and capacitor as expressed by the following
equation.
1
・・・・(4)
fLC=
2π√(LC)
This secondary pole causes a phase rotation of 180°. To secure the stability of the system, put a zero point in 2 places to
perform compensation.
1
・・・・(5)
Zero point by built-in CR
Zero point by Cs
fZ1=
fZ1=
= 13kHz
2πR4C2
1
・・・・(6)
2π(R1+R3)CS
Setting fZ2 to be half to 2 times a frequency as large as fLC provides an appropriate phase margin.
It is desirable to set Rs at about 1/20 of (R1+R3) to cancel any phase boosting at high frequencies.
Those pole points are summarized in the figure below. The actual frequency property is different from the ideal
calculation because of part constants. If possible, check the phase margin with a frequency analyzer or network analyzer.
Otherwise, check for the presence or absence of ringing by load response waveform and also check for the presence or
absence of oscillation under a load of an adequate margin.
(5) (6)
(3)
(4)
Fig.52 Example of DC/DC converter frequency property
(Measured with FRA5097 by NF Corporation)
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Technical Note
BD8313HFN
●I/O Equivalence Circuit
STB
INV
VCC
VCC
VREG
STB
INV
Lx, PGND, PVCC
VREG
VCC
VCC
PVCC
VREG
Lx
PGND
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Technical Note
BD8313HFN
●Ordering part number
1) Absolute Maximum Rating
We dedicate much attention to the quality control of these products, however the possibility of deterioration or destruction exists
if the impressed voltage, operating temperature range, etc., exceed the absolute maximum ratings. In addition, it is impossible to
predict all destructive situations such as short-circuit modes, open circuit modes, etc. If a special mode exceeding the absolute
maximum rating is expected, please review matters and provide physical safety means such as fuses, etc.
2) GND Potential
Keep the potential of the GND pin below the minimum potential at all times.
3) Thermal Design
Work out the thermal design with sufficient margin taking power dissipation (Pd) in the actual operation condition into account.
4) Short Circuit between Pins and Incorrect Mounting
Attention to IC direction or displacement is required when installing the IC on a PCB. If the IC is installed in the wrong way,
it may break. Also, the threat of destruction from short-circuits exists if foreign matter invades between outputs or the
output and GND of the power supply.
5) Operation under Strong Electromagnetic Field
Be careful of possible malfunctions under strong electromagnetic fields.
6) Common Impedance
When providing a power supply and GND wirings, show sufficient consideration for lowering common impedance and
reducing ripple (i.e., using thick short wiring, cutting ripple down by LC, etc.) as much as you can.
7) Thermal Protection Circuit (TSD Circuit)
BD8313HFN contains a thermal protection circuit (TSD circuit). The TSD circuit serves to shut off the IC from thermal
runaway and does not aim to protect or assure operation of the IC itself. Therefore, do not use the TSD circuit for
continuous use or operation after the circuit has tripped.
8) Rush Current at the Time of Power Activation
Be careful of the power supply coupling capacity and the width of the power supply and GND pattern wiring and routing since
rush current flows instantaneously at the time of power activation in the case of CMOS IC or ICs with multiple power supplies.
9) IC Terminal Input
This is a monolithic IC and has P+ isolation and a P substrate for element isolation between each element. P-N junctions
are formed and various parasitic elements are configured using these P layers and N layers of the individual elements.
For example, if a resistor and transistor are connected to a terminal as shown on Fig.53:
○ The P-N junction operates as a parasitic diode when GND > (Terminal A) in the case of a resistor or when GND >
(Terminal B) in the case of a transistor (NPN)
○ Also, a parasitic NPN transistor operates using the N layer of another element adjacent to the previous diode in the
case of a transistor (NPN) when GND > (Terminal B).
The parasitic element consequently rises under the potential relationship because of the IC’s structure. The parasitic
element pulls interference that could cause malfunctions or destruction out of the circuit. Therefore, use caution to avoid
the operation of parasitic elements caused by applying voltage to an input terminal lower than the GND (P board), etc.
Transistor (NPN)
Resistor
B
(Pin B)
E
C
(Pin A)
GND
N
(Pin A)
P+
P+
P
P+
P+
P
N
N
N
N
N
N
Parasitic Element
P Substrate
GND
P Substrate
Parasitic Element
Parasitic Element
GND
Fig.53 Example of simple structure of Bipolar IC
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Technical Note
BD8313HFN
●Ordering part number
B D
8
3
1
3
H F
N
-
T R
Part No.
Part No.
Package
Packaging and forming specification
TR: Embossed tape and reel
HFN:HSON8
HSON8
<Tape and Reel information>
2.9 0.1
(0.05)
(2.2)
Tape
Embossed carrier tape
3000pcs
(MAX 3.1 include BURR)
Quantity
0.475
8 7 6 5
TR
5 6 7 8
4 3 2 1
Direction
of feed
The direction is the 1pin of product is at the upper right when you hold
reel on the left hand and you pull out the tape on the right hand
(
)
+0.1
–0.05
0.13
1 2 3 4
1pin
1PIN MARK
S
0.1
S
0.65
0.32 0.1
M
0.08
Direction of feed
Order quantity needs to be multiple of the minimum quantity.
Reel
(Unit : mm)
∗
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© 2011 ROHM Co., Ltd. All rights reserved.
Notice
N o t e s
No copying or reproduction of this document, in part or in whole, is permitted without the
consent of ROHM Co.,Ltd.
The content specified herein is subject to change for improvement without notice.
The content specified herein is for the purpose of introducing ROHM's products (hereinafter
"Products"). If you wish to use any such Product, please be sure to refer to the specifications,
which can be obtained from ROHM upon request.
Examples of application circuits, circuit constants and any other information contained herein
illustrate the standard usage and operations of the Products. The peripheral conditions must
be taken into account when designing circuits for mass production.
Great care was taken in ensuring the accuracy of the information specified in this document.
However, should you incur any damage arising from any inaccuracy or misprint of such
information, ROHM shall bear no responsibility for such damage.
The technical information specified herein is intended only to show the typical functions of and
examples of application circuits for the Products. ROHM does not grant you, explicitly or
implicitly, any license to use or exercise intellectual property or other rights held by ROHM and
other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the
use of such technical information.
The Products specified in this document are intended to be used with general-use electronic
equipment or devices (such as audio visual equipment, office-automation equipment, commu-
nication devices, electronic appliances and amusement devices).
The Products specified in this document are not designed to be radiation tolerant.
While ROHM always makes efforts to enhance the quality and reliability of its Products, a
Product may fail or malfunction for a variety of reasons.
Please be sure to implement in your equipment using the Products safety measures to guard
against the possibility of physical injury, fire or any other damage caused in the event of the
failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM
shall bear no responsibility whatsoever for your use of any Product outside of the prescribed
scope or not in accordance with the instruction manual.
The Products are not designed or manufactured to be used with any equipment, device or
system which requires an extremely high level of reliability the failure or malfunction of which
may result in a direct threat to human life or create a risk of human injury (such as a medical
instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel-
controller or other safety device). ROHM shall bear no responsibility in any way for use of any
of the Products for the above special purposes. If a Product is intended to be used for any
such special purpose, please contact a ROHM sales representative before purchasing.
If you intend to export or ship overseas any Product or technology specified herein that may
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More detail product informations and catalogs are available, please contact us.
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