BD83812EFV-M (新产品) [ROHM]
BD83812EFV-M是一款串行输入并行输出控制的LED驱动器,可根据三线串行数据来控制12通道开漏输出的ON/OFF。采用小型封装,非常有助于节省空间。;型号: | BD83812EFV-M (新产品) |
厂家: | ROHM |
描述: | BD83812EFV-M是一款串行输入并行输出控制的LED驱动器,可根据三线串行数据来控制12通道开漏输出的ON/OFF。采用小型封装,非常有助于节省空间。 驱动 驱动器 |
文件: | 总21页 (文件大小:1010K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Datasheet
Serial-in Parallel-out LED Driver
12 ch LED Driver IC for Automotive
with 3-line Serial Interface
BD83812EFV-M
General Description
Key Specifications
The BD83812EFV-M is a serial-in parallel-out controlled
LED driver.
With the input of 3-line serial data, it turns the 12 ch open
drain output on/off.
◼
◼
◼
◼
Input Voltage Range:
Output Voltage Range:
DC Output Current 1 (VBAT < 25 V) : 50 mA (Max)
DC Output Current 2 (25 V ≤ VBAT ≤ 35 V) :
30 mA (Max)
3.0 V to 5.5 V
35 V (Max)
Due to its compact size, it is optimal for small space.
◼
◼
◼
Output ON Resistance 1:
Static Current:
Operating Temperature Range: -40 °C to +125 °C
6 Ω (Typ)
0 μA (Typ)
Features
◼ AEC-Q100 Qualified(Note 1)
◼ Open Drain Output
Package
HTSSOP-B20
W (Typ) x D (Typ) x H (Max)
◼ 3-line Serial Control + Enable Signal
◼ Cascade Connection Compatible
◼ HTSSOP-B20 Package
◼ Internal 12 ch Power Transistor
◼ Output Slew Rate 20 V/μs (Typ)
6.5 mm x 6.4 mm x 1.0 mm
(for Low EMC Noise)
(Note 1) Grade 1
Application
◼ For Indicator of Cluster Panel
Typical Application Circuit
VBAT
VCC
VCC
D0
D1
D2
D3
D4
D5
D6
・
・
・
D10
D11
OEN_B
LATCH
RST_B
CLK
Micro
Computer
SERIN
SEROUT
GND
VCC
VCC
D0
D1
D2
D3
D4
D5
D6
OEN_B
LATCH
RST_B
CLK
SERIN
SEROUT
GND
・
・
・
D10
D11
VBAT:Battery
〇Product structure : Silicon integrated circuit 〇This product has no designed protection against radioactive rays.
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BD83812EFV-M
Pin Configuration
(TOP VIEW)
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
VCC
SERIN
D0
GND
CLK
D11
D10
D9
D1
D2
D3
D8
D4
D7
D5
D6
EXP-PAD
RST_B
OEN_B
LATCH
SEROUT
Pin Descriptions
Pin Name
Function
Pin No.
1
2
3
4
5
6
7
8
VCC
SERIN
D0
Power supply voltage input pin
Serial data input pin
Drain output pin 0
D1
Drain output pin 1
D2
Drain output pin 2
D3
Drain output pin 3
D4
Drain output pin 4
D5
Drain output pin 5
Reset invert input pin
(Low: Shift register data 0)
9
RST_B
Output enable input pin
(High: Output OFF)
10
11
12
OEN_B
SEROUT
LATCH
Serial data output pin
Latch signal input pin
(High: Data latch)
13
14
15
16
17
18
19
20
-
D6
D7
Drain output pin 6
Drain output pin 7
Drain output pin 8
Drain output pin 9
Drain output pin 10
Drain output pin 11
Clock input pin
D8
D9
D10
D11
CLK
GND
EXP-PAD
GND pin
The EXP-PAD is connected to GND.
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BD83812EFV-M
Block Diagram
VCC
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
SERIN
CLK
SEROUT
LATCH
RST_B
OEN_B
GND
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BD83812EFV-M
Description of Functions
If there is no description, please refer as typical value.
1
Serial Communication
The serial I/F is composed of a shift register which changes the CLK and SERIN serial signals to parallel signals, and a
register to store those signals with a LATCH signal. The registers are reset by applying a voltage VTL or below to the
RST_B pin, and D11 to D0 become open. To prevent erroneous LED lighting, apply voltage VTL or below to the RST_B
pin during start-up.
CLK
12 bit
12 bit
Shift
Register
Driver
SERIN
LATCH
Register
Figure 1. Block Diagram of Serial Communication
1.1 Serial Communication Timing
The 12 bit serial data input from the SERIN pin is taken into the shift register by the rising edge of the signal input to
the CLK pin, and is recorded in the register by the rising edge of the signal input to the LATCH pin.
The recorded data is valid until the rising edge of the next input LATCH signal.
1.2 Serial Communication Data
The configuration of the serial data input to the SERIN pin is shown below:
First →
→ Last
d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0
Data
Data
Output
Condition
Pin
d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0
ON
OFF
ON
OFF
ON
OFF
ON
OFF
1
0
*
*
*
*
*
*
*
*
1
0
*
*
*
*
*
*
*
*
*
*
*
*
*
1
0
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
D11
D10
D9
*
1
0
*
D8
*
…
…
…
…
…
…
…
…
…
…
…
…
…
…
ON
OFF
ON
OFF
ON
OFF
ON
OFF
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
1
0
*
*
*
*
*
*
*
*
1
0
*
*
*
*
*
*
*
*
*
*
*
*
*
1
0
D3
D2
D1
D0
*
1
0
*
*
* Indicate Don’t care.
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BD83812EFV-M
1
Serial Communication - continued
1.3 Enable Signal
By applying voltage VTH or more to the OEN_B pin, D11 to D0 become open forcibly.
Also, by the PWM input to the OEN_B pin, all outputs can be PWM output at the same time.
VIH
L
H
OEN_B
VTL
(Input)
VBAT
VOL
LED OFF
LED ON
LED ON
D11 to D0
(Output)
ON
ILED
LED OFF
OFF
Figure 2. PWM Dimming Control
1.4 SEROUT
A cascade connection can be made (connecting at least 2 or more IC’s in serial). Serial signal input from the SERIN
pin is transferred into the receiver IC by the falling edge of the CLK signal. Therefore, the setup time for the rising
edge of the CLK signal of the receiver IC increases, and the reliability of the cascade connection function increases
when using the same CLK signal as the sender IC.
LATCH
SERIN
CLK
d11 d10
d9
d8
d7
d6
d5
d4
d3
d2
d1
d0
1
2
3
4
5
6
7
8
9
10
11
12
d11
SEROUT
Figure 3. SEROUT Output Signal
2
Cascade Connection
As an application, BD83812EFV-M can turn on 13 or more LED lights. By making a cascade connection between 2 ICs,
the LED application of up to 24 lights can be constructed. In this case, the SEROUT pin of the sender IC is connected
the SERIN pin of the receiver IC. When sending 24 bit signal to the sender IC, the input serial data is sent to the receiver
IC from the SEROUT pin of the sender IC. In addition, it is possible to construct 3 or more applications.
Receiver IC
Sender IC
LATCH
SERIN
CLK
d23 d22 d21
d14
d13 d12 d11 d10
d9
d2
d1
d0
10
1
2
3
11
12
13
14
15
22
23
24
Figure 4. Cascade Connection
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BD83812EFV-M
Absolute Maximum Ratings(Ta = 25 °C)
Parameter
Symbol
VCC
Rating
Unit
V
Power Supply Voltage
-0.3 to +7
VD0, VD1,
VD2, VD3,
VD4, VD5,
VD6, VD7
VD8, VD9,
VD10, VD11
Output Pin Voltage
(D0, D1, D2, D3, D4, D5, D6, D7, D8, D9, D10, D11)
-0.3 to +40
V
V
VSERIN
VRST_B
VCLK
VOEN_B
,
,
Pin Voltage
(SERIN, RST_B, CLK, OEN_B, LATCH)
,
-0.3 to +VCC
,
VLATCH
SEROUT Pin Voltage
VSEROUT
-0.3 to +VCC
V
Storage Temperature Range
Tstg
-55 to +150
°C
DC Output Maximum Current 1 (VBAT < 25 V)
DC Output Maximum Current 2 (25 V ≤ VBAT ≤ 35 V)
Maximum Junction Temperature
IOMAX1DC
IOMAX2DC
Tjmax
50
30
mA
mA
°C
150
Caution 1: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is
operated over the absolute maximum ratings.
Caution 2: Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the
properties of the chip. In case of exceeding this absolute maximum rating, design a PCB with thermal resistance taken into consideration by
increasing board size and copper area so as not to exceed the maximum junction temperature rating.
Thermal Resistance(Note 1)
Thermal Resistance (Typ)
Parameter
Symbol
Unit
1s(Note 3)
2s2p(Note 4)
HTSSOP-B20
Junction to Ambient
Junction to Top Characterization Parameter(Note 2)
θJA
105.8
19
33.0
5
°C/W
°C/W
ΨJT
(Note 1) Based on JESD51-2A (Still-Air). The BD83812EFV-M chip is used.
(Note 2) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside
surface of the component package.
(Note 3) Using a PCB board based on JESD51-3.
(Note 4) Using a PCB board based on JESD51-5, 7.
Layer Number of
Measurement Board
Material
Board Size
Single
FR-4
114.3 mm x 76.2 mm x 1.57 mmt
Top
Copper Pattern
Thickness
70 μm
Footprints and Traces
Layer Number of
Measurement Board
Thermal Via(Note 5)
Material
Board Size
114.3 mm x 76.2 mm x 1.6 mmt
2 Internal Layers
Pitch
Diameter
4 Layers
FR-4
1.20 mm
Φ0.30 mm
Top
Copper Pattern
Bottom
Thickness
70 μm
Copper Pattern
Thickness
Copper Pattern
Thickness
70 μm
Footprints and Traces
74.2 mm x 74.2 mm
35 μm
74.2 mm x 74.2 mm
(Note 5) This thermal via connect with the copper pattern of layers 1,2, and 4. The placement and dimensions obey a land pattern.
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BD83812EFV-M
Recommended Operating Conditions
Parameter
Symbol
Min
Typ
Max
Unit
Power Supply Voltage
VCC
VDN
3.0
-
-
-
-
-
5.5
35
V
V
Output Pin Voltage
-
-
DC Output Current 1 (VBAT < 25 V)
DC Output Current 2 (25 V ≤ VBAT ≤ 35 V)
Operating Temperature
IO1DC
IO2DC
Topr
50
mA
mA
°C
-
30
-40
+125
Electrical Characteristics(Unless otherwise specified VCC = 3.0 V to 5.5 V, Ta = -40 °C to +125 °C)
Limit
Parameter
Output D0 to D11
Symbol
Unit
Condition
Min
Typ
Max
ON Resistance 1(Note 1)
ON Resistance 2(Note 1)
Output Leakage Current(Note 2)
Logic Input
RON1
RON2
IDL
-
-
-
6
9
-
12
18
Ω
Ω
IDN = 20 mA, VCC = 4.5 V to 5.5 V
IDN = 20 mA, VCC = 3.0 V to 4.5 V
VDN = 35 V
0.3
μA
VCC
x 0.7
Upper Limit Threshold Voltage
Bottom Limit Threshold Voltage
Serial Clock Frequency
Input Leakage Current Low
Input Leakage Current High
Whole
VTH
VTL
-
-
-
V
V
VCC
x 0.2
-
-
fCLK
IINLL
IINLH
-
1.25
MHz
μA
μA
-5
-
0
0
-
VTL = 0 V
VTH = 5 V
5
Serial Data Input,
VCC = 5 V, fCLK = 500 kHz,
VTH = VCC, VTL = 0 V,
SEROUT = OPEN
Circuit Current
ICC
-
-
0.05
0
1.00
50
mA
μA
Static Current
ISTN
SEROUT = OPEN
SEROUT
Output Voltage High 1(Note 3)
Output Voltage Low 1(Note 3)
Output Voltage High 2(Note 3)
Output Voltage Low 2(Note 3)
VOH1
VOL1
VOH2
VOL2
4.6
-
4.8
0.2
3.0
0.3
-
V
V
V
V
VCC = 5 V, ISO = -4 mA
VCC = 5 V, ISO = 4 mA
VCC = 3.3 V, ISO = -4 mA
VCC = 3.3 V, ISO = 4 mA
0.4
-
2.7
-
0.6
(Note 1) IDN: Current flowing to the output DN pin. (N: 0 to 11)
(Note 2) VDN: Output DN pin voltage. (N: 0 to 11)
(Note 3) ISO: Current flowing to the SEROUT pin.
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BD83812EFV-M
Typical Performance Curves
50
40
30
20
10
0
50
3.0 V
3.3 V
3.6 V
4.5 V
5.0 V
5.5 V
-40 ˚C
+25 ˚C
40
+125 ˚C
30
20
10
0
-40 -20
0
20
40
60
80 100 120
0.0
1.0
2.0
3.0
4.0
5.0
Temperature : Ta [°C]
Power Supply Voltage : VCC [V]
Figure 5. Circuit Current vs Power Supply Voltage
(Serial Data Input condition)
Figure 6. Circuit Current vs Temperature
(Serial Data Input condition)
14
14
12
10
8
-40 ˚C
3.0 V
12
+25 ˚C
3.3 V
3.6 V
4.5 V
5.0 V
5.5 V
+125 ˚C
10
8
6
4
2
0
6
4
2
0
-40 -20
0
20
40
60
80 100 120
3.0
3.5
4.0
4.5
5.0
5.5
Temperature : Ta [°C]
Power Supply Voltage : VCC [V]
Figure 7. ON Resistance vs
Power Supply Voltage
(@IDN = 20 mA)
Figure 8. ON Resistance vs Temperature
(@IDN = 20 mA)
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BD83812EFV-M
Typical Performance Curves - continued
6.0
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
-40 ˚C
3.0 V
3.3 V
3.6 V
4.5 V
5.0 V
5.5 V
5.5
+25 ˚C
5.0
+125 ˚C
4.5
4.0
3.5
3.0
2.5
2.0
1.5
-40 -20
0
20
40
60
80 100 120
3.0
3.5
4.0
4.5
5.0
5.5
Temperature : Ta [°C]
Power Supply Voltage : VCC [V]
Figure 9. Output Voltage High vs
Power Supply Voltage
(@ISO = -4 mA)
Figure 10. Output Voltage High vs Temperature
(@ISO = -4 mA)
600
550
500
450
400
350
600
-40 ˚C
3.0 V
3.3 V
3.6 V
4.5 V
5.0 V
5.5 V
550
500
450
400
350
300
250
200
150
100
50
+25 ˚C
+125 ˚C
300
250
200
150
100
50
0
0
-40 -20
0
20
40
60
80 100 120
3.0
3.5
4.0
4.5
5.0
5.5
Temperature : Ta [°C]
Power Supply Voltage : VCC [V]
Figure 11. Output Voltage Low vs
Power Supply Voltage
(@ISO = 4 mA)
Figure 12. Output Voltage Low vs Temperature
(@ISO = 4 mA)
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BD83812EFV-M
Timing Chart of Input Signal
tCK
CLK
50 %
tCKH
tCKL
tSEHD
tSEST
SERIN
50 %
tLADZ
tLAH
LATCH
50 %
Figure 13. Timing Chart of Input Signal
Parameter
CLK Period
Symbol
tCK
Min
Unit
ns
ns
ns
ns
ns
ns
ns
ns
800
380
380
780
150
150
380
200
CLK High Pulse Width
CLK Low Pulse Width
tCKH
tCKL
SERIN High and Low Pulse Width
SERIN Setup Time
tSEW
tSEST
tSEHD
tLAH
SERIN Hold Time
LATCH High Pulse Time
Output DN Pin Setup Time(Note 1)
tLADZ
(Note 1) N: 0 to 11
Table 1. Timing Rules of Input Signal (Ta = -40 °C to +125 °C, VCC = 3.0 V to 5.5 V)
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BD83812EFV-M
Timing Chart of Output Signal
50 %
OEN_B
tDOENH
tDOENL
90 %
50 %
OUTPUT
10 %
SRFALL
(D0 to D11)
SRRISE
50 %
tDLAH
LATCH
50 %
OUTPUT
(D0 to D11)
CLK
50 %
tDSOL
tDSOH
50 %
SEROUT
Figure 14. Timing Chart of Output Signal
Parameter
Symbol
tDOENH
tDOENL
tDLAH
Min
Typ
Max
3000
2000
3000
350
350
-
Unit
Condition
OEN_B Switching Time (Low→High)
OEN_B Switching Time (High→Low)
LATCH Switching Delay Time
-
-
-
-
-
-
-
-
-
ns
ns
-
ns
SEROUT Propagation Delay Time
tDSOH
-
ns
(Low→High)
SEROUT Propagation Delay Time
tDSOL
-
ns
(High→Low)
Ta = 25 °C, VCC = 5 V,
RL = 500 Ω, VBAT = 10 V
Output Rising Slew Rate(Note 1)
Output Falling Slew Rate(Note 1)
SRRISE
SRFALL
20
20
V/μs
V/μs
Ta = 25 °C, VCC = 5 V,
RL = 500 Ω, VBAT = 10 V
-
(Note 1) Refer to the Application Example on page 12 for measurement conditions. However, LED load is not used, and it is shorted.
Table 2. Delay Time of Output Signal (Ta = -40 °C to +125 °C, VCC = 3.0 V to 5.5 V)
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BD83812EFV-M
Application Example
CVBAT
CVCC1
RL RL RL RL RL RL RL RL RL RL RL
RL
VBAT
VCC
VCC
D0
D1
D2
D3
D4
D5
D6
・
・
・
D10
D11
OEN_B
LATCH
RST_B
CLK
Micro
Computer
SERIN
SEROUT
GND
VCC
RL RL RL RL RL RL RL RL RL RL RL RL
CVCC2
VCC
D0
D1
D2
D3
D4
D5
D6
OEN_B
LATCH
RST_B
CLK
SERIN
SEROUT
GND
・
・
・
D10
D11
VBAT:Battery
Figure 15. Application Example
Component Name
Component Value
0.1 μF
Product Name
Manufacturer
murata
CVCC1
CVCC2
CVBAT
RL
GCM155R11A104KA01
GCM155R11A104KA01
GCM32ER71H475KA40
ESR10EZPJ621
0.1 μF
murata
4.7 μF
murata
620 Ω
Rohm
Caution: When adding elements other than LEDs and resistors to the output DN pin for in-process inspection, care must be taken in the power-on
sequence. Therefore, Inquire the application circuit. Also, be sure to limit the current by resistance to the output DN pin. (N: 0 to 11)
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BD83812EFV-M
I/O Equivalence Circuit
3. D0
7. D4
15. D8
4. D1
8. D5
16. D9
5. D2
13. D6
17. D10
6. D3
14. D7
18. D11
2. SERIN
12. LATCH
9. RST_B
19. CLK
10. OEN_B
VCC
11. SEROUT
1. VCC
20. GND
VCC
VCC
GND
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18.Mar.2022 Rev.001
BD83812EFV-M
Operational Notes
1.
2.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power
supply pins.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at
all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic
capacitors.
3.
4.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.
6.
Recommended Operating Conditions
The function and operation of the IC are guaranteed within the range specified by the recommended operating
conditions. The characteristic values are guaranteed only under the conditions of each item specified by the electrical
characteristics.
Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow
instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power
supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and
routing of connections.
7.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply
should always be turned off completely before connecting or removing it from the test setup during the inspection
process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during
transport and storage.
8.
9.
Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and
cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the
power supply or ground line.
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18.Mar.2022 Rev.001
BD83812EFV-M
Operational Notes - continued
10. Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be
avoided.
Resistor
Transistor (NPN)
Pin A
Pin B
Pin B
B
E
C
Pin A
B
C
E
P
P+
P+
N
P+
P
P+
N
N
N
N
N
N
N
Parasitic
Elements
Parasitic
Elements
P Substrate
GND GND
P Substrate
GND
GND
Parasitic
Elements
Parasitic
Elements
N Region
close-by
Figure 16. Example of monolithic IC structure
11. Ceramic Capacitor
When using a ceramic capacitor, determine a capacitance value considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
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TSZ22111 • 15 • 001
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18.Mar.2022 Rev.001
BD83812EFV-M
Ordering Information
B D 8
3
8
1
2 E F V
-
M E 2
Package
Product rank
EFV: HTSSOP-B20
M: for Automotive
Packaging and forming specification
E2: Embossed tape and reel
Marking Diagram
HTSSOP-B20 (TOP VIEW)
Part Number Marking
LOT Number
D83812
Pin 1 Mark
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TSZ22111 • 15 • 001
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16/18
BD83812EFV-M
Physical Dimension and Packing Information
Package Name
HTSSOP-B20
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18.Mar.2022 Rev.001
BD83812EFV-M
Revision History
Date
Rev.
001
Changes
18.Mar.2022
New Release
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Notice
Precaution on using ROHM Products
(Note 1)
1. If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment
,
aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,
bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales
representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any
ROHM’s Products for Specific Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅣ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅢ
2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3. Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.
Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the
use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our
Products under any special or extraordinary environments or conditions (as exemplified below), your independent
verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (Exclude cases where no-clean type fluxes is used.
However, recommend sufficiently about the residue.); or Washing our Products by using water or water-soluble
cleaning agents for cleaning residue after soldering
[h] Use of the Products in places subject to dew condensation
4. The Products are not subject to radiation-proof design.
5. Please verify and confirm characteristics of the final or mounted products in using the Products.
6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse, is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8. Confirm that operation temperature is within the specified range described in the product specification.
9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PAA-E
Rev.004
© 2015 ROHM Co., Ltd. All rights reserved.
Precautions Regarding Application Examples and External Circuits
1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2. You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1. All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4. The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PAA-E
Rev.004
© 2015 ROHM Co., Ltd. All rights reserved.
Daattaasshheeeett
General Precaution
1. Before you use our Products, you are requested to carefully read this document and fully understand its contents.
ROHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use of any
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this document is current as of the issuing date and subject to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the latest information with a ROHM sales
representative.
3. The information contained in this document is provided on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate and/or error-free. ROHM shall not be in any way responsible or
liable for any damages, expenses or losses incurred by you or third parties resulting from inaccuracy or errors of or
concerning such information.
Notice – WE
Rev.001
© 2015 ROHM Co., Ltd. All rights reserved.
相关型号:
BD8381AEFV-M
BD8381AEFV-M是50V高耐压的白色LED驱动器。内置对应升降压电流模式的DC/DC控制器,对于电池的不稳定的电源电压变动,可实现不依赖LED段数的稳定的动作。调光可通过PWM或线性任意一种方式进行控制,还内置了PWM调光信号生成电路,无需微控制器也可实现控制。
ROHM
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