BD8381AEFV-M [ROHM]
BD8381AEFV-M是50V高耐压的白色LED驱动器。内置对应升降压电流模式的DC/DC控制器，对于电池的不稳定的电源电压变动，可实现不依赖LED段数的稳定的动作。调光可通过PWM或线性任意一种方式进行控制，还内置了PWM调光信号生成电路，无需微控制器也可实现控制。;
| 型号： | BD8381AEFV-M |
| 厂家： | 
ROHM |
| 描述： | BD8381AEFV-M是50V高耐压的白色LED驱动器。内置对应升降压电流模式的DC/DC控制器，对于电池的不稳定的电源电压变动，可实现不依赖LED段数的稳定的动作。调光可通过PWM或线性任意一种方式进行控制，还内置了PWM调光信号生成电路，无需微控制器也可实现控制。 电池 驱动 控制器 微控制器 驱动器 |
| 文件： | 总39页 (文件大小：2635K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Datasheet
LED Drivers for Automotive Light
BD8381AEFV-M
General Description
Key Specifications
BD8381AEFV-M is
a
white LED driver with the
Input Supply Voltage Range:
5.0V to 30V
capability of withstanding high input voltage (50V MAX).
It has also an integrated current-mode, buck-boost
DC/DC controller to achieve stable operation against
high input voltage and to remove the constraint of the
number of LEDs in series connection.
Operating Temperature Range:
-40°C to +125°C
Package
W(Typ) x D(Typ) x H(Max)
The LED brightness is controlled by either linear or
PWM signal and is also possible to be controlled even
without using a microcomputer, but instead, by means
of the built-in PWM brightness signal generation circuit.
Features
Integrated buck-boost current-mode DC/DC
controller
Built-in CR timer for PWM brightness
PWM linear brightness
Built-in protection functions (UVLO, OVP, TSD, OCP,
SCP)
HTSSOP-B28
9.70mm x 6.40mm x 1.00mm
LED error status detection function (OPEN/
SHORT)
Applications
Headlight and Daytime Running Light etc.
Typical Application Circuit and Block Diagram
VREG
FAIL1
Vin
OVP
COUT
UVLO
TSD
OVP
OCP
CS
VCC
EN
VREG
Timer
Latch
PWM
BOOT
OUTH
SW
Control Logic
DRV
CTL
SYNC
RT
PWM
SLOPE
OSC
DGND
OUTL
GND
VREG
ERR AMP
-
COMP
SS
+
+
LEDR
LEDC
SHORT
Det
OCP OVP
SS
VREG
PWMOUT
FB
THM
INP1
INP2
DRLIN
VREG
OPEN/ SHORT/ SCP Detect
CR
TIMER
DISC
VTH
Open Det
Timer
Latch
FAIL2
SCP Det
CT
PGND
〇Product structure: Silicon monolithic integrated circuit 〇This product has no designed protection against radioactive rays
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TSZ22111 • 14 • 001
BD8381AEFV-M
Pin Configuration
(TOP VIEW)
1
2
28
27
26
25
24
23
22
21
20
19
18
17
16
15
3
4
5
6
7
8
9
10
11
12
13
14
Pin Descriptions
Pin
1
2
3
4
Symbol
COMP
SS
VCC
EN
Function
Error amplifier output
Soft start setting input
Input power supply
Enable input
5
6
7
8
RT
Oscillation frequency-setting resistance input
External synchronization signal input
Small-signal GND
Thermally sensitive resistor connection pin
ERRAMP FB signal input pin
CR Timer discharge pin
CR Timer threshold pin
DRL switch pin (Pulse output setting pin)
Failure signal output
LED open/short detection signal output
Over-voltage detection input
LED short detection pin (LED detection side)
LED short detection pin (Resistor detection side)
-
SYNC
GND
THM
FB
DISC
VTH
DRLIN
FAIL1
FAIL2
OVP
LEDC
LEDR
N.C.
9
10
11
12
13
14
15
16
17
18
19
PGND
PWM brightness source pin
20 PWMOUT PWM brightness signal output pin
21
22
23
24
25
26
27
28
CT
GND short protection timer setting pin
Low-side external FET Gate Drive out put
Low-side FET driver source pin
OUTL
DGND
SW
High-side FET Source pin
OUTH
CS
BOOT
VREG
High-side external FET Gate Drive out put
DC/DC output current detection pin
High-side FET driver source pin
Internal reference voltage output
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© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
TSZ02201-0T1T0C700160-1-2
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BD8381AEFV-M
Absolute Maximum Ratings (Ta=25°C)
Parameter
Symbol
VCC
Rating
50
Unit
V
Power Supply Voltage
Boot Voltage
VBOOT
55
V
SW,CS,OUTH Voltage
BOOT-SW Voltage
VSW, VCS, VOUTH
VBOOT-SW
50
V
7
V
VREG, VOVP, VOUTL, VFAIL1
VFAIL2, VTHM, VSS,
,
VREG,OVP,OUTL,FAIL1,FAIL2,THM,SS,
COMP,RT,SYNC,EN,DISC,VTH,FB,LEDR,
LEDC,DRLIN, PWMOUT,CT Voltage
VCOMP, VRT, VSYNC, VEN
,
,
-0.3 to +7 < VCC
V
VDISC, VVTH, VFB, VLEDR
VLEDC, VDRLIN, VPWMOUT, VCT
Power Consumption
Pd
Topr
Tstg
1.45 (Note 1)
-40 to +125
-55 to +150
150
W
°C
°C
°C
Operating Temperature Range
Storage Temperature Range
Junction Temperature
Tjmax
(Note 1) IC mounted on glass epoxy board measuring 70mm x 70mm x 1.6mm, power dissipated at a rate of 11.60mW/°C at temperatures above 25°C.
Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated
over the absolute maximum ratings..
Recommended Operating Conditions (Ta=25°C)
Parameter
Symbol
VCC
Rating
5.0 to 30
100 to 600
Unit
V
Power Supply Voltage
Oscillating Frequency Range
fOSC
kHz
External Synchronization Frequency Range
fSYNC
fOSC to 600
kHz
%
(Note 2) (Note 3)
External Synchronization Pulse Duty Range
fSDUTY
40 to 60
(Note 2) Connect SYNC to GND or OPEN when not using external frequency synchronization.
(Note 3) Do not switch between internal and external synchronization when an external synchronization signal is input to the device.
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© 2014 ROHM Co., Ltd. All rights reserved.
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BD8381AEFV-M
Electrical Characteristics (Unless otherwise specified, VCC=12V Ta=25°C)
Limit
Parameter
Symbol
Unit
Conditions
Min
Typ
4.5
0
Max
7.0
8
EN=Hi, SYNC=Hi,
RT=OPEN, CIN=10µF
Circuit Current
ICC
-
-
mA
µA
Standby Current
ISTBY
EN=Low
[VREG Block (VREG)]
Reference Voltage
VREG
4.5
5.0
5.5
V
IREG=-5mA, CREG=10µF
[OUTH Block]
OUTH High-Side ON-Resistance
OUTH Low-Side ON-Resistance
RONHH
RONHL
1.5
1.0
3.5
2.5
7.0
5.0
Ω
Ω
ION=-10mA
ION=10mA
Over-Current Protection
Operating Voltage
SS Charge Current
VCC
-0.68
3
VCC
-0.60
5
VCC
-0.52
7
VOLIMIT
ISS
V
µA
VSS=0V
[OUTL Block]
OUTL High-Side ON-Resistance
OUTL Low –Side ON-Resistance
[SW Block]
RONLH
RONLL
2.0
1.0
4.0
2.5
8.0
5.0
Ω
Ω
ION=-10mA
ION=10mA
SW Low -Side ON-Resistance
[PWMOUT Block]
RONSW
2.0
4.5
9.0
Ω
IONSW=10mA
PWMOUT High-Side ON-Resistance
PWMOUT Low-Side ON-Resistance
[Error Amplifier Block]
Reference Voltage1
RONPWMH
RONPWML
2.0
1.0
4.0
2.5
8.0
5.0
Ω
Ω
IONPWMH=-10mA
IONPWML=10mA
VREF1
VREF2
0.194 0.200 0.206
0.190 0.200 0.210
V
V
FB-COMP Short,1MΩ/250kΩ
Reference Voltage2
The Amount of Change of VREF
by Temperature
FB-COMP Short,1MΩ/250kΩ
Ta=-40°C to +125°C
dVREF2
-0.090 -0.045 -0.003 mV/°C
COMP Sink Current
COMP Source Current
Max Duty Output
ICOMPSINK
ICOMPSOURCE
Dmax
50
-100
83
75
-75
90
100
-50
-
µA
µA
%
VFB=0.4V, VCOMP=1V
VFB=0V, VCOMP=1V
fOSC=300kHz
[Oscillator Block]
Oscillating Frequency
[OVP Block]
fOSC
285
300
315
KHz
RRT=200kΩ
Over-Voltage Detection
Reference Voltage
OVP Hysteresis Width
[UVLO Block ]
VOVP
1.9
2.0
2.1
V
V
VOVP=Sweep up
VOHYS
0.45
0.55
0.65
VOVP= Sweep down
UVLO Voltage
VUVLO
VUHYS
4.0
50
4.35
150
4.7
V
VCC= Sweep down
VCC= Sweep up
UVLO Hysteresis Width
[PWM Generation Circuit Block]
VTH Threshold Voltage
VTH Threshold Voltage
PWM Minimum ON Width
LED OPEN Detection Function
LED SHORT Detection Function
LED GND Short Protection Timer
[Logic Inputs]
250
mV
VTH1
VTH2
3
1
2/3VREG
1/3VREG
-
3.7
2
V
V
tPWMON
VOPEN
VSHORT
tSHORT
25
30
100
100
-
µs
50
70
400
200
mV
mV
ms
200
VSHORT ≥ lVLEDR-VLEDCl
CCT=0.1µF
150
Input HIGH Voltage
VINH
VINL
IIN
3.0
GND
20
-
-
V
V
Input LOW Voltage
-
1.0
50
45
Input Current 1
35
30
µA
µA
VIN=5V (SYNC/DRLIN)
VEN=5V (EN)
Input Current 2
IEN
15
[FAIL Output (Open Drain) ]
Fail LOW Voltage
VOL
-
0.1
0.2
V
IOL=0.1mA
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© 2014 ROHM Co., Ltd. All rights reserved.
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BD8381AEFV-M
Typical Performance Curves
(Unless otherwise specified, Ta=25°C)
6
4
2
0
700
VCC=12V
600
500
RRT=100kohm
400
300
200
100
0
RRT=200kohm
-50
-25
0
25
50
75
100
125
0
5
10
15
20
25
30
35
40
45
50
Temperature: Ta [°C]
Power Supply Voltage: VCC [V]
Figure 2. Oscillating Frequency vs Temperature
(fOSC Temperature Characteristic)
Figure 1. Output Voltage vs Power Supply Voltage
(VREG Voltage Characteristic)
0.22
8.0
VCC=12V
0.215
0.21
0.205
0.2
6.0
4.0
2.0
0.0
0.195
0.19
0.185
0.18
0
5
10
15
20
25
30
35
40
45
50
-50
-25
0
25
50
75
100
125
Power Supply Voltage: VCC [V]
Temperature: Ta [°C]
Figure 4. Circuit Current vs Power Supply Voltage
Figure 3. Output Voltage vs Temperature
(Standard Voltage Temperature Characteristic)
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BD8381AEFV-M
Typical Performance Curves – continued
(Unless otherwise specified, Ta=25°C)
0.66
0.64
0.62
0.60
100
95
90
85
80
75
70
65
60
ILED=0.6A
Boost
VOUT=24V
Buck
VOUT=6V
Buck-Boost
VOUT=14V
0.58
VCC=12V
0.56
0.54
6
9
12
15
18
21
-50 -25
0
25
50
75 100 125
Power Supply Voltage: VCC [V]
Temperature: Ta [°C]
Figure 6. Efficiency vs Power Supply Voltage
(Input Voltage Dependence)
Figure 5. Output Voltage vs Temperature
(Overcurrent Detection Voltage Temperature
Characteristic)
10
8
250
VCC=12V
200
150
100
6
4
2
50
0
1/3VREG
1
2/3VREG
4
0
0
2
3
5
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
1
1.1
THM Voltage: THM [V]
VTH Voltage: V
[V]
VTH
Figure 8. PWMOUT Output Voltage vs
VTH Threshold Voltage
Figure 7. Reference Voltage vs THM Voltage
(THM Gain)
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BD8381AEFV-M
Typical Performance Curves – continued
(Unless otherwise specified, Ta=25°C)
10
10
8
VCC=12V
Ta=-40°C
VCC=12V
Ta=25°C
Ta=25°C
Ta=-40°C
8
6
4
2
0
Ta=125°C
Ta=125°C
6
4
2
0
0
1
2
3
4
5
0
1
2
3
4
5
D
DRLIN Voltage: VDRLIN [V]
EN Voltage: VEN [V]
Figure 10. Output Voltage vs EN Threshold Voltage
(DRLIN=VREG)
Figure 9. Output Voltage vs DRLIN Threshold Voltage
5.5
2.15
VCC=12V
5.4
VCC=12V
2.1
2.05
2
5.3
5.2
5.1
5
4.9
4.8
4.7
4.6
4.5
1.95
1.9
1.85
-50
-25
0
25
50
75
100
125
-50
-25
0
25
50
75
100
125
Temperature: Ta [°C]
Temperature: Ta [°C]
Figure 12. Over-Voltage Detection Reference Voltage vs
Temperature
Figure 11. Output Voltage vs Temperature
(VREG Voltage Temperature Characteristic)
(OVP Voltage Temperature Characteristic)
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BD8381AEFV-M
Typical Performance Curves – continued
(Unless otherwise specified, Ta=25°C)
400
350
300
250
200
150
100
70
VCC=12V
VCC=12V
VLEDR=2V
65
60
55
50
45
40
35
30
-50
-25
0
25
50
75
100
125
-50
-25
0
25
50
75
100
125
Temperature: Ta [°C]
Temperature: Ta [°C]
Figure 13. LED Open Detection Voltage vs
Temperature
Figure 14. LED Short Detection Voltage vs
Temperature
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BD8381AEFV-M
Application Information
1. Application Circuit
Application Circuit 1
VREG
FAIL1
Vin
OVP
CS
COUT
UVLO
TSD
OVP
OCP
VCC
EN
VREG
Timer
Latch
PWM
BOOT
OUTH
SW
Control Logic
DRV
CTL
SYNC
RT
PWM
SLOPE
OSC
DGND
OUTL
GND
VREG
ERR AMP
-
COMP
SS
+
+
LEDR
LEDC
SHORT
Det
OCP OVP
SS
VREG
PWMOUT
FB
THM
INP1
INP2
DRLIN
VREG
OPEN/ SHORT/ SCP Detect
CR
TIMER
DISC
VTH
Open Det
SCP Det
Timer
Latch
FAIL2
PGND
CT
Figure 15
Buck application composition (It is INP1, INP2 and two input selector function and EN connected direct to VCC)
Application Circuit 2
VREG
FAIL1
Vin
OVP
CS
COUT
UVLO
TSD
OVP
OCP
VCC
EN
VREG
Timer
Latch
PWM
BOOT
OUTH
SW
Control Logic
DRV
CTL
SYNC
RT
PWM
SLOPE
OSC
DGND
OUTL
GND
VREG
ERR AMP
-
VREG
30kΩ
20kΩ
COMP
SS
+
+
LEDR
LEDC
SHORT
Det
OCP OVP
SS
VREG
PWMOUT
FB
THM
DRLIN
VREG
OPEN/ SHORT/ SCP Detect
CR
TIMER
DISC
VTH
Open Det
SCP Det
Timer
Latch
FAIL2
CT
PGND
Figure 16
Boost application composition (When invalidating short detection and EN is inputted by a voltage divider)
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BD8381AEFV-M
2. Reference PCB Setting
VCC
CVCC1
CVCC2
CVCC3
RPC
VREG
CPC
CSS
CREG
VREG
COMP
SS
VREG
BOOT
CS
CCS
RCS3
VCC
EN
VREG
CBOOT
RSW1
SW1
VREG
EN
OUTH
SW
DI2
GND
RRT
VOUT
RT
DGND
TR
SYNC
SYNC
GND
THM
FB
DGND
OUTL
CT
THM1
ROUTL
LEDOUT
CCT
PWMOUT
PGND
N.C.
PGND
DISC
VTH
DRLIN
FAIL1
FAIL2
RCR1
RCR2
CCR
THM2
VTH
SW2
LEDR
LEDR
LEDC
OVP
RFL1
LEDC
VREG
RFL2
FAIL1
FAIL2
Figure 17
VCC=8V to 16V, VOUT=16V, ILED=1A, fOSC=300kHz, PWM dummign25%, PWM Frequency 130Hz
Component
Component
Name
CVCC1
No.
Component Value
Product Name
No.
Component Value
Product Name
Name
CCS
1
2
10μF
10μF
0.1μF
0.1μF
820Ω
0.1μF
200kΩ
100kΩ
100kΩ
100kΩ
100kΩ
0Ω
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
39
40
41
42
43
N.M
0.1μF
-
GCM32ER71E106KA42
GCM32ER71E106KA42
GRM31CB31E104KA75B
GCM188R11H104KA42
MCR03 Series
CVCC2
CVCC3
CPC
CBOOT
Q1
GCM188R11H104KA42
3
RSS070N05
RB050L-40
0Ω
-
4
DI1
-
5
RPC
RSW1
RSW2
RQ1
-
6
CSS
N.M
-
GCM188R11H104KA42
MCR03 Series
7
RRT
N.M
-
8
RTHM11
RTHM12
RTHM21
RTHM22
RTHM3
TR
L
SLF12575T100M5R4-H
MCR03 Series
10μH
0Ω
9
ROUTL
Q2
MCR03 Series
MCR03
10
11
12
13
14
15
16
17
18
19
20
21
22
RSS070N05
RF201L2S
10μF
-
-
MCR03 Series
DI2
MCR03 Series
COUT1
COUT2
CCT
-
GCM32ER71E106KA42
-
-
10μF
GCM32ER71E106KA42
RCR1
RCR2
CCR
30kΩ
10kΩ
0.22μF
100kΩ
100kΩ
10μF
110mΩ
N.M
0.1μF
MCR03 Series
MCR03 Series
GCM21BR11H224KA01
MCR03 Series
MCR03 Series
GCM32ER71E106KA42
MCR100JZHFSR110
-
GCM188R11H104KA42
ROVP1
ROVP2
RLEDR1
RLEDR2
Q3
270kΩ
30kΩ
MCR03
MCR03
FRL1
90kΩ
MCR03
FRL2
30kΩ
MCR03
CREG
RCS1
RCS2
RCS3
RSS070N0
N.M
-
RQ3
-
RSENSE1
RSENSE2
200mΩ
N.M
MCR100JZHFSR510
-
0Ω
-
(Note)
When no PWM dimming, DI2 should be a schottky diode instead of a Fast Recovery diode to improve efficiency.
When dimming with External PWM signal, DISC should be pulled up to VREG with 10KΩ,then input PWM signal to
VTH.(when no PWM dimming, remove Q3 and replace RQ3=0Ω and short to DS）
Efficiency improvement is possible by making DI2 a schottky Diode .However, since high temperature leakage current is
large and output voltage ripple is large as well, LED may flicker when PWM dimming ratio is very low. So it is
recommended to use a Fast recovery Diode.
Values of the capacitors can be smaller than the amount that was selected by the DC bias characteristics of the capacitor
when using ceramic capacitors.
For EMI reduction, please insert resistance to ROUTL and RBOOT. It is recommended to be below 20Ω.
The output voltage ripple is larger in Boost application than in Buck application. Hence, it is recommended to use at least
100µ F output capacitor.
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TSZ22111・15・001
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BD8381AEFV-M
3. 5V Voltage Reference (VREG)
5V (Typ) is generated from the VCC input voltage when the enable pin is set high. This voltage is used to power internal
circuitry, as well as the voltage source for device pins that need to be fixed to a logical HIGH.
UVLO protection is integrated into the VREG pin. The voltage regulation circuitry operates uninterrupted for output
voltages higher than 4.5 V (Typ), but if output voltage drops to 4.3 V (Typ) or lower, UVLO engages and turns the IC off.
Connect a capacitor (CREG = 10µF Typ) to the VREG terminal for phase compensation. Operation may become unstable if
CREG is not connected.
4. LED Current Setting and Control Method.
(1) Method of setting the LED current
LED Current：ILED
THM terminal voltage：VTHM
Resistance of LED current setting：RSET
The LED current can be calculated by the following formula.
THM ≥1.0V→ILED＝0.2V(Typ) / RSET
THM <1.0V→ILED＝VTHM / (GAIN x RSET
)
(GAIN：the gain of internal AMP 5(Typ))
VCC
RSET=0.2Ω
1.0A
OUTH
VOUT
SW
OUTL
PWMOUT
FB
RSET
1.0V
DC Input Voltage：VTHM[V]
Figure 18. LED current setting block diagram
(2) Linear dimming function
Figure 19. The LED current derating by THM terminal
LED current can be controlled linearly by using the THM terminal which is commonly used as a derating function.
For example, THM terminal is used when suppressing the degradation at high temperature of the LED (Figure 20) and
controlling the excessive current to the external components under the conditions likely to occur in the power supply
voltage fluctuations in the idling stop function. VTHM input range is recommended VTHM ≥ 0.4V.
VREG
1.2
R1
THM
DC
1.0
0.8
0.6
0.4
0.2
0.0
R3
R2
product
VREG
R1
value
5
20
47
47
unit
V
kΩ
kΩ
kΩ
R2
R3
-50
0
50
100
150
Temprature(℃)
R3:NTCG104BF473F
Figure 20. The derating use case with thermistor resister.
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5. Setting of CR Timer Dimming
It is possible to set the PWM frequency (fPWM) and the PWM on Duty (DON) with the external resistor and capacitor by using
the built-in CR timer function. This function can be used to set the Dimming range from 2%up to 45% and the frequency
range from 100Hz up to 20kHz. When a Hi voltage is applied at DRLIN terminal, 100% On-Duty is outputted at the
PWMOUT terminal and at the LED current, independent of the PWM signal and the CR Timer. The minimum PWM pulse
width is 25μs.
VREG
DON
PWMOUT
fPWM
RCR1
DISC
VTH
RCR2
PWMOUT
PWM Frequency (fPWM)
CCR
1.44
RCR1 2 RCR2 CCR
fPWM
SW
DRLIN
VREG
PWM on Duty (DON)
RCR2
RCR1 2 RCR2
DON
100
EN
SWꢀON
DRLIN
VTH
④
① Turning on EN, VTH voltage is increased and
CCR starts charging.
2/3VREG
②
②,③CCR is discharged in the DISC to 1/3VREG,
when VTH voltage reaches 2/3VREG.
④ PWMOUT is Hi when the DRLIN is Hi.
1/3VREG
GND
③
①
DISC
PWMOUT
When DRLIN is from Low Hi,
PWMOUT OUTputs from PWM mode to Hi only.
Figure 21. The setting of PWM dimming using CR Timer and Timing chart
Synchronization of the PWM dimming signal with an external signal is possible by inputting the external signal at the VTH
terminal. The Hi voltage of the external signal can be more than 3.7V and the Low voltage can be less than 1.0V.
VTH(external signal )
OUTL
ILED
Figure 22. The waveform of PWM dimming in synchronization with an external signal
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6. Relationship between PWM dimming and SCP protection
If the PWM ON-Time is short, even if it is an internal or an external PWM dimming, it will cause the rise time of the output
voltage to be delayed and there is likely to have a false detection of the SCP. Figure 23 and Figure 24 indicates the relation
between SCP and PWM dumming. Detail explanation of SCP is described in P.16.
EN
Since comp Voltage increases independent of
PWM dimming at DRLIN=Hi, the rise time of
output voltage is fast.
PWMOUT
⇒Rise of the output voltage is high.
It has low possibility to detect SCP protection.
Tss
SS
0.7V（Typ.)
Tcomp
COMP
Tup
VOUT
FB
50mV
CT
SCP timer starts in
Reset Now that you have exceed the 50mV
synchronization with the EN
Tscp
Figure 23. The relation of the output voltage rise time and SCP protection (not at PWM 100% dimming)
Since comp Voltage increases only when PWM=Hi，
EN
the rise time of output voltage is slow.
⇒Rise of the output voltage is slow.
It have the potential to scp detection
PWMOUT
(=PWM)
TSS
SS
TCOMP
0.7V(Typ.)
COMP
VOUT
TUP
FB
CT
50mV
SCP timer starts in
synchronization with the EN
TSCP
Figure 24. The relation of the output voltage rise time and SCP protection (at PWM dimming)
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The rise time of the output voltage at PWM dimming is calculated as follows. The COMP voltage starts to increase when
PWM=Hi and the switching output of the DC/DC circuit depends on the CPC capacitor connected at the COMP terminal .It also
affects the soft start time during start-up to prevent the rush current. (Refer to P.15 for more details.)
Base on the above explanation, the time (tUP) it takes for the output voltage to reach the steady state level is calculated as
follows.
Rise Time of COMP voltage ：tCOMP
COMP source current：ICOMPSOURCE
Capacitor of COMP：CPC
tUP tSS tCOMP
Soft start time：tSS
SS Charged current：ISS
VSWST[V]CSS[F]
tSS
ISS[A]
Capacitor of SS：CSS
PWM Dimming rate：DON
Soft start release voltage 0.85V (Max)：tSWST
MaxDuty output voltage 2.0V (Max)：VSWMAX
VSWMAX[V]CPC[F]
ICOMPSOURCE[A]
1
tCOMP
DON
Ex)
During the rise time of the output voltage which is
calculated above, SCP detection starts the timer operation
which is synchronized with EN. If the PWM dimming ratio
is low and the rise time of output voltage is delayed, there
is a possibility for a false detection of SCP.
The condition that
ICOMPSOURCE=75μA,CPC=0.1µF,ISS=5μA,CSS=0.1μF,
DON=5% are tSS=17ms,tCOMP=53.3ms.
So, tUP is about 60ms
From the above, when using the PWM dimming, it must establish the below relationship. (tSCP indicates the SCP mask time. It
indicates P.16 in detail.)
tUP < tSCP
As a reference, it is recommended that
.
1.2tUP tSCP
There is a need to reduce CPC or CSS in order to achieve fast rise time. If the CSS is decreased, the overshoot of the output
voltage increases as the inrush current increases. On the other hand, if the CPC is decreased, the phase margin becomes
unstable due to the failure to start at the right timing when the recommended range of 1.2tUP tSCP is not met. Also, always
confirm that , CT terminal is connected to GND. The power supply voltage VCC after applying a PWM signal input, please
input always earlier than the EN control signal when used in external input PWM as stated in P.19.
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7. DC/DC controller
(1) Over-voltage protection circuit (OVP)
The output of the DCDC converter should be connected to the OVP pin via a voltage divider. In determining the
appropriate trigger voltage of the OVP block, consider the total number of LEDs in series and the maximum VF variation.
The OVP terminal voltage, VOVP is recommended to be in the range of 1.2V<VOVP<1.4V during normal operation. If VOVP
is not at the normal operating range, it is possible to detect LED open protection. And the role of the OVP function is for
the protection of the half-short mode of FB terminal short (VFB ≈ 0.1V).
(2) DC/DC converter oscillation frequency (fOSC
)
The regulator’s internal triangular wave oscillation frequency can be set via a resistor connected to the RT pin (pin 5).
This resistor determines the charge/discharge current to the internal capacitor, thereby changing the oscillation frequency.
Refer to the following theoretical formula when setting RT:
60 106
RRT []
fOSC
[kHz]
60 x 106 (V/A/S) is a constant (±5%) determined by the internal circuitry, and α is a correction factor that varies in relation to RT:
(RT: α = 100kΩ: 1.0, 150kΩ: 0.99, 200kΩ: 0.98, 280kΩ: 0.97)
A resistor in the range of 100kΩ to 280kΩ is recommended. Settings that deviate from the frequency range shown
below may cause switching to stop, causing the device operation to be unstable.
Please consider the parasitic capacitance of RT terminal at PCB board design. It must be less than 50pF.
1000
1000
100
100
10
10
80
800
70
700
RRT [ kΩ ]
fSYNC [ kHz ]
Figure 25. fOSC vs RRT
Figure 26. RRT vs fSYNC
(3) External DC/DC converter oscillation frequency synchronization (fSYNC
)
Please do not switch from external to internal oscillation of the DC/DC converter if an external synchronization signal is
present on the SYNC pin. When the signal on the SYNC terminal is switched from high to low, a delay of about 30 µs
(typ) occurs before the internal oscillation circuit starts to operate (only the rising edge of the input clock signal on the
SYNC terminal is recognized). Consider that; if the external sync is already running and is switched to internal
synchronization from external synchronization. It may cause the output voltage overshoot and erroneous open
detection may occur.
In addition, whenever an external synchronization is used, please set the RRT such that the external synchronization
frequency is fSYNC < fOSC x 1.2.
(4) Soft Start Function
The soft-start (SS) limits the current and slows the rise-time of the output voltage during the start-up, and hence leads to
the prevention of the overshoot of the output voltage and the inrush current. The SS voltage is Low when the OCP and
the OVP is detected. Switching is stopped and operation is resumed.
tSS (soft-start time) is calculated using the formula below. Please refer to P.23 for more detailed application of the setting
method.
Soft start time: tSS
Soft start charge current 5μA (Typ): ISS
Capacitor of SS: CSS
Soft start release voltage 0.85V (Max): VSWST
VSWST[V]CSS[F]
ISS[A]
tSS
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(5) Self-diagnostic functions
The operating status of the built-in protection circuit is propagated to FAIL1 and FAIL2 pins (open-drain outputs). FAIL1
becomes low when UVLO, TSD, OVP, OCP, or SCP protection is engaged, whereas FAIL2 becomes low when open or
short LED is detected.
FAIL2
FAIL1
LEDOPEN
LEDSHORT
UVLO
TSD
S
R
Q
OVP
OCP
MASK
EN=Low
UVLO/TSD
SCP
Counter
S
Q
R
EN=Low
UVLO/TSD
(6) Operation of the Protection Circuit
(a) Under-Voltage Lock Out (UVLO)
The UVLO shuts down all the circuits except for VREG when VCC ≤ 4.3V (TYP).
(b) Thermal Shut Down (TSD)
The TSD shuts down all the circuits except for REG when the Tj reaches 175°C (TYP), and releases when the Tj
becomes below 150°C (TYP).
(c) Over Current Protection (OCP)
The OCP detects the current through the power-FET by monitoring the voltage of the high-side resistor and activates
when the CS voltage becomes less than VCC-0.6V (TYP). When the OCP is activated, the external capacitor of the SS
pin will discharge and the switching operation of the DCDC turns off.
(d) Over Voltage Protection (OVP)
The output voltage of the DCDC is detected with the OVP-pin voltage and the protection activates when the OVP-pin
voltage becomes greater than 2.0V (TYP). When the OVP is activated, the external capacitor of the SS pin will discharge
and the switching operation of the DCDC turns off.
(7) Short Circuit Protection (SCP) (Following Figure 36 in P.21)
SCP is independent from PWM dimming. When the FB-pin voltage becomes less than 0.05V (TYP), the internal counter
starts operating and latches off the circuit approximately after 150ms (when CCT = 0.1µF). If the FB-pin voltage becomes
over 0.05V before 150ms, then the counter resets. When the LED anode (i.e. DCDC output voltage) is shorted to ground,
the LED current turns off and the FB-pin voltage becomes low. Furthermore, the LED current also turns off when the LED
cathode is shorted to ground. Hence in summary, the SCP works in both cases when the LED anode and the LED
cathode is being shorted.
SCP mask timer (tSCP) can be calculated using the following expression.
SCP mask timer：tSCP
CT charge current 5μA (Typ)：ICT
Capacitor of CT：CCT
CT terminal Voltage 0.8V (Typ)：VCT
CCT[F]VCT[V]
tSCP
8count
ICT[A]
The need for SCP varies depending on the application. The OCP is detected and limited by High side SW, when the
output is shorted to GND in the Buck / Buck-Boost application. Since the current continues to flow continuously, set the
SCP timer to stop after an error is detected. On the other hand, the current path can not be cut off and large current
continues to flow in the Boost application because there is no High side SW in Buck / Buck-Boost application. Therefore,
please mask the SCP function in boost application. (CT terminal short to GND)
(8) LED Open Detection(Following Figure 34 in P.20)
When the FB-pin voltage < 50mV (TYP) as well as OVP-pin voltage 1.7V (TYP) operates in these ranges, the device
detects LED open and latches off that particular channel.
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(9) LED Short Detection(Following Figure 35 in P.20)
Less brightness of the light source will be produced whenever one LED is shorted somewhere within the load. If the
guaranteed luminance of the light source is required, detection of the failure in the circuit must be performed. LED short
detection is activated whenever one of the LEDs in the circuit, is shorted. In case of a short circuit, problem of LED
short detection is informed. When one of the LEDs used is shorted somewhere in the circuit, |LEDR-LEDC| ≥ 0.2 (TYP),
the internal counter starts operating, and approximately after 100ms (when fOSC = 300 kHz) the operation latches off.
With the PWM brightness control, the detection operation only proceeds when PWM=Hi. If the condition of the
detection operation is released before 100ms (when fOSC = 300 kHz), then the internal counter resets.
LED short timer ：tSHORT
DC/DC oscillator frequency：fOSC
PWM dimming ratio：DON
tSHORT 1/ fOSC 32770 /DON
There is a possibility that the LED short detection malfunctions when the difference of VF is large. Therefore, please
adjust external resistance connected for VF. It is recommended to be 1V-3V of the input voltage range of LEDR and
LEDC.
(Note) The counter frequency is the DCDC switching frequency determined by the RT. The latch proceeds at the count of 32770.
VOUT(DC/DC output)
R3
LEDR
Y pcs
R4
X pcs
R1
LEDC
R2
Setting method
PWMOUT
R1：R2 = X：1
R3：R4 = (( X + 1 ) Y – 1)：1
FB
Figure 27. High luminance LED (multichip) when using Y piece
VOUT(DC/DC output)
R3
R3
LEDR
LEDR
LEDC
Y pcs
Y pcs
R4
R4
R1
R2
LEDC
Setting method
PWMOUT
Setting method
PWMOUT
R1：R2 = 1：1
R3：R4 = (2Y – 1)：1
R3：R4 = (Y – 1)：1
FB
FB
Figure 28. When using the single chip (White LED)
Figure 29. When using the Low VF LED as Red LED
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8. Error all condition
Detecting Condition
[Detect]
Protection
Operation after detect
[Release]
VCC>4.5V
All blocks (but except VREG)
shut down
UVLO
TSD
VCC<4.35V
Tj>175°C
VOVP>2.0V
All blocks (but except VREG)
shut down
Tj<150°C
VOVP<1.45V
VCS>VCC-0.6V
EN or UVLO
EN or UVLO
EN or UVLO
OVP
OCP
SCP
SS discharged
SS discharged
VCS ≤ VCC-0.6V
VFB<0.05V
(150ms delay when CCT=0.1µF)
Counter starts and then latches off
all blocks (but except REG)
Counter starts and then latches off
all blocks (but except REG)
LED open
LED short
VFB<0.05V & VOVP>1.7V
lVLEDR-VLEDCl ≥ 0.2V
(100ms delay when fOSC=300kHz)
Counter starts and then latches off
all blocks (but except REG)
9. Effectiveness of the protection of each application
VCC
VCC
VCC
CS
OUTH
SW
CS
CS
OUTH
SW
OUTL
SW
OUTL
PWMOUT
FB
PWMOUT
FB
PWMOUT
FB
Figure 30. Buck Application
Figure 31. Boost Application
Figure 32. Buck-Boost Application
DC/DC Application
PROTECTION
UVLO
Buck
Boost
Buck-Boost
OCP
OVP
DC/DC Output short GND detection
LED short detection
Note1
LED Open detection
LED Anode/Casode short detection
Note2
Note2
Note2
Note1：When the DC/DC output is shorted to GND using Boost application, there is a possibility of high current flow which lead
to the destruction of the external components. For the reduction of current in the external components, CT terminal is
connected to GND.
Note2：LED doesn’t light when LED is shorted between anode and cathode. Under shorting LED, when using Buck/Buck-Boost
application, may cause the large current not to flow while when using Boost application, there is a large current flowing
from VCC to GND.
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10. Power supply turning on sequence
5.0V
5.0V
VCC
EN
①
⑥
③
④
4.5V
③
UVLO
release
④
4.3V
UVLO
detect
VREG
THM
⑤
②
Input by the resistance
division of VREG
②
VTH
⑤
Input by the
external PWM
②
②
⑤
SYNC
DRLIN
SS
While DRLIN =Low
ILED is dumming.
⑤
While DRLIN =High
ILED is not dummign.
OUTL
VOUT
ILED
Figure 33
Power supply turning on sequence
①
②
③
④
⑤
⑥
After becoming VCC>5V, the input of the other signals is possible.
Before EN inputs, please fix VTH, THM, DRLIN, SYNC terminal voltage. An input order is not related.
VREG rises simultaneously with the input of EN, UVLO protection releases and switching starts.
VREG falls simultaneously with EN=Off.
Please stop input signal of VTH, THM, DRLIN, SYNC terminal voltage. An input order is not related.
VCC is OFF.
Note: It leads to the destruction of IC and external parts because it doesn't error output according to an external constant of adjacent pin 24pin SW terminal,
25pin OUTH terminal, 26pin CS terminal and 27pin BOOT terminal.
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11. Operation in error circumstances of LED
(1) LED open detection
VCC
LED OPEN
FB
50mV
0V
OUTH
SW
OUTH/OUTL
VOUT
Switching stop
1.7V
OVP
FAIL2
OUTL
OPEN
LED OPEN detection when VOVP>1.7 and VFB<50mV
（When it achieves the detection condition, the FP latch is done.）
PWMOUT
FB
Q1
RSET
OVP
Figure 34
(2) LED short detection
VCC
VOUT
It gets down by LED1 step.
OUTH
VOUT
SW
LEDR-LEDC
0V
0.2V
OUTH/OUTL
FOSC
Switching stop
OUTL
LEDC
1
TSHORT=32770×
×DON
FOSC
FAIL2
short
Q1
ＴＳＨＯＲＴ
PWMOUT
FB
It detects short and error is detected with FAIL2 after the timer TSHORT.
isab10
ORT out 0ms under the condition that FOSC=300kHz and
Ex)
TSH
dimming=100%.
RSET
TSHORT is about 200ms under the condition that FOSC=300kHz and
dimming=50%.
LEDR
Figure 35
20/36
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(3) LED anode short to GND detection
VCC
OUTH
SW
Short
GND
VOUT
VOUT
FB
LED anode GND short
0V
200mV
50mV
Capacity dependence connected with CT
OUTL
CT
OUTH/OUTL
FAIL1
Switching stop
Timer operation of CT after GND
short detection.
FAIL1 becomes Hi→Low.
PWMOUT
FB
Q1
RSET
TSCP
By connecting CT terminal to GND, SCP function can be invalidated.
Figure 36
Note: When GND short-circuits by the DC/DC output by Boost application, high current flows and may lead to the destruction of external parts. The boost application
does not enable the GND short protection of the DC/DC output.
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12. Procedure for external components selection
Follow the steps as shown below in selecting the external components
(1)
(2)
(3)
Work with PWM dimming frequency and ratio setting.
Work with SCP mask timer setting.
Work with the soft start setting.
(4)
(5)
(6)
Work with CPC setting that will meet the condition of the rise time of the output voltage such that tUP < SCP mask timer tSCP.
Work out IL_MAX from the operating conditions.
Feedback the value of L
Select the value of RCS such that IOCP > IL_MAX
.
Vout
L
(7)
(8)
Select the value of L such that 0.05[V/µs] <
x RCS < 0.3[V/ µs].
Work with the Over-Voltage Protection (OVP) setting.
(9)
Select coil, schottky diodes, MOSFET and RCS which meet the ratings.
(10)
(11)
(12)
Select the output capacitor which meets the ripple voltage requirements.
Select the input capacitor.
Work with the compensation circuit.
(13)
Verify through experimentation.
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(1) PWM dimming frequency and ratio setting
It is possible to set the PWM frequency (fPWM) and the PWM on Duty (DON) in the external resistor and capacitor using
the built-in CR timer function.
REG
DON
PWMOUT
fPWM
RCR1
DISC
RCR2
PWM FREQUENCY (fPWM
)
PWMOUT
VTH
1.44
RCR1 2 RCR2 CCR
B
CCR
fPWM
SW
DRLIN
PWM on Duty (DON)
VREG
RCR2
RCR1 2 RCR2
DON
100
(2) SCP mask timer setting
SCP mask timer (tSCP) is determined by the CT terminal capacitor which is calculated using the following expression.
SCP mask timer：tSCP
CCT[F]VCT[V]
ICT[A]
CT charge current 5μA (Typ)：ICT
Capacitor of CT：CCT
CT terminal Voltage 0.8V (Typ)：VCT
tSCP
8count
In the P.14, when LED number is large or PWM dimming ratio is low, it may not satisfy the relational formula which has
been described in P.14. Please connect CT terminal to GND in case the relational formula is not satisfied.
(3) Setting of the soft-start
The soft-start allows the coil current as well as the overshoot of the output voltage at the start-up to be minimized.
For the capacitance, it is recommended to be in the range of 0.001µF 0.1µF. If the capacitance is less than 0.001µF, it
may cause an overshoot on the output voltage while if the capacitance is greater than 0.1µF, it may cause massive
reverse current through the parasitic elements of the IC and may damage the whole device.
VSWST[V]CSS[F]
tSS
ISS[A]
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(4) CPC setting that meets the condition of the rise time of the output voltage such that tUP < SCP mask timer tSCP
The rise time of the output voltage (tUP) can be calculated using the following formula.
Rise Time of the COMP voltage：tCOMP
COMP source current：ICOMPSOURCE
tUP tSS tCOMP
Capacitor of COMP：CPC
PWM Dimming rate：DON
MaxDuty output voltage 2.0V (Max)：VSWMAX
VSWMAX[V]CPC[F]
ICOMPSOURCE[A]
1
tCOMP
DON
Please adjust CPC and CCT to satisfy the following relationship.
tUP<tSCP
For a guide, it is recommended that
.
1.2tUP tSCP
If the above formula is not satisfied, failure in the activation of the SCP may occur regardless of which application. So it is
important to connect CT terminal to GND to prevent the false detection of SCP protection circuit.
(5) IL_MAX from the operating conditions.
(a) Calculation of the maximum output voltage (VOUT
)
To calculate the VOUT, it is necessary to take into account the VF variation and the number of LEDs connected in series
connection.
VF of LED：VF
VOUT
VF VF
N VREF RPWMON IOUT
VF distribution：ΔVF
Series of LED：N
DC/DC feedback Ref voltage 0.2V (Typ)：VREF
ON Resistance of PWM dimming：RPWMON
LED current：ILED
PWM dimming ratio：DON
Resistance of LED current setting：RSET
Coil max current：IL_MAX
Coil average current：IL_AVG
Ripple current：ΔIL
(b) Calculation of the output current ILED
VREF
ILED
RSET
(c) Calculation of the input peak current IL_MAX
Buck-Boost
Power supply voltage：VCC
Output voltage：VOUT
Efficiency：η
IL _ MAX IL _ AVG 1 2IL
IL _ AVG
VCC VOUT
I LED
VOUT
/
VCC
VCC
L
1
DC/DCFrequency：fOSC
IL
fOSC VCC VOUT
Boost
IL _ MAX IL _ AVG 1 2IL
IL _ AVG VOUT ILED /( VCC
)
VCC VOUT VCC
1
IL
L
VOUT
fOSC
Buck
IL _ MAX IL _ AVG 1 2IL
IL _ AVG I LED
VOUT VCC VOUT
1
IL
L
VOUT
fOSC
The worst case scenario for VCC is when it is at the minimum, and thus the minimum value should be applied in the
equation.
The L value of 6.8µH to 33µH is recommended. The current-mode type of DC/DC conversion is adopted for
BD8381AEFV-M, which is optimized with the use of the recommended L value in the design stage. This
recommendation is based upon the efficiency as well as the stability. The L values outside this recommended range
may cause irregular switching waveform and hence deteriorate stable operation.
η (Efficiency) is approximately 80% in Buck-Boost application and approximately 90% in Buck / Boost application.
(6) The setting of over-current protection
Choose RCS µsing the formula
. When investigating the margin, please note that the L
0.52V / RCS IL _ MAX
VOCP _ MIN
value may vary by approximately ±30%. And
.
IOCP _ MAX VOCP _ MAX (0.68V) RCS
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(7) The selection of the L
In order to achieve stable operation of the current-mode DC/DC converter, we recommend selecting the L value in the
ranges indicated below:
Buck/Buck-Boost
VOUT RCS
0.05 [V / s ]
0.05 [V / s ]
0.3
V / s
L
Boost
(VOUT VCC ) RCS
0.3
V / s
L
Stability will be greatly increased by reducing the calculated value but there is also a possibility that the response will be
lowered.
(8) The setting of OVP voltage
It is recommended that OVP terminal voltage is set from 1.2V to 1.4V. When VOVP<1.2V, it is necessary that the external
components are in high voltage ratings.. When VOVP>1.4V, there is a possibility that LED open protection may
malfunction and by determining ROVP1 and ROVP2, VOUT_MAX can be calculated using the following formula.
R
OVP1 [k] ROVP2 [k]
VOUT
VOUT _ OVPMAX
VOVP
ROVP2 [k]
ROVP1
OVP
Output voltage at OVP detection：VOUT_OVPMAX
OVP resistance：ROVP1, ROVP2
OPEN
OVP detection voltage 2.1V (MAX)：VOVP
1.7V
ROVP2
OVP
2.0V/1.45V
VOUT
1.2V <
× ROVP < 1.4V
ROVP1 + ROVP2
Figure 37. The circuit of OVP terminal
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(9) Select coil, schottky diodes, MOSFET and RCS which meet the ratings
(a) Buck-Boost application
VCC
RCS
CS
M1
OUTH
L
D2
SW
D1
M2
COUT
OUTL
PWMOUT
FB
M3
RSET
Figure 38. Buck-Boost application
Rated current
>IOCP_MAX
>IOCP_MAX
>IOCP_MAX
>IOCP_MAX
>IOCP_MAX
Rated Voltage
―
Heat Loss
Coil L
Diode D1
Diode D2
MOSFET M1
MOSFET M2
RCS
―
―
―
―
> VCC_MAX
> VOUT_MAX
> VCC_MAX
> VOUT_MAX
―
―
―
―
> IOCP_MAX2 x RCS
> VOUT_MAX
> VOUT_MAX
COUT
MOSFET M3
―
―
> ILED_MAX
RSET
―
―
> IOCP_MAX2 x RSET
Note: In consideration of the external component variations, please design with sufficient margin.
Note: VCC_MAX is the maximum supply voltage, VOUT_MAX is the maximum output voltage detect by OVP.
(b) Boost application
VCC
RCS
CS
OUTH
SW
L
D1
M1
COUT
OUTL
PWMOUT
FB
M2
RSET
Figure 39. Boost application
Rated current
>IOCP_MAX
>IOCP_MAX
Rated Voltage
―
> VOUT_MAX
> VOUT_MAX
Heat Loss
Coil L
Diode D1
MOSFET M1
RCS
COUT
MOSFET M2
RSET
―
―
―
>IOCP_MAX
―
―
―
> IOCP_MAX2 x RCS
> VOUT_MAX
> VOUT_MAX
―
―
> ILED_MAX
―
―
> IOCP_MAX2 x RSET
Note: In consideration of the external component variations, please design with sufficient margin.
Note: VCC_MAX is the maximum supply voltage, VOUT_MAX is the maximum output voltage detect by OVP.
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(c) Buck application
VCC
RCS
CS
OUTH
SW
M1
L
D2
D1
COUT
M2
PWMOUT
FB
RSET
Figure 40. Buck application
Rated current
Rated Voltage
Heat Loss
>IOCP_MAX
>IOCP_MAX
>IOCP_MAX
>IOCP_MAX
―
Coil L
Diode D1
Diode D2
MOSFET M1
RCS
―
―
―
―
―
> VCC_MAX
> VOUT_MAX
> VCC_MAX
―
> IOCP_MAX2 x RCS
> VCC_MAX
> VCC_MAX
COUT
MOSFET M2
―
―
―
> ILED_MAX
RSET
―
―
> IOCP_MAX2 x RSET
Note: In consideration of the external component variations, please design with sufficient margin.
Note: VCC_MAX is the maximum supply voltage, VOUT_MAX is the maximum output voltage detect by OVP.
(10) Selection of the output capacitor
Select the output capacitor COUT based on the requirement of the ripple voltage Vpp.
Buck-Boost
ILED
VCC
1
Vpp
(IL _ MAX I / 2) RESR
L
COUT VOUT VCC fOSC
ESR of output capacitor :RESR
Buck
1
ILED
1
Vpp
(IL _ MAX RESR)
COUT
fOSC
Boost
IL
8
1
1
Vpp IL RESR
COUT fOSC
(11) Selection of the input capacitor
A capacitor at the input is also required as the peak current flows between the input and the output terminals in DC/DC
conversion. We recommend an input capacitor greater than 10µF with the ESR smaller than 100mΩ. The input
capacitor outside of our recommendation may cause large ripple voltage at the input and hence may lead to
malfunction.
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(12) Phase Compensation Guidelines
In general, the negative feedback loop is stable when the following condition is met:
(a) Overall gain of 1 (0dB) with a phase lag of less than 150º (i.e., Phase margin of 30º or more)
However, as the DC/DC converter constantly samples the switching frequency, the gain-bandwidth (GBW) product of
the entire series should be set to 1/10 of the switching frequency of the system. Therefore, the overall stability
characteristics of the application are as follows:
(b) Overall gain of 1 (0dB) with a phase lag of less than 150º (i.e., Phase margin of 30º or more)
(c) GBW (frequency at gain 0dB) of 1/10 of the switching frequency
Thus, to improve response within the GBW product limits, the switching frequency must be increased.
The key for achieving stability is to place fz near to the GBW. GBW is decided by phase delay fp1 in terms of COUT and
output impedance RL. fz and fp1 are defined by the following formula.
VOUT
1
Phase lead fz
Phase lag fp1
Hz
2CpcRpc
1
[Hz]
LED
2RLCOUT
FB
COMP
A
VOUT
RL
[]
RPC
CPC
IOUT
Good stability would be obtained when the fz is set between 1kHz to 10kHz.
Please substitute the value of the maximum load for RL.
In Buck-Boost/ Buck application, Right-Hand-Plane (RHP) Zero exists. This Zero has no gain but a pole characteristic in
terms of phase. As this Zero would cause instability when it is in the control loop, it is necessary to bring this zero before
the GBW.
2
VO (VCC
/
VOUT VCC
)
UT
fRHP
Hz
2 IOUT L
where:
IOUT: Maximum Load Current
It is important to keep in mind that these are very loose guidelines, and adjustments may have to be made to ensure
stability in the actual circuit. It is also important to note that stability characteristics can change greatly depending on
factors such as substrate layout and load conditions. Therefore, when designing for mass-production, stability should
be thoroughly investigated and confirmed in the actual physical design.
(13) Verification of the operation by taking measurements
The overall characteristic may change by load current, input voltage, output voltage, inductance, load capacitance,
switching frequency and the PCB layout. We strongly recommend verifying your design by taking the actual
measurements.
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BD8381AEFV-M
13. Calculation of the Power consumption
(1) Buck-Boost application
1
1
Pc
N
ICC VCC
Ciss1 (VREG )2 fOSC 2 2 Ciss2 (VREG )2 fPWM 2
2
2
LSI Operation
Power consumption
IC power consumption of external
FET driver for DC/DC switching
IC power consumption of external
FET driver for PWM dimming
OUTH/OUTL
FET 2conponents
(2) Boost or Buck application
1
1
Pc
N
ICC VCC
Ciss1(VREG )2 fOSC 21 Ciss2(VREG )2 fPWM 2
2
2
LSI Operating
Power
IC power consumption of external
FET driver for DC/DC switching
IC power consumption of external
FET driver for PWM dimming
consumption
OUTH/OUTL
FET 1conponent
Where:
CC：Maximum circuit Current
CC：Power supply voltage
iss1：External FET capacity of DC/DC switching
OSC：DC/DC switching frequency
iss2：External FET capacity of PWM dimming
PWM：PWM frequency
N：PCB layers
I
V
C
f
C
f
<Sample Calculation > When we assume value for Pc such as:
ICC=7mA, VCC=30V, Ciss1=500pF, fOSC=300kHz, fPWM=200Hz, Ciss2=1500pF, N=4Layer
1
1
Pc(4) 7mA30V 500 pF5V 300kHz5V 22 1500 pF 5V 200Hz 5V 2
2
2
it becomes Pc = approximately 210mW.
6.0
(1)θ ja=26.6℃/W(4 layer board, and area of cupper foil is 89%)
(2)θ ja=37.9℃/W(2 layer board, and area of cupper foil is 89%)
(3)θ ja=67.6℃/W(2 layer board, and area of cupper foil is 4.6%)
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
(1) 4.70W
(2) 3.30W
(3) 1.85W
0
25
50
75
100
125
150
Temp Ta [℃]
Figure 41
Note1: The value of Power consumption: on glass epoxy board measuring 70mmx70mmx1.6mm
(1 layer board/Copper foil thickness 18um)
Note2: The value changes depending on the density of the board copper foil.
However, this value is an actual measurement value and no guarantee value.
HTSSOP-B28
Pd=1.85W (0.37W)： Board copper foil area 225mm2
Pd=3.30W (0.66W)： Board copper foil area 4900mm2
Pd=4.70W (0.94W)： Board copper foil area 4900mm2
The value in () is an power dissipation in Ta = 125 degrees.
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BD8381AEFV-M
I/O Equivalent Circuits
1. COMP
2. SS
4. EN
VREG
VREG
VREG
VCC
833Ω
EN
10kΩ
25kΩ
SS
10kΩ
667Ω
667Ω
COMP
100kΩ
833Ω
5. RT
6. SYNC
8. THM
VREG
VCC
VREG
VREG
VREG
THM
500kΩ
SYNC
10kΩ
RT
500Ω
12.5Ω
150kΩ
9. FB
10. DISC
11. VTH
VREG
VREG
VCC
DISC
VTH
FB
10kΩ
50Ω
2.5kΩ
12. DRLIN
13,14. FAIL1,FAIL2
15. OVP
VREG
VCC
FAIL1
FAIL2
10kΩ
10kΩ
DRLIN
OVP
1kΩ
100kΩ
100kΩ
(Note) The values are all Typ value.
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BD8381AEFV-M
I/O Equivalent Circuits – continued
16,17. LEDC, LEDR
19,22. PWMOUT, OUTL
20. CT
VREG
20kΩ
VREG
VREG
VREG
VREG
LEDC
LEDR
50kΩ
1kΩ
CT
PWMOUT
OUTL
10kΩ
100kΩ
24. SW
25. OUTH
26. CS
VCC
BOOT
BOOT
VCC
SW
OUTH
5kΩ
CS
100kΩ
SW
SW
SW
SW
27. BOOT
28. VREG
VCC
VCC
VREG
BOOT
VREG
210kΩ
100kΩ
SW
SW
(Note) The values are all Typ value.
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BD8381AEFV-M
Operational Notes
1.
2.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power
supply pins.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the
digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog
block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and
aging on the capacitance value when using electrolytic capacitors.
3.
4.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.
Thermal Consideration
Should by any chance the power dissipation rating be exceeded the rise in temperature of the chip may result in
deterioration of the properties of the chip. In case of exceeding this absolute maximum rating, increase the board size
and copper area to prevent exceeding the Pd rating.
6.
7.
Recommended Operating Conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately
obtained. The electrical characteristics are guaranteed under the conditions of each parameter.
Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may
flow instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power
supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring,
and routing of connections.
8.
9.
Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply
should always be turned off completely before connecting or removing it from the test setup during the inspection
process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during
transport and storage.
10. Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment)
and unintentional solder bridge deposited in between pins during assembly to name a few.
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BD8381AEFV-M
Operational Notes – continued
11. Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and
cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the
power supply or ground line.
12. Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should
be avoided.
Resistor
Transistor (NPN)
Pin A
Pin B
Pin B
B
E
C
Pin A
B
C
E
P
P+
P+
N
P+
P
P+
N
N
N
N
N
N
N
Parasitic
Elements
Parasitic
Elements
P Substrate
GND GND
P Substrate
GND
GND
Parasitic
Elements
Parasitic
Elements
N Region
close-by
Figure 42. Example of monolithic IC structure
13. Area of Safe Operation (ASO)
Operate the IC such that the output voltage, output current, and power dissipation are all within the Area of Safe
Operation (ASO).
14. Thermal Shutdown Circuit(TSD)
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always
be within the IC’s power dissipation rating. If however the rating is exceeded for a continued period, the junction
temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. When the Tj falls below
the TSD threshold, the circuits are automatically restored to normal operation.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from
heat damage.
TSD ON temperature [°C] (typ)
175
Hysteresis temperature [°C] (typ)
25
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BD8381AEFV-M
Ordering Information
B D
8
3
8
1
A E
F
V
-
M E 2
Part
Number
Package
EFV:HTSSOP-B28
Packaging and forming specification
E2: Embossed tape and reel
M: Automotive
Marking Diagram
HTSSOP-B28 (TOP VIEW)
Part Number Marking
LOT Number
BD8381AEF
1PIN MARK
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Physical Dimension, Tape and Reel Information
Package Name
HTSSOP-B28
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Revision History
Date
Revision
001
Changes
31.Oct.2014
New Release
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Notice
Precaution on using ROHM Products
(Note 1)
1. If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment
,
aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,
bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales
representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any
ROHM’s Products for Specific Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅣ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅢ
2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3. Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.
Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the
use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our
Products under any special or extraordinary environments or conditions (as exemplified below), your independent
verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4. The Products are not subject to radiation-proof design.
5. Please verify and confirm characteristics of the final or mounted products in using the Products.
6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7. De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual
ambient temperature.
8. Confirm that operation temperature is within the specified range described in the product specification.
9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-SS
Rev.003
© 2013 ROHM Co., Ltd. All rights reserved.
Precautions Regarding Application Examples and External Circuits
1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2. You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
QR code printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since our Products might fall under controlled goods prescribed by the applicable foreign exchange and foreign trade act,
please consult with ROHM representative in case of export.
Precaution Regarding Intellectual Property Rights
1. All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data. ROHM shall not be in any way responsible or liable
for infringement of any intellectual property rights or other damages arising from use of such information or data.:
2. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the information contained in this document.
Other Precaution
1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4. The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-SS
Rev.003
© 2013 ROHM Co., Ltd. All rights reserved.
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General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall not be in an y way responsible or liable for failure, malfunction or accident arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3. The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for any damages, expenses or losses incurred by you or third parties resulting from inaccuracy or errors of or
concerning such information.
Notice – WE
Rev.001
© 2014 ROHM Co., Ltd. All rights reserved.
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