BD9397EFV [ROHM]
White LED Driver for large LCD panel;
| 型号： | BD9397EFV |
| 厂家： | 
ROHM |
| 描述： | White LED Driver for large LCD panel CD |
| 文件： | 总31页 (文件大小：1107K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Datasheet
LED Drivers for LCD Backlights
White LED Driver for large LCD
panel
BD9397EFV
●General Description
●Features
BD9397EFV is a high efficiency driver for white LEDs
and designed for large LCD panel. This IC is built-in
high current drive and high responsibility type 6ch LED
drivers and 1ch boost DCDC converter. BD9397EFV
has some protect function against fault conditions,
such as the over-voltage protection (OVP), LED OPEN
and SHORT protection, the over current limit
protection of DCDC (OCP). Therefore BD9397EFV is
available for the fail-safe design over a wide range
output voltage.
■ 6ch Constant LED drivers, available 400mA drive
per 1ch.
■
■
Constant current accuracy ±1.8% (IC only)
Each 6ch external PWM inputs can control independent
dimming .
■
■
■
Current analog (linear) dimming by VREF
1ch boost controller with current mode (external FET)
Several protection functions
DCDC part
: OCP/OVP/UVLO/TSD
LED driver part :OPEN,SHORT detection
SHORT detection voltage is set by LSP terminal.
Error detection output FAIL terminal inside
(normal=Open, error=Drain)
■
■
●Key Specification
Operating power supply voltage range: 9.0V to 35.0V
Oscillator frequency:
Operating Current:
500kHz (RT=30kΩ)
9mA (typ.)
Operating temperature range:
-40°C to +85°C
●Package
W(Typ.) D(Typ.) H(Max.)
13.60mm x 7.80mm x 1.00mm
0.65mm
●Applications
HTSSOP-B40
Pin Pitch:
TV, Computer Display, Notebook, LCD Backlighting
●Typical Application Circuit
Vin
Cin
+
Cout
REG9V
UVLO
OVP
VCC
VCC
STB
VREG
UVLO
(VCC)
UVLO
TSD
OVP
SCP
CVCC
FAIL_MODE
FAIL
CP
PROTECTION
Logic
FAIL_RST
Filter
PWM
REG9V
COMP
RT
+
OSC
SS
+
-
-
N
Control
Logic
PGND
SS
DRIVER
REG9V
Current
Sense
CS
M_DET
LED1
ERR
AMP
-
-
-
-
FB
LED_LV
REG9V
LSP
+
-
-
+
RFB
CFB
S1
OPEN/SHORT
Detect
VREF
1/5
+
-
LED6
S6
+
-
PWM１
PWM6
Figure 2. HTSSOP-B40
AGND
AGND
N.C.
Figure 1. Typical Application Circuit
○Product structure：Silicon monolithic integrated circuit ○This product has not designed protection against radioactive rays
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●Absolute maximum ratings (Ta=25°C)
Parameter
Symbol
Ratings
Unit
Operating Temperature Range
Storage Temperature Range
Power Dissipation
Ta(opr)
Tstg
Pd
-40 to +85
-55 to +150
4.7 *1
°C
°C
W
Thermal resistance between junction and case
Maximum Junction Temperature
Maximum LED output current
θjc
7 *2
°C/W
°C
Tjmax
ILED
150
400 *3 *4
mA
*1 In the case of mounting 4 layer glass epoxy base-plate of 70mm×70mm×1.6mm, 37.6mW is reduced at 1°C above Ta=25℃.
*2 In the case of mounting 4 layer glass epoxy base-plate of 70mm×70mm×1.6mm.
*3 Wide VF variation of LED increases loss at the driver, which results in rise in package temperature. Therefore, the board needs to be designed
with attention paid to heat radiation.
*4 This current value is per 1ch. It needs be used within a range not exceeding Pd.
●Operating Ratings (Ta = 25°C)
Parameter
Power supply voltage
Symbol
VCC
Range
9 to 35
Unit
V
FCT
100 to 1250 *5
0.2 to 2.5
0.8 to 3
kHz
V
DC/DC oscillation frequency
VREF input voltage
VREF
VLSP
VFB
LSP terminal input voltage
FB terminal output voltage
M_DET terminal output voltage
V
0 to 3.3
V
VM_DET
0 to REG9V
V
The operating conditions written above are constants of the IC unit. Be careful enough when setting the constant in the actual set.
●External Components Recommended Range
Item
VCC terminal connection capacitance
Soft-start set capacitance
Symbol
CVCC
SS
Setting Range
1.0 to 10
Unit
μF
0.001 to 1.0
0.001 to 2.7
12 to 150
μF
Timer latch set capacitance
CP
μF
Operating frequency set resistance
RT
kΩ
REG9V terminal connection capacitance
CREG9V
2.2 to 10
μF
The values described above are constants for a single IC. Adequate attention must be paid to setting of a constant for an actual set of parts
●Pin Configuration
●Physical Dimension Tape and Marking Diagram
BD9397EFV
LOT No.
Figure 3.
Figure 4. HTSSOP-B40
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●1.1 Electrical Characteristics 1(Unless otherwise specified, Ta=25°C，VCC=24V)
Limit
Parameter
【Whole device】
Symbol
Unit
Condition
Min.
Typ.
Max.
STB=3V,LED1-6=ON,
RT=30kΩ
Operating circuit current
ICC
-
-
9
16
20
mA
Stand-by circuit current
【REG9V block】
ISTB
12
μA
STB=0V
REG9V output voltage
REG9V
IREG9V
8.9
20
9.0
-
9.1
-
V
IO=0mA
Maximum REG9V output current
mA
【Switching block】
N terminal source resistance
N terminal sink resistance
【Over current protection (OCP) block】
Over current protection voltage
【Soft-start block】
RONH
RONL
-
-
2.5
3.0
3.5
4.2
Ω
Ω
ION=-10mA
ION=10mA
VOCP
0.40
0.45
0.50
V
VCS=SWEEP UP
SS=SWEEP UP
SS terminal source current
SS terminal release voltage
【Error amplifier block】
LED control voltage
ISS
-1.4
2.9
-1.0
3.0
-0.6
3.1
μA
VSS
V
VLED
IFBSINK
0.66
55
0.7
100
-100
0
0.74
155
-55
2
V
LED_LV=0.7V
FB sink current
μA
μA
uA
LED=2.0V, VFB=1.0V
LED=0V, VFB=1.0V
VLED_LV=3V
FB source current
IFBSOURCE
ILED_LV
-155
-2
LED_LV terminal input current
【CT oscillator block】
Oscillation frequency
FCT
440
78
500
84
560
91
kHz
%
RT=30kΩ
MAX DUTY
DMAX
【Over voltage protection (OVP) block】
OVP detection voltage
OVP hysteresis voltage
VOVP
2.34
10
2.43
50
2.52
100
V
VOVP=SWEEP UP
VOVPHYS
mV
VOVP=SWEEP DOWN
PMW1-6=0V,SS=2.8V,
VLED_LV=0.7V
OVP feedback voltage
FBOVP
0.93
1.05
1.17
V
【Short current protection (SCP) block】
VOVP=SWEEP DOWN,
FAILMODE=0V
VOVP=SWEEP DOWN,
FAILMODE=3V
VSCPmL
VSCPmH
0.12
0.74
0.20
0.79
0.28
0.84
V
V
Short circuit protection voltage
【M_LED block】
Diode forward voltage
VFLED
VFOFFSET
RM_DET
1120
-
1340
-
1560
20
mV
mV
kΩ
VLED=0V
VLED=0V
Forward voltage offset each ch
REG9V pull up resistance
60
100
140
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●1.2 Electrical Characteristics 2(Unless otherwise specified, Ta=25°C，VCC=24V)
Limit
Parameter
Symbol
Unit
Condition
Min.
Typ.
Max.
【UVLO block】
Operation power source voltage (VCC)
Hysteresis voltage (VCC)
VUVLO_VCC
VUHYS_VCC
VUVLO_U
VUHYS_U
RUVLO
7.0
150
2.375
50
7.5
300
2.5
8.0
600
V
VCC=SWEEP UP
mV
V
VCC=SWEEP DOWN
VUVLO=SWEEP UP
VUVLO=SWEEP DOWN
VUVLO=3V
UVLO Release voltage
2.625
150
Hysteresis voltage (UVLO)
UVLO terminal input resistance
100
610
mV
kΩ
370
850
【Filter block】
CP detection voltage
VCP
ICP
1.9
2.0
2.1
V
CP=SWEEP UP
VCP=0V
CP source current
-1.2
-1.0
-0.8
μA
【LED driver block】
196
294.6
392.8
491
200
300
400
500
204
305.4
407.2
509
mV
mV
mV
mV
VREF=1.0V
VREF=1.5V
VREF=2.0V
VREF=2.5V
S terminal voltage
VSLED
LED current rise time
LED current fall time
OPEN detection voltage
ILEDtr
ILEDtf
-
-
400
100
0.20
760
280
0.28
ns
ns
V
VREF=0.3V,RS=2Ω
VREF=0.3V,RS=2Ω
VLED=SWEEP DOWN
VOPEN
0.12
VLED=SWEEPUP,
VLSP=1.2V
SHORT detection voltage
VSHORT
5.7
6.0
6.3
V
SHORT MASK voltage
VSHTMASK
IVREF
2.85
-2
3.0
0
3.15
2
V
VREF terminal input current
LSP terminal input current
μA
μA
VVREF=3V
VLSP=3V
ILSP
-2
0
2
【STB block】
STB terminal HIGH voltage
STBH
STBL
RSTB
2.0
-0.3
0.5
-
-
VCC
0.8
V
V
STB terminal LOW voltage
STB terminal Pull Down resistance
1.0
1.5
MΩ
STB=3V
【PWM IN block】
PWM terminal HIGH voltage
PWMH
PWML
RPWM
2.0
-0.3
200
-
-
20
0.8
400
V
V
PWM terminal LOW voltage
PWM terminal Pull Down resistance
300
kΩ
PWM=3V
【FAIL_MODE,FAIL_RST,SUMPWM block】
Input terminal High voltage
VINH
VINL
RVIN
2.0
-0.3
60
-
-
20
0.8
140
V
V
Input terminal Low voltage
Input terminal Pull Down resistance
【FAIL block（OPEN DRAIN）】
FAIL LOW output voltage
100
kΩ
VIN=3V
VOL
0.25
0.5
1.0
V
IOL=1mA
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●1.3 Pin Descriptions
rating
[V]
No
In/Out
Function
Pin name
1
IN
OUT
OUT
-
Power source terminal
VCC
FAIL
-0.3 to 36
2
Abnormality detection output terminal (OPEN DRAIN)
9V regulator output terminal
-0.3 to 36
-0.3 to 13
-
3
REG9V
N.C.
4
Non connection terminal
5
OUT
IN
DC/DC switching output terminal
N
-0.3 to 13
-
6
Power GND terminal
PGND
CS
7
IN
DC/DC FET output current detection terminal
Overvoltage protection detection terminal
LED Diode OR output terminal
-0.3 to 7
-0.3 to 7
-0.3 to 13
-
8
IN
OVP
9
OUT
IN
M_DET
AGND
LED1
LED2
LED3
LED4
LED5
LED6
STB
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
GND terminal for analog part
OUT
OUT
OUT
OUT
OUT
OUT
IN
LED output 1
-0.3 to 50
-0.3 to 50
-0.3 to 50
-0.3 to 50
-0.3 to 50
-0.3 to 50
-0.3 to 36
-0.3 to 22
-0.3 to 22
-0.3 to 22
-0.3 to 22
-0.3 to 22
-0.3 to 22
-0.3 to 22
-0.3 to 7
-0.3 to 7
-0.3 to 7
-0.3 to 7
-0.3 to 7
-0.3 to 7
-0.3 to 7
-0.3 to 7
-0.3 to 7
-0.3 to 7
-0.3 to 7
-0.3 to 7
-0.3 to 7
-0.3 to 7
-0.3 to 10.5
-
LED output 2
LED output 3
LED output 4
LED output 5
LED output 6
Standby control terminal
IN
PWM1
PWM2
PWM3
PWM4
PWM5
PWM6
FAIL_RST
S6
PWM dimming input signal terminal for LED 1
PWM dimming input signal terminal for LED 2
PWM dimming input signal terminal for LED 3
PWM dimming input signal terminal for LED 4
PWM dimming input signal terminal for LED 5
PWM dimming input signal terminal for LED 6
FAIL output reset terminal
IN
IN
IN
IN
IN
IN
IN
Connecting terminal for LED 6 constant current setting resistor
Connecting terminal for LED 5 constant current setting resistor
Connecting terminal for LED 4 constant current setting resistor
Connecting terminal for LED 3 constant current setting resistor
Connecting terminal for LED 2 constant current setting resistor
Connecting terminal for LED 1 constant current setting resistor
Connecting terminal for non-reaction time setting capacitor
Connecting terminal for soft-start time setting capacitor
Error amplifier output terminal
S5
IN
S4
IN
S3
IN
S2
IN
S1
IN
CP
OUT
OUT
OUT
OUT
IN
SS
FB
RT
Connecting terminal for DC/DC frequency setting resistor
Analog dimming DC voltage input terminal
LED control voltage set terminal
VREF
LED_LV
LSP
IN
IN
LED SHORT detection voltage setting terminal
FAIL function change terminal
FAIL_MODE
UVLO
AGND
IN
IN
Low voltage malfunction prevention detection terminal
GND terminal for analog part
IN
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●1.4.1 I/O equivalence circuit
REG9V / N / PGND / CS
SS
FB
FB
LED1 to LED6, S1 to S6
CP
UVLO
LED1-6
CP
S1-6
PWM1 to PWM6
VREF
LSP,LED_LV
PWM1-6
VREF
LSP
300k
RT
OVP
FAIL
FAIL
RT
500
STB
FAIL_MODE / FAIL_RST
M_DET
STB
1M
Figure 5. I/O equivalence circuit
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●1.5Typical Performance Curves（reference data）
50
40
30
20
10
0
14
12
10
8
STB=0V
PWM1-6=0V
Ta=25°C
6
STB=3V
4
PWM1-6=0V
Ta=25°C
2
0
10
14
18
22
VCC [V]
26
30
34
10
14
18
22
VCC [V]
26
30
34
Figure 6. Circuit current
Figure 7. Stand-by circuit current
100
80
60
40
20
0
1000
800
600
400
200
0
VCC=24V
RS=2Ω
VCC=24V
LED1=2.5V
Ta=25°C
Ta=25°C
0
1
2
VREF [V]
3
4
0
1
2
FB [V]
3
4
Figure 8. FB v.s. Duty Cycle
Figure 9. VREF v.s. Sx
60
30
0
VCC=24V
RS=20Ω
Ta=25°C
0
1
2
3
PWM1 [V]
Figure 10. PWM terminal threshold voltage
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●2 Block Diagram
Vin
Cin
+
Cout
REG9V
UVLO
OVP
VCC
VCC
STB
VREG
UVLO
(VCC)
UVLO
TSD
OVP
SCP
CVCC
FAIL_MODE
FAIL
CP
PROTECTION
Logic
FAIL_RST
Filter
PWM
REG9V
COMP
RT
+
OSC
SS
+
-
-
N
Control
Logic
PGND
SS
DRIVER
REG9V
Current
Sense
CS
M_DET
LED1
ERR
AMP
-
-
-
-
FB
LED_LV
REG9V
LSP
+
-
-
+
RFB
CFB
S1
OPEN/SHORT
Detect
VREF
1/5
+
-
LED6
S6
+
-
PWM１
PWM6
AGND
AGND
N.C.
Figure 11. Block Diagram
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●3.1 Pin Configuration
1 pin. VCC
Power supply terminal of IC. The input range is 9 to 35V.
The operation starts over VCC＝7.5V(typ.) and the system stops under VCC=7.2V(typ.).
2 pin. FAIL
FAIL signal output terminal (NMOS open-drain). NMOS is OPEN at the normal operation so FAIL pin is Hi-Z. NMOS
becomes ON state (500 ohm typ.) at the abnormal detection. It is possible to select the FAIL type from latch type
(FAIL_MODE=L) or one shot pulse (FAIL_MODE=H).Please refer to the detail explanation＜38pin. FAIL_MODE terminal＞
3 pin. REG9V
REG9V is a 9 V output pin used delivering 20mA at
maximum for switching power supply of N terminal.
Use at a current higher than 20mA may affect the reference
voltage within IC, which may result in malfunction. It will also
cause heating of IC itself. Therefore it is recommended to set
the load as small as possible.
The characteristic of VCC line regulation at REG9V is shown
as figure. VCC must be used in more than 10.5V for stable
9V output.
Install an oscillation prevention ceramic capacitor (2.2 to 10μF)
nearest to VREG between VREG-AGND terminals.
Figure 12.
4 pin. N.C
Non connect pin. Please set it the open state or deal with connecting the GND.
5 pin. N
Gate driving output pin of external NMOS of DC/DC converter with 0 to 9V (REG9V) swing. Output resistance of High side
is 2.5 ohm(typ.), Low side is 3.0 ohm(typ.) in ON state. The oscillation frequency is set by a resistance connected to RT pin.
For details, see the explanation of <34pin. RT terminal>.
6pin. PGND
Power GND terminal of output terminal, N driver:
7pin. CS
Inductor current detection resistor connecting terminal of DC/DC current mode: it transforms the current flowing through the
inductor into voltage by sense resistor RCS connected to CS terminal, and this voltage is compared with that set in the error
amplifier by current detection comparator to control DC/DC output voltage. RCS also performs over current protection
(OCP) and stops switching action when the voltage of CS terminal is 0.45 V (typ.) or higher (Pulse by Pulse).
8 pin. OVP
OVP terminal is the detection terminal of overvoltage protection (OVP) and short circuit protection (SCP) for DC/DC output
voltage. Depending on the setting of the FAIL_MODE terminal, FAIL and CP terminal behave differently when an
abnormality is detected. For details, see the table for each protection operation is described in ●3.2 and ●3.3.
During the soft start (SS), there is a function which returns the OVP voltage to error amplifier to boost DC/DC output voltage
at all Low PWM (OVPFB function). After completion of SS, this function is disabled.
9 pin. M_DET
The Di OR output terminal of LED 1 to 6. The output is the voltage which is added a diode forward voltage(two diode stack)
to the lowest voltage among 6 LED terminals.
10pin. AGND
Analog GND for IC
11 to 16pin. LED1 to LED6
LED constant current driver output terminal. Setting of LED current value is adjustable by setting the VREF voltage and
connecting a resistor to S terminal. For details, see the explanation of <25 to 30pin. S1 to S6, 35pin. VREF >.
The PWM dimming frequency of LED current driver and upper/lower limit of the duty need to be set in a manner that
necessary linearity of PWM dimming characteristics can be secured referring to the following figures:
Start/Stop time of constant current driver (PWM pulse response)
Start-up time depends on the VREF value; the response becomes quick, so that voltage is high.
In the way of reference, the current response upon application of current rise rate and pulse PWM1us (current pulse) to
describe the dependence of VREF. It needs to be adequately verified with an actual device because the response rate may
vary with application conditions.
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Figure 13.
Figure 14.
17pin. STB
ON/OFF setting terminal for IC, which can be used perform a reset at shutdown.
* The voltage of STB input in the sequence of VCC → STB.
* Voltage input in STB terminal switches the state of IC (IC ON/OFF). Using the terminal between the 2 states (0.8 to 2.0 V)
needs to be avoided.
18 to 23pin. PWM1 to PWM6
ON/OFF terminal of LED driver: it inputs PWM dimming signal directly to PWM terminal and change of DUTY enables
dimming. High/Low level of PWM terminal is shown as follows:
State
PWM voltage
PWM= 2.0 to 20V
PWM= -0.3 to 0.8V
LED ON
LED OFF
24pin.FAIL_RST
Reset terminal of the protection circuit and FAIL terminal:
Return the latch stopped protection block by setting the FAIL_RST to High. During High state, operation is masked by the
latch system protection.
25 to 30pin. S1 to S6, 35pin. VREF
S terminal is a connecting terminal for LED constant current setting resistor, output current ILED is in an inverse relationship
to the resistance value.
VREF terminal is a terminal for analog dimming; output current ILED is in a proportional relationship to the voltage value to
be input.
VREF terminal is assumed that it is set by dividing the resistance with a high degree of accuracy, VREF terminal inside the
IC is in open state (High Impedance). It is necessary to input voltage to divide the resistance from the output of REG9V or
use external power source. Using the terminal in open state needs to be avoided.
The relationship among output current ILED, VREF input voltage, and RS resistance has the following equation:
VREF[V]
I
LED
0.2[A]ꢀꢀ
RS[Ω]
The voltage of S terminal is following equation:
↓ILED
LED
VS 0.2VREF[V ]ꢀꢀ
+
-
VREF=1.2V, RS=2 [Ω]
ILED=120[mA]
S 240mV
RS
Figure 15.
*Attention: Rises LED current accelerate heat generation of IC. Adequate consideration needs to be taken to thermal design
in use.
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* For the adjustment of LED current with analog dimming by VREF, note that the output voltage of the DC/DC converter
largely changes accompanied by LED VF changes if the VREF voltage is changed rapidly. In particularly, when the VREF
voltages become high to low, it makes the LED terminal voltage seem higher transiently, which may influence application
such as activation of the LED short circuit protection. It needs to be adequately verified with an actual device when analog
dimming is used.
31pin. CP
Terminal which sets the time from detection of abnormality until shutdown (Timer latch). When the LED short protection,
LED open protection or SCP is detected, it perform s constant current charge of 1.0uA (typ.) to external capacitor. When the
CP terminal voltage reaches 2.0V (typ.), the IC is latched and FAIL terminal operates (at FAIL_MODE = L).
32pin. SS
Terminal which sets soft-start time of DC/DC converter: it performs constant current charge of 1.0uA to the external
capacitor connected with SS terminal, which enables soft-start of DC/DC converter.
Since the LED protection function (OPEN/SHORT detection) works when the SS terminal voltage reaches 3.0 V (typ.) or
higher, it must be set to bring stability to conditions such as DC/DC output voltage and LED constant current drive operation,
etc. before the voltage of 3.0 V is detected.
33pin. FB
Output terminal of the error amplifier of DC/DC converter which controls current mode:
The voltage of LED terminal which is the highest VF voltage among 6 LED strings and the voltage of LED_LV terminal
become input of the error amplifier. The DC/DC output voltage is kept constant to control the duty of the output N terminal
by adjusting the FB voltage.
The voltage of other LED terminals is, as a result, higher by the variation of Vf. Phase compensation setting is separately
described in ●3.7 How to set phase compensation.
A resistor and a capacitor need to be connected in series nearest to the terminal between FB and AGND.
The state in which all PWM signals are in LOW state brings high Impedance, keeping FB voltage. This action removes the
time of charge to the specified voltage, which results in speed-up in DC/DC conversion.
34pin. RT
RT sets charge/discharge current determining frequency inside IC.
Only a resistor connected to RT determines the drive frequency inside IC, the relationship has the following equation: FCT
is 500 kHz at RT= 30 kohm.
Figure 16.
Figure 17.
36pin. LED_LV
LED_LV terminal sets the reference voltage error amplifier. LED_LV terminal is assumed that it is set by dividing the
resistance with a high degree of accuracy, LED_LV terminal inside the IC is in open state (High Impedance). It is necessary
to input voltage to divide the resistance from the output of REG9V or use external power source. Using the terminal in open
state needs to be avoided.
According to output current, lowering LED_LV voltage can reduce the loss and heat generation inside IC. However, it is
necessary to ensure the voltage between drain and source of FET inside IC, so LED_LV voltage has restriction on the
following equation.
VLED_LV ≧(LED-S terminal voltage) + 0.2×VREF [V]
For example, at ILED = 100mA setting by VREF = 1V, from figure the voltage between LED and S terminal is required 0.27
V at Tj = 85°C, so LED_LV voltage must be at least a minimum 0.47V.
Note: Rises in VLED_LV voltage and LED current accelerate heat generation of IC. Adequate consideration needs to be
taken to thermal design in use.
Note: LED_LV voltage is not allowed setting below 0.3V.
Note: LED current by raising LED_LV voltage can flow to MAX 400mA, use with care in the dissipation of the package.
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37pin. LSP
Terminal which sets LED SHORT detection voltage: The input
REG9V
impedance of LSP pin is High Impedance, because it is
assumed that the input of LSP terminal is set by dividing the
resistance with a high degree of accuracy.
The LSP terminal is assumed that it is set by dividing the
resistance with a high degree of accuracy, LSP terminal inside
the IC is in open state (High Impedance). It is necessary to input
voltage to divide the resistance from the output of REG9V or use
external power source. Using the terminal in open state needs to
be avoided. Set LSP voltage in the range of 0.8V to 3.0V.
LED_LV
+
-
-
AMP
-
-
-
LED1
LED2
-
LED3
LED4
LED5
LED6
LED
5 VLSP [V ]
SHORT
LEDSHORT：LSP detection Voltage, VLSP：LSP terminal voltage
+
-
The conditions there are restrictions on short LED detection. For
details, see the explanation of section ●3.5.2 Setting the LED
+
-
S1
S2
short detect voltage (LSP pin).
.
+
-
+
-
S3
S4
38pin. FAIL_MODE
+
-
Output mode of FAIL can be change by FAIL_MODE terminal.
When FAIL_MODE is in Low state, the output of FAIL terminal is
the latch mode. FAIL terminal is latched after the CP charge time
from detection of abnormal state. When FAIL_MODE is in High
S5
S6
+
-
Figure 18.
state, the output of FAIL terminal is one-shot-pulse mode. At detected abnormality, firstly FAIL is in Low state (Drain state).
FAIL returns to High state (Open state) if abnormality is cleared after CP charge time, In this mode, there is no latch stop for
protection operation in IC. Monitoring the FAIL with the Microcomputer, decide to stop working IC.
For FAIL_MODE = H when the detection sequence, see the explanation of section ●3.8.3 Protective operation sequence at
FAIL_MODE=H. On application to change modes is prohibited.
39pin. UVLO
UVLO terminal of the power of step-up DC/DC converter: at 2.5 V (typ.) or higher, IC starts step-up operation and stops at
2.4V or lower (typ.). (It is not shutdown of IC.) UVLO can be used to perform a reset after latch stop of the protections.
The power of step-up DC/DC converter needs to be set detection level by dividing the resistance. If any problem on the
application causes noise on UVLO terminal which results in unstable operation of DC/DC converter, a capacitance of
approximately 1000 pF needs to be connected between UVLO and AGND terminals.
40pin. AGND
Analog GND for IC
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●3.2 Protection Operation at FAIL Latch output (FAILMODE=L)
●3.2.1 List of the Threshold Function terminal（typ. condition）
Please decide the resistance divider of the various protection detection using the following table.
Protection
name
Detection
Pin name
Detection condition
Release condition
Protection type
PWM
LEDx < 0.2V(4clk)
SS>3V
Stop the CH latch after the CP
charge is completed.
LED Open
LED short
UVLO
LEDx
LEDx
UVLO
OVP
High
LEDx > 0.2V(*1)
LEDx < 5×VLSP(3clk)
UVLO > 2.5V
LEDx > 5×VLSP(4clk)
SS>3V
Stop the CH latch after the CP
charge is completed.
High
―
Stop the system
Stop the N output
UVLO < 2.4V
OVP > 2.43V
OVP
―
OVP < 2.4V
Stop the N output.
Stop the system after the CP
charge is completed.
SCP
OCP
OVP
CS
OVP < 0.2V
CS > 0.45V
―
―
OVP > 0.2V
CS < 0.45V
Stop the N output under the
detection.（Pulse by Pulse）
It is possible to reset with the FAIL_RST terminal to release the latch stop.
(*1) The release condition of OPEN protection is depend on its release timing.
The timing of release of LEDx voltage (LEDx
0.2V)
No.
The release condition
1
2
LED pin voltage is released during PWM=H.
LED pin voltage is released during PWM=L.
LED pin voltage is normal range during 3clk(3 positive edge)
As PWM=L, LED pin voltage do not exceed Short
protection voltage (VLSP) during more than 3clk. or
PWM positive edge is input when LED pin voltage do not
exceed VLSP for more than 3clk.
●3.2.2 List of Protection function
Action when protection function is detected
Protection function
DC/DC converter
LED driver
Soft-start
FAIL terminal
STB
Stop
Stop
Discharge
OPEN
Normal operation
(Stop when all LED
CH stop)
DRAIN after the CP
charge is completed.
(Latch operation)
Stop after CP charge
(Latch operation)
LED Open
Normal operation
DRAIN after the CP
charge is completed.
(Latch operation)
Normal operation
*1
Stop after CP charge
(Latch operation)
LED short
UVLO
OVP
Normal operation
Discharge
Stop
Stop
GND
Stop N output
Stop N output
Normal operation
Normal operation
Discharge after latch
Normal operation
OPEN
DRAIN after the CP
charge is completed.
(Latch operation)
Stop after CP charge
(Latch operation)
SCP
Stop the N output
(Pulse by Pulse)
OCP
Normal operation
OPEN
（*1）Short protection doesn't hang when becoming remainder 1ch. DCDC output falls as LED short.
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●3.3 Protection operation when the FAIL one shot outputs(FAILMODE=H)
●3.3.1 List of the threshold function terminal （typ. condition）
Please decide the resistance divider of the various protection detection using the following table.
Protection
name
Detection
Pin name
Detection
condition
Release condition
Protection type
PWM
LEDx < 0.2V(4clk)
SS>3V
FAIL drain state under the
detection.
LED Open
LED short
UVLO
LEDx
LEDx
UVLO
High
LEDx > 0.2V(3clk)
LEDx < 5×VLSP(3clk)
UVLO > 2.5V
LEDx > 5×VLSP(4clk)
SS>3V
FAIL drain state under the
detection.
High
UVLO < 2.4V
―
Stop the system.
Stop the system
OVP
SCP
OCP
OVP
OVP
CS
OVP > 2.43V
―
―
―
OVP < 2.4V
OVP > 0.79V
CS < 0.45V
FAIL drain state under the
detection..
Stop the system.
FAIL drain state under the
detection..
OVP < 0.79V
CS > 0.45V
Stop the N output under the
detection.
（Pulse by Pulse）
●3.3.2 List of the protection function
Action when protection function is detected
Protection
function
DC/DC converter
LED driver
Soft-start
FAIL terminal
STB
Stop
Stop
Discharge
OPEN
Normal operation
(Stop when the all CH
stop)
DRAIN under
the detection
LED Open
Normal operation
Normal operation
DRAIN under
the detection
LED short
UVLO
OVP
Normal operation
Stop
Normal operation
Stop
Normal operation
Discharge
DRAIN
DRAIN
DRAIN
OPEN
Stop the N output
Stop the N output
Normal operation
Normal operation
Normal operation
Normal operation
Normal operation
Normal operation
SCP
Stop the N output
(Pulse by Pulse)
OCP
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●3.4 Setting of the external components.（typ. condition）
●3.4.1 Setting the LED current (VREF and Sx pin)
First, VREF pin voltage is determined. When performing Analog dimming, be careful of VREF pin input range (0.2 to 2.5V)
and decide typical voltage.
In BD9397EFV, LED constant current is controlled by Sx terminal voltage as a reference point. Sx terminal is controlled to
become one fifth of the voltage of VREF terminal voltage. In the case of VREF=1V, it is set to Sx=0.2V.
Therefore, when the resistance to Sx terminal versus GND is set to "RS", the relationship between RS, VREF and ILED is
as follows
VVREF [V ]
RS [ohm]
REG9V=9V
ILED [A]5
R1
LSP
COMP
●3.4.2 Setting the LED short detect voltage (LSP pin)
The voltage of LED short detection can be arbitrarily set up with LSP pin
voltage.
LSP
+
CLSP
R2
LSP pin cannot be used by OPEN because of High Impedance. Please be
sure to applied voltage from the exterior. About LED short detection voltage,
if "VLEDshort" and LSP pin voltage are set to "VLSP", it is as follows.
-
3200kΩ
800kΩ
LEDx
VLEDshort [V ]
VLSP [V ]
5
Figure 19.
Since the setting range of a LSP pin is set to 0.8V to 3.0V, VLEDshort
can be set up in 4Vto15V.
○Equation of setting LSP detect Voltage
When the detection voltage VLSP of LSP is set up by resistance division of R1 and R2 using REG9V,
it becomes like the following formula.
R2
VLED REG9V
5 [V]
short
R1 R2
*Also including the variation in IC, please also take the part variation in a set into consideration for an actual constant
setup, and inquire enough to it.
●3.4.3 Timer latch time(CP pin)
When various abnormalities are detected, the source current of 1.0uA is first flowed from CP pin.
BD9397EFV don’t stop by latch, unless abnormal state is continues and CP pin voltage reaches continues 2V.
With the capacity linked to CP pin, the unresponded time from detection to a latch stop. The relationship between the
unresponded time “Tcp” and CP pin connection capacitor “Ccp” is as follows.
TCP [S]1.0106[A]
CCP [F]
2.0 [V]
●3.4.4 Setting the soft-start time (SS pin)
The starting time of a DCDC output is dependent on SS pin connection capacity.
Moreover, although SS pin is charged by source current of 1uA, IC does not perform LED protection as under DCDC
starting state until SS pin voltage arrive to 3.0V.
(The soft starting time set up here should be the mask time of a under [ starting ], and please keep in mind that it differs
from time until a DCDC output is stabilized.)
Time until a DCDC output is stabilized is greatly dependent on a ratio of step-up or load.
The relationship between soft starting time "TSS" and SS pin connection capacity "CSS" is as follows.
TSS [S]1.0106 [A]
CSS [F]
3.0 [V]
●3.4.5 DCDC operation frequency (RT pin)
The oscillation frequency of the DCDC output is decided by RT resistance.
BD9397EFV is designed to become a 500-kHz setup at the time of 30kohm.
RT resistance and frequency have a relation of an inverse proportion, and become settled as the following formula.
1.51010
fsw =DCDC convertor oscillation frequency [Hz]
RRT
[]
fSW
Please connect RT resistance close as much as possible from RT pin and an AGND pin.
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●3.4.6 Maximum DCDC output voltage(Vout ,Max)
The DCDC output maximum voltage is restricted by Max Duty of N output.
Moreover, the voltage needed in order that Vf may modulate by LED current also with the same number of LEDs.
Vf becomes high, so that there is generally much current.
When you have grasped the variation factor of everythings, such as variation in a DCDC input voltage range, the variation
and temperature characteristics of LED load, and external parts, please carry out a margin setup.
●3.4.7 Setting the OVP
VOUT
In BD9397EFV, when over voltage in VOUT line is detected,
the instant stop of the N pin output is carried out, and
voltage rise operation is stopped. But the latch stop by CP
charge is not performed. If VOUT drops by naturally
R1
OVP
discharge, it is less than the hysteresis voltage of OVP
detection and the oscillation condition is fulfilled, N output
will be resumed again.
200k
400k
FB
R2
ERR AMP
-
+
+
-
LED_LV
○Equation of setting OVP detect
R1 R2
VOVP 2.43
[V]ꢀ
2.43V
R2
OVP COMP
SCP COMP
REG9V=9V
N pin output is suspended at the time of SCP detection, it
stops step-up operation, and the latch protection by CP
timer.
-
+
0.2V
○Equation of setting SCP detect
R1 R2
Figure 20.
VSCP 0.2
[V]ꢀ
R2
Moreover, there is an OVPFB function which returns OVP voltage and controls error amplifier so that output voltage may be
raised, even when there is no PWM signal during a soft start.
○The VOUT setting formula by OVPFB in Soft Start
3 R1 R2 R1
VOUT
V
[V]
LED_ LV
2
R2
400
●3.4.8 FAIL Logic
FAIL signal output pin (OPEN DRAIN); when an abnormality is detected, NMOS is brought into GND Level.
The rating of this pin is 36V.
State
FAIL output
In normal state, In STB
OPEN
In completion of an abnormality, when the
UVLO is detected(after CP latch)
GND Level
(500ohm typ.)
Vin
●3.4.9 How to set the UVLO
UVLO pin detect the power supply voltage: Vin for step-up DC/DC converters.
Operation starts operation on more than 2.5V (typ.) and Operation stops on less
than 2.4V (typ.) .
Since internal impedance exists in UVLO pin, cautions are needed for selection of
resistance for resistance division.
R1
R2
Zin=610kΩ
(typ.)
UVLO
A Vin voltage level to make it detecting becomes settled like the following formula
by resistance division of R1 and R2 (unit: kΩ).
1400k
530k
480k
1000pF
AGND AGND
○Equation of setting UVLO release
125k
R1 R2
1
1
VinDET 2.5
R1 [V]
R2
1400k 125k 530k 480k
○ Equation of setting UVLO lock
Figure 21.
R1 R2
1
1
Vin 2.4
R1 [V]
lock
R2
1400k 125k 530k 480k 40k
*Also including the variation in IC, please also take the part variation in a set into consideration for an actual constant setup,
and inquire enough to it.
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●3.4.10 Setting of the LED_LV voltage (LED_LV pin)
LED_LV pin is in the OPEN (High Impedance) state.
Please be sure to use an external seal of approval, carrying out by inputting REG9V output by resistance division. It cannot
use in the state of OPEN.
○Equation of Setting LED_LV voltage
When LED_LV voltage is set up by resistance division of R1 and R2 using REG9V, it becomes like the following formula.
R2
V LED_ LV REG9V
[V]
R1 R2
*Also including the variation in IC, please also take the part variation in a set into consideration for an actual constant setup,
and inquire enough to it.
●3.5 Selecting of DCDC part
Selecting inductor L
The value of inductor has a great influence on input ripple current. As
shown in Equation (1), as the inductor becomes large and switching
frequency becomes high, the ripple current of an inductor ⊿IL becomes low.
(VOUT VIN ) VIN
L VOUT fSW
ΔIL
ꢀ[A]ꢀꢀꢀꢀ・・・・・ꢀꢀ(1)
ΔIL
When the efficiency is expressed by Equation (2), input peak current will be
given by Equation (3).
V
IN
Figure 22.
VOUT IOUT
ꢀꢀꢀꢀꢀ・・・・・ꢀꢀ(2)
VIN IIN
IL
L
VOUT IOUT
VIN
ΔIL
ΔIL
ILMAX IIN
ꢀꢀ ꢀꢀ ꢀ・・・・・ꢀ(ꢀ3)
2
2
VOUT
Here,
L: reactance value [H]
VIN: input voltage [V]
VOUT: DC/DC output voltage [V]
LOUT: output load current (total of LED current) [A]
R
IIN: input current [A]
Generally, ⊿IL is set at around 30 to 50 % of output load current.
FSW: oscillation frequency [Hz]
CS
COUT
Figure 23.
* Current exceeding the rated current value of inductor flown through the coil causes magnetic saturation, resulting in
decrease in efficiency. Inductor needs to be selected to have such adequate margin that peak current does not exceed
the rated current value of the inductor.
* To reduce inductor loss and improve efficiency, inductor with low resistance components (DCR, ACR) needs to be
selected.
Selecting output capacitor COUT
Output capacitor needs to be selected in consideration of equivalent series
resistance required to even the stable area of output voltage or ripple voltage.
Be aware that set LED current may not be flown due to decrease in LED
V
IN
terminal voltage if output ripple voltage is high.
Output ripple voltage ⊿VOUT is determined by Equation (4):
IL
IOUT
1
1
ΔVOUT ILMAX RESR
[ꢀV]ꢀ・・・・・ꢀꢀ(4)
L
COUT
fSW
RESR: equivalent series resistance of COUT
VOUT
* Rating of capacitor needs to be selected to have adequate margin against
output voltage.
* To use an electrolytic capacitor, adequate margin against allowable current
is also necessary. Be aware that current larger than set value flows
transitionally in case that LED is provided with PWM dimming especially.
R
ESR
R
CS
COUT
Figure 24.
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Selecting switching MOSFET
Though there is no problem if the absolute maximum rating is the rated current of L or (withstand voltage of COUT + rectifying
diode) VF or higher, one with small gate capacitance (injected charge) needs to be selected to achieve high-speed
switching.
* One with over current protection setting or higher is recommended.
* Selection of one with small ON resistance results in high efficiency.
Selecting rectifying diode
A schottky barrier diode which has current ability higher than the rated current of L, reverse voltage larger than withstand
voltage of COUT, and low forward voltage VF especially needs to be selected.
Selecting MOSFET for load switch and its soft-start
As a normal step-up DC/DC converter does not have a switch on the path from VIN to VOUT, output voltage is generated
even though IC is OFF. To keep output voltage at 0 V until IC works, PMOSFET for load switch needs to be inserted
between VIN and the inductor. FAIL terminal needs to be used to drive the load switch. PMOSFET for the load switch of
which gate-source withstand voltage and drain-source withstand voltage are both higher than VIN needs to be selected.
To provide soft-start for the load switch, a capacitor must be inserted among gates and sources.
●3.6 How to set phase compensation
DC/DC converter application controlling current mode has each one pole (phase lag) fp due to CR filter composed of output
capacitor and output resistance (= LED current) and ZERO (phase lead) fZ by output capacitor and ESR of the capacitor.
Moreover, step-up DC/DC converter has RHP ZERO fZRHP as another ZERO. Since RHP ZERO has a characteristic of
phase lag (-90°) as pole does, cross-over frequency fc needs to be set at RHP ZERO or lower.
VIN
VOUT
L
ILED
VOUT
-
+
FB
gm
RESR
COUT
RFB1
CFB2
RCS
CFB1
Figure 25. Output part
Figure 26. Error Amplifier
i.
Determine Pole fp and RHPZERO fZRHP of DC/DC converter:
VOUT (1 D)2
2 L ILED
ILED
fp
ꢀ[Hz] ꢀ
fZRHP
[ꢀHz]ꢀꢀ
2 VOUT COUT
Here,、I ꢀ
VOUT VIN
LED＝=sum of LED current,
D
ꢀ
VOUT
ii.
Determine Phase compensation to be inserted into error amplifier (with fc set at 1/5 of fZRHP
)
1
fRHZP RCS ILED
5 f p gmVOUT (1 D)
CFB1
[ꢀF]ꢀꢀ
RFB1
[ꢀ] ꢀ
2 RFB1 f p
Here,
gm 1.036103[S]ꢀ
iii.
Determine ZERO to compensate ESR (RESR) of COUT (electrolytic capacitor)
RESR COUT
CFB2
ꢀ[F] ꢀ
RFB1
* When a ceramic capacitor (with RESR of the order of millimeters) is used to COUT, too, operation is
stabilized by insertion of RESR and CFB2
.
Though increase in RFB1 and decrease in CFB1 are necessary to improve transient response, it needs to be adequately
verified with an actual device in consideration of variation between external parts since phase margin is decreased.
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●3.7 Timing chart
●3.7.1 Normal operation sequence
7.5V
VCC
STB
2.0V
0.8V
5.4V
5.8V
REG9V
2.5V
UVLO
FAIL
3.0V
SS
VOUT
PWM*
ILED*
LED open detection
LED short detection
,
,
Disable
Enable
Disable
・ILED* current is independent controlled by each PWM* pin.
・FAIL pin is pulled up.
Figure 27.
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●3.8.2 Protective operation state transition table at FAIL_MODE=L
(Open detection)
before CP charge
CP charge
Error state
CP=2V arrival
→
→
end of state
PWM
Error state
PWM
PWM
Error state
L(no pulse) or
pulse less than
4cnt.
don't care
discharge
-
-
-
-
-
-
normal state
Not detect discharge
-
-
-
-
normal state
normal state
Not detect discharge
Not detect normal state
CH latch
FAIL latch
L(no pulse)
detect
L(no pulse)
detect
charge
Not detect normal state
CH latch
FAIL latch
H(input pulse)
detect
pulse over 4cnt.
start
detect
charge
-
Not detect discharge
normal state
-
Not detect normal state
CH latch
FAIL latch
L(no pulse)
detect
H(input pulse)
detect
charge
Not detect normal state
CH latch
FAIL latch
H(input pulse)
detect
(Short detection)
before CP charge
CP charge
CP=2V arrival
→
→
end of state
normal state
PWM
Error state
PWM
Error state
PWM
Error state
L(no pulse) or
puse less than
4cnt.
don't care
discharge
-
-
-
-
-
-
Not detect discharge
-
-
normal state
CH latch
L(no pulse)
don't care
FAIL latch
Not deetect normal state
L(no pulse)
don't care
charge
H(input pulse)
CH latch
FAIL latch
detect
pulse over 4cnt.
start
detect
Not detect discharge
-
-
normal state
CH latch
FAIL latch
charge
L(no pulse)
don't care
H(input pulse)
detect
charge
Not deetect normal state
CH latch
FAIL latch
H(input pulse)
detect
With "the pulse of less than 4 cnt", it is defined as the pulse width from (100n)sec to (Hi time of less than 4 cnt of DCDC frequency). In the pulse below (100n)sec,
since delay from a PWM pin input to internal logic exists, it becomes unfixed.
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●3.7.3 Protective operation sequence at FAIL_MODE=H
・Basic sequence
Figure 28.
・Actual sequence
Error detect
synchronize
CP charge time
MASK
(4clk) (3clk)
2V detect hold
(3clk)
CP reset time
(1024clk)
CP reset time
(1024clk)
CP charge time
…
…
…
…
…
(CLK)
(ERR)
2V
CP
FAIL
After it pasts CP charge time and CP
reset time, FAIL Output 1shot pulse.
PWM*
LED*
SHORT detect state
SHORT detect state
LSP detect voltage
If error signal input in this period, it is ignored.
Discharge CP by 2 times error signal
Charge is started at 1 times error detect, but it moved to reset period at 2 times error
detect immediately, therefore error signal can’t be detected.
Figure 29.
The above chart is sample of SHORT detection, but the chart of OPEN detection is also same structure.
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●3.7.4 About LED SHORT detection
LED SHORT detection don’t work by individual ch. The followings are needed for detection.
・Detection channel is PWM=H and LED terminal voltage is over LED SHORT detection threshold voltage.
・Except for detection ch, any 1ch is PWM=H and LED terminal voltage is under 3V.
・The above-mentioned 2 states continue over 4clk of DCDC oscillation frequency.
Detection sequence is the followings.(omit 4clk mask)
Figure 30.
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Operational Notes
1.
2.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power
supply terminals.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the
digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog
block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and
aging on the capacitance value when using electrolytic capacitors.
3.
4.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.
Thermal Consideration
Should by any chance the power dissipation rating be exceeded the rise in temperature of the chip may result in
deterioration of the properties of the chip. The absolute maximum rating of the Pd stated in this specification is when
the IC is mounted on a 70mm x 70mm x 1.6mm glass epoxy board. In case of exceeding this absolute maximum
rating, increase the board size and copper area to prevent exceeding the Pd rating.
6.
7.
Recommended Operating Conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately obtained.
The electrical characteristics are guaranteed under the conditions of each parameter.
Rush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush
current may flow instantaneously due to the internal powering sequence and delays, especially if the IC
has more than one power supply. Therefore, give special consideration to power coupling capacitance,
power wiring, width of ground wiring, and routing of connections.
8.
9.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply
should always be turned off completely before connecting or removing it from the test setup during the inspection
process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during
transport and storage.
Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
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Operational Notes – continued
10. Unused Input Terminals
Input terminals of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance
and extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and
cause unexpected operation of the IC. So unless otherwise specified, unused input terminals should be connected to
the power supply or ground line.
11. Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should
be avoided.
Figure 31. Example of hic IC structure
12. Ceramic Capacitor
When using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
13. Area of Safe Operation (ASO)
Operate the IC such that the output voltage, output current, and power dissipation are all within the Area of Safe
Operation (ASO).
14. Thermal Shutdown Circuit(TSD)
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always
be within the IC’s power dissipation rating. If however the rating is exceeded for a continued period, the junction
temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. When the Tj falls below
the TSD threshold, the circuits are automatically restored to normal operation.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from
heat damage.
15. Over Current Protection Circuit (OCP)
This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This
protection circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should
not be used in applications characterized by continuous operation or transitioning of the protection circuit.
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BD9397EFV
●Ordering Information
B D 9 3 9 7 E F V
-
E2
Part Number
Package
EFV:HTSSOP-B
Packaging and forming specification
E2: Embossed tape and reel
●Marking Diagram
HTSSOP-B40 (TOP VIEW)
Part Number Marking
LOT Number
BD9397EFV
1PIN MARK
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Physical Dimension, Tape and Reel Information
Package Name
HTSSOP-B40
<Tape and Reel information>
Tape
Embossed carrier tape (with dry pack)
Quantity
2000pcs
E2
Direction
of feed
The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
(
)
Direction of feed
1pin
Reel
Order quantity needs to be multiple of the minimum quantity.
∗
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Revision History
Date
Revision
Changes
9.Jan.2014
001
002
Draft Version
10.Mar.2014
p.5 1.3 Pin Descriptions No.11-16 LED1-LED6 rating -0.3 to 60 [V] → -0.3 to 50 [V]
p.3 Short circuit protection voltage add condition(FAILMODE=3V)
p.13 UVLO detection condition UVLO<2.4V→2.3V
p.14 UVLO detection condition UVLO<2.4V→2.3V
26.May.2014
003
SCP
detection condition OVP<0.2V→0.79V
release condition OVP>0.2V→0.79V
22.Dec.2014
2.Jul.2015
004
005
006
p.2 Pin Configuration 37pin LPS→LSP
p.14 ●3.3.2 List of the protection function
modify table’s contents
1.Sep.2015
p.13,14 The detailed timing condition for protections is added.
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Notice
Precaution on using ROHM Products
1. Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1), transport
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅣ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅢ
2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3. Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4. The Products are not subject to radiation-proof design.
5. Please verify and confirm characteristics of the final or mounted products in using the Products.
6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7. De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual
ambient temperature.
8. Confirm that operation temperature is within the specified range described in the product specification.
9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PGA-E
Rev.001
© 2015 ROHM Co., Ltd. All rights reserved.
Daattaasshheeeett
Precautions Regarding Application Examples and External Circuits
1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2. You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
QR code printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1. All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4. The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PGA-E
Rev.001
© 2015 ROHM Co., Ltd. All rights reserved.
Daattaasshheeeett
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall not be in an y way responsible or liable for failure, malfunction or accident arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3. The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for any damages, expenses or losses incurred by you or third parties resulting from inaccuracy or errors of or
concerning such information.
Notice – WE
Rev.001
© 2015 ROHM Co., Ltd. All rights reserved.
Datasheet
Buy
BD9397EFV - Web Page
Distribution Inventory
Part Number
Package
Unit Quantity
BD9397EFV
HTSSOP-B40
2000
Minimum Package Quantity
Packing Type
Constitution Materials List
RoHS
2000
Taping
inquiry
Yes
相关型号：
BD9397EFV-GE2
LED Driver, 24-Segment, PDSO40, 13.60 X 7.80 MM, 1 MM HEIGHT, 0.65 MM PITCH, ROHS COMPLIANT, HTSSOP-40
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