BM60054FV-CE2_技术文档

Datasheet

Gate Driver Providing Galvanic isolation Series

Isolation voltage 2500Vrms

1ch Gate Driver Providing Galvanic Isolation

BM60054FV-C

General Description

Key Specifications

The BM60054FV-C is a gate driver with isolation voltage

2500Vrms, I/O delay time of 110ns, and a minimum input

pulse width of 90ns. Fault signal output function, ready

signal output function, under voltage lockout (UVLO)

function, short current protection (SCP) function, and

switching controller function are all built-in.

 Isolation Voltage:

 Maximum Gate Drive Voltage:

 I/O Delay Time:

2500Vrms

20V(Max)

110ns(Max)

90ns(Max)

 Minimum Input Pulse Width:

Package

SSOP-B28W

W(Typ) x D(Typ) x H(Max)

9.2 mm x 10.4 mm x 2.4 mm

Features

■

Provides Galvanic Isolation

Fault Signal Output Function

Ready Signal Output Function

Under Voltage Lockout Function

Short Circuit Protection Function

Soft Turn-Off Function for Short Circuit Protection

(Adjustable Turn-OFF time)

Thermal Protection Function

Active Miller Clamping

Switching Controller Function

Output State Feedback Function

UL1577 Recognized:File No. E356010

AEC-Q100 Qualified^{(Note 1)}

■

(Note 1:Grade1)

Applications

■

Driving IGBT Gate

Driving MOSFET Gate

■

Typical Application Circuit

Figure 1. Typical Application Circuit

○Product structure：Silicon integrated circuit ○This product has no designed protection against radioactive rays

.

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Contents

General Description......................................................................................................................................................................1

Features.........................................................................................................................................................................................1

Applications ..................................................................................................................................................................................1

Key Specifications........................................................................................................................................................................1

Package

W(Typ) x D(Typ) x H(Max) .......................................................................................................................................1

Typical Application Circuit...........................................................................................................................................................1

Contents ........................................................................................................................................................................................2

Recommended Range of External Constants……………………………………………………………………………………………3

Pin Configuration..........................................................................................................................................................................3

Pin Descrlptions ...........................................................................................................................................................................3

Absolute Maximum Ratings.........................................................................................................................................................4

Recommended Operating Conditions ........................................................................................................................................4

Insulation Related Characteristics..............................................................................................................................................4

Electrical Characteristics.............................................................................................................................................................5

Electrical Characteristics – continued........................................................................................................................................6

Typical Performance Curves........................................................................................................................................................7

Figure 3. Main Power Supply Circuit Current…………………………………………………………………………………………7

Figure 4. Output Side Circuit Current(MODE=H, VEE2=0V, OUT1=L)…………………………………………………………….7

Figure 5. Output Side Circuit Current(MODE=H, VEE2=0V, OUT1=H)…………………………………………………………….7

Figure 6. FET_G ON-Resistance(Source side/Sink side)…………………………….……………………..………………………7

Figure 7. Oscillation Frequency………...……………………………………….………………………………………………………8

Figure 8. Soft-start Time…………………………………………………………………………………….…………………….….......8

Figure 9. FB Pin Threshold Voltage……………………………………………………………………….…………………………....8

Figure 10. COMP Pin Sink Current………………………………………………………………………………...…………….……...8

Figure 11. COMP Pin Source Current………………………………………………………………………......................................9

Figure 12. Over-Current Detection Threshold…..……………………………………………………………………………...……..9

Figure 13. Logic Input Filtering Time(L pulse)………………………………………………...……………………………………...9

Figure 14. Logic Input Filtering Time(H pulse)…………………………………………………………………………………….….9

Figure 15. ENA Input Filtering Time………………………………………………..……………………….....................................10

Figure 16. MODE Input Voltage H/L…………………………………………………………….……………………………..……….10

Figure 17. OUT1H ON-Resistance(I_OUT1=40mA).………………………………….…………………………………….………...10

Figure 18. OUT1L ON-Resistance(I_OUT1=40mA)…………………………………………………...………………………………10

Figure 19. PROOUT ON-Resistance(I_PROOUT=40mA) ……………………………………………………………………………11

Figure 20. Turn ON time……………………………………….………………………………………………..……….….…………...11

Figure 21. Turn OFF time……………………………………………………………………………………………….……........…….11

Figure 22. OUT2 ON-Resistance(I_OUT2=40mA)…………………………………………………………………..……………...….11

Figure 23. Short Current Detection Threshold Voltage……………………………………………………………..……………..12

Figure 24. DESAT Leading Edge Blanking Time…………………………………………………………………………………....12

Figure 25. Short Current Detection Filter Time………………..…………………………….………………….…………………..12

Figure 26. Short Current Detection Delay Time…………………………………………….………………….…………………...12

Figure 27. SCPIN Low Voltage………………….………………………………………………..……………….……..…………….13

Figure 28. Output Delay Difference between PROOUT and FLT………………………………….……………………….….....13

Figure 29. Thermal Detection Voltage…………………………………………………………………………..……...……………..13

Application Information..............................................................................................................................................................15

Description of Functions and Examples of Constant Setting…………………………………………………………………..…..16

Selection of Components Externally Connected .....................................................................................................................27

Power Dissipation.......................................................................................................................................................................27

Thermal Design...........................................................................................................................................................................27

I/O Equivalence Circuits.............................................................................................................................................................28

Operational Notes…………………………………………………………………………………………………………………………...32

Ordering Information…………………………………………………………………………………………………………………33

Marking Diagram………….…………………………………………………………………………………………………………………33

Physical Dimension, Tape and Reel Information .....................................................................................................................34

Revision History .........................................................................................................................................................................35

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Recommended Range of External Constants

Recommended Value

Pin Name

Symbol

Unit

Min

1.0

Typ

3.3

-

Max

10.0

-

VREG

VCC2

RT

C_VREG

C_VCC2

R_RT

µF

kΩ

0.33

24

68

150

Pin Configuration

(TOP VIEW)

VEE2

1

2

28 GND1

SENSE

FET_G

27

26

PROOUT

VTSIN

SCPIN

NC

3

4

25 VREG

5

V_BATT

COMP

FB

24

23

22

21

20

6

GND2

MODE

UVLOIN

VCC2

NC

7

8

RT

9

RDY

10

11

12

13

19 INB

18

INA

OUT1H

OUT1L

OUT2

17

16

15

ENA

FLT

14

GND1

VEE2

Pin Descrlptions

Pin Name

Pin Function

1

VEE2

PROOUT

VTSIN

SCPIN

NC

Output-side negative power supply pin

Soft turn-off pin / Gate voltage input pin

Thermal detection pin

2

3

4

Short circuit current detection pin

No connection

5

6

GND2

MODE

UVLOIN

VCC2

NC

Output-side ground pin

7

Mode selection pin of output-side UVLO

Output-side UVLO setting pin

Output-side positive power supply pin

No connection

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

OUT1H

OUT1L

OUT2

VEE2

GND1

FLT

Source side output pin

Sink side output pin

Output pin for Miller Clamp

Output-side negative power supply pin

Input-side ground pin

Fault output pin

ENA

Input enabling signal pin

Control input pin A

INA

INB

Control input pin B

RDY

Ready output pin

RT

Switching frequency setting pin for switching controller

Error amplifier inverting input pin for switching controller

Error amplifier output pin for switching controller

Main power supply pin

FB

COMP

V_BATT

VREG

FET_G

SENSE

GND1

Input-side internal power supply pin

MOS FET control pin for switching controller

Current detection pin for switching controller

Input-side ground pin

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Absolute Maximum Ratings

Parameter

Symbol

V_BATT

V_CC2

Limit

Unit

V

-0.3 to +40.0^{(Note 2)}

-0.3 to +24.0^{(Note 3)}

-15.0 to +0.3^{(Note 3)}

Main Power Supply Voltage

Output-Side Positive Supply Voltage

Output-Side Negative Supply Voltage

V

V_EE2

V

Maximum Difference

V_MAX2

30.0

V

Between Output-Side Positive and Negative Voltages

INA, INB, ENA Pin Input Voltage

MODE Pin Input Voltage

V_IN

V_MODE

V_SCPIN

V_VTS

-0.3 to +7.0^{(Note 2)}

V

-0.3 to +VCC2+0.3 or +24.0^{(Note 3)}

SCPIN Pin Input Voltage

-0.3 to +VCC2+0.3 or +24.0^{(Note 3)}

V

VTSIN Pin Input Voltage

-0.3 to +VCC2+0.3 or +24.0^{(Note 3)}

V

UVLOIN Pin Input Voltage

V_UVLOIN

I_OUT1PEAK

-0.3 to +VCC2+0.3 or +24.0^{(Note 3)}

V

OUT1H, OUT1L Pin Output Current (Peak 10μs)

OUT2 Pin Output Current (Peak 10μs)

PROOUT Pin Output Current (Peak 10μs)

FLT, RDY Pin Output Current

FET_G Pin Output Current (Peak 1μs)

Power Dissipation

5.0^{(Note 4)}

2.5^{(Note 4)}

10

A

I_OUT2PEAK

A

I_PROOUTPEA

A

I_FLT

I_{FET_GPEAK}

Pd

mA

A

1

1.12^{(Note 5)}

-40 to +125

-55 to +150

W

°C

Operating Temperature Range

Storage Temperature Range

Topr

Tstg

Junction Temperature

Tjmax

+150

°C

(Note 2) Relative to GND1

(Note 3) Relative to GND2

(Note 4) Should not exceed Pd and Tj=150C

(Note 5) Derate above Ta=25C at a rate of 9.5mW/C. Mounted on a glass epoxy of 70 mm  70 mm  1.6 mm

Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit

between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over

the absolute maximum ratings.

Recommended Operating Conditions

Parameter

Main Power Supply Voltage^{(Note 6)}

Symbol

V_BATT

V_CC2

Min

4.0

10

Max

32

20

0

Unit

V

Output-Side Positive Supply Voltage^{(Note 7)}

Output-Side Negative Supply Voltage^{(Note 7)}

V

V_EE2

-12

V

Maximum Difference

V_MAX2

f_SWR

10

28

V

Between Output-Side Positive and Negative Voltages

Switching frequency for switching controller

100

500

kHz

(Note 6) Relative to GND1

(Note 7) Relative to GND2

Insulation Related Characteristics (UL1577)

Parameter

Symbol

R_S

Characteristic

Unit

Ω

Insulation Resistance (V_IO=500V)

Insulation Withstand Voltage / 1min

Insulation Test Voltage / 1sec

>10⁹

2500

3000

V_ISO

Vrms

V_ISO

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Electrical Characteristics

(Unless otherwise specified Ta=-40°C to +125°C, V_BATT=4.0V to 32V, V_CC2=UVLO to 20V, V_EE2=-12V to 0V)

Parameter

Symbol

Min

Typ

Max

Unit

Conditions

General

Main Power Supply

1.1

0.8

1.6

1.3

2.1

1.8

I_BATT1

I_BATT2

I_BATT3

mA

V_BATT=4.0V

Circuit Current 1

Main Power Supply

V_BATT=12.0V

V_BATT=32.0V

Circuit Current 2

Main Power Supply

Circuit Current 3

0.7

0.4

0.8

1.4

1.1

1.5

1.2

2.1

1.8

2.2

1.9

Output Side Circuit Current 1

Output Side Circuit Current 2

Output Side Circuit Current 3

Output Side Circuit Current 4

I_CC21

I_CC22

I_CC23

I_CC24

mA

V_CC2=14V, OUT1=L

V_CC2=14V, OUT1=H

V_CC2=18V, OUT1=L

V_CC2=18V, OUT1=H

V_CC2=16V, V_EE2=-8V,

OUT1=L

0.9

0.6

1.6

1.3

2.3

2.0

Output Side Circuit Current 5

I_CC25

I_CC26

mA

V_CC2=16V, V_EE2=-8V,

OUT1=H

Output Side Circuit Current 6

Switching Power Supply Controller

FET_G Output Voltage H1

4.2V<V_BATT≤32V

I_{FET_G}=0A(open)

V_BATT ≤ 4.2V

I_{FET_G}=0A(open)

V_FETGH1

3.8

4.0

4.2

V

FET_G Output Voltage H2

V_FETGH2

V_FETGL

R_ONGH

-

V_BATT-0.2

V_BATT

0.3

V

Ω

FET_G Output Voltage L

FET_G ON-Resistance

(Source-side)

0

3

-

6

12

10mA

FET_G ON-Resistance

(Sink-side)

R_ONGL

0.3

0.6

1.3

Ω

10mA

Oscillation Frequency

Soft-start Time

f_SW

t_SS

182

-

200

-

222

50

kHz

ms

V

RT=68kΩ

FB Pin Threshold Voltage

FB Pin Input Current

COMP Pin Sink Current

COMP Pin Source Current

V_BATT UVLO ON Voltage

V_BATT UVLO Hysteresis

Maximum ON DUTY

Over Voltage Detection Threshold

V_FB

1.47

-0.8

-160

40

1.50

0

1.53

0.8

I_FB

µA

V

I_COMPSINK

I_COMPSOURCE

V_UVLOBATTL

V_UVLOBATTHYS

D_ONMAX

V_OVTH

-80

80

-40

160

3.60

0.13

-

3.20

0.07

-

3.40

0.1

48

V

%

1.60

1.65

1.70

V

Under Voltage Detection

Threshold

V_UVTH

1.23

1.30

1.37

V

Over-Current Detection Threshold

Protection Holding Time

V_OCTH

0.17

20

0.20

40

0.23

60

V

t_DCDCRLS

ms

Logic Block

Logic High Level Input Voltage

Logic Low Level Input Voltage

Logic Pull-Down Resistance

Logic Input Filtering Time

ENA Input Filtering Time

V_INH

V_INL

2.0

-

5.5

0.8

V

INA, INB, ENA

INA, INB

0

R_IND

25

50

-

100

kΩ

ns

µs

V

t_INFIL

-

90

t_ENAFIL

V_MODEL

V_MODEH

-

0

0.5

-

0.8

ENA

MODE Low Level Input Voltage

MODE High Level Input Voltage

0.3×V_CC2

V_CC2

MODE, relative to GND2

MODE,relative to GND2

0.7×V_CC2

-

V

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Electrical Characteristics – continued

(Unless otherwise specified Ta=-40°C to +125°C, V_BATT=4.0V to 32V, V_CC2=UVLO to 20V, V_EE2=-12V to 0V)

Parameter

Symbol

Min

Typ

Max

Unit

Conditions

Output

I_OUT1H=40mA

I_OUT1L=40mA

V_CC2=15V

Design assurance

I_PROOUT=40mA

OUT1H ON-Resistance

OUT1L ON-Resistance

R_ONH

R_ONL

0.50

0.25

0.85

0.45

1.45

0.80

Ω

3.0

4.5

-

OUT1 Maximum Current

PROOUT ON-Resistance

I_OUT1MAX

A

0.45

0.85

1.55

R_ONPRO

t_PONA

Ω

ns

Ω

45

50

40

35

-25

-35

-

75

80

70

65

-5

105

110

100

95

15

5

INA=PWM, INB=L

INA=H, INB=PWM

INA=PWM, INB=L

INA=H, INB=PWM

t_POFFA– t_PONA

Turn ON Time

t_PONB

t_POFFA

t_POFFB

t_PDISTA

t_PDISTB

t_RISE

Turn OFF Time

Propagation Distortion

-15

50

0.45

2

t_POFFB– t_PONB

Rise Time

-

10nF between OUT1-VEE2

Design assurance

I_OUT2=40mA

Fall Time

t_FALL

-

0.25

1.8

100

0.80

2.2

-

OUT2 ON-Resistance

OUT2 ON Threshold Voltage

Common Mode Transient Immunity

Protection Functions

Output-side UVLO ON

Threshold Voltage

R_ON2

V_OUT2ON

CM

V

Relative to VEE2

-

kV/μs Design assurance

UVLOIN, MODE=L

V_UVLOINL

0.85

0.90

0.95

V

Output-side UVLO Threshold

Hysteresis

0.10×

V_UVLOINL

10.9

0.11×

V_UVLOINL

11.5

0.12×

V_UVLOINL

12.1

V_UVLOINHYS

VCC2, MODE=H

Output-side UVLO ON Voltage

Output-side UVLO Hysteresis

Output-side UVLO Filtering Time

DESAT Leading Edge

Blanking Time

V_UVLO2L

V_UVLO2HYS

t_UVLO2FIL

V

0.8

1.2

1.6

0.25

1.5

3.7

µs

t_DESATleb

0.14

0.20

0.26

µs

Design assurance

Relative to GND2

Short Current Detection Voltage

Short Current Detection Filter Time

Short Current Detection Delay

Time (PROOUT)

V_SCDET

t_SCPFIL

V

0.47

0.12

0.50

0.2

0.53

0.28

µs

t_SCPPRO

V_SCPINL

t_PROFLT

0.26

-

0.38

0.1

0.50

0.22

0.7

µs

V

SCPIN Pin Low Voltage

Output Delay Difference

between PROOUT and FLT

Thermal Detection Voltage

Thermal Detection Filter Time

Soft Turn Off Release Time

FLT Output Low Voltage

Gate State H Detection

Threshold Voltage

I_SCPIN=1mA

0.1

0.4

µs

VTSDET

t_TSFIL

t_STO

1.61

4

1.70

10

1.79

30

V

µs

V

Relative to GND2

30

-

110

0.40

V_FLTL

0.18

I_FLT=5mA

V_OSFBH

V_OSFBL

4.5

4.0

5.0

4.5

5.5

5.0

V

Relative to GND2

Gate State L Detection

Threshold Voltage

Relative to GND2

I_RDY=5mA

OSFB Output Filtering Time

RDY Output Low Voltage

t_OSFBFIL

V_RDYL

1.5

-

2.0

2.5

µs

V

0.18

0.40

50%

90%

t_PON

INA

t_POFF

90%

50%

10%

OUT1H/L

10%

t_FALL

t_RISE

Figure 2. INA-OUT1H/L Timing Chart

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BM60054FV-C

UL1577 Ratings Table

Following values are described in UL Report.

Parameter

Side 1 (Input Side) Circuit Current

Side 2 (Output Side) Circuit Current

Side 1 (Input Side) Consumption Power

Side 2 (Output Side) Consumption Power

Isolation Voltage

Values

1.3

Units

mA

mW

Vrms

℃

Conditions

V_BATT=12V, OUT1H/L=L

1.6

VCC2=18V, VEE2=-6V, OUT1H/L=L

V_BATT=12V, OUT1H/L=L

15.6

38.4

2500

125

150

5.5

VCC2=18V, VEE2=-6V, OUT1H/L=L

Maximum Operating (Ambient) Temperature

Maximum Junction Temperature

Maximum Strage Temperature

℃

MHz

Maximum Data Transmission Rate

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Typical Performance Curves

2.2

2

1.8

1.6

25°C

125°C

1.8

1.6

1.4

1.2

1

1.4

125°C

25°C

1.2

1

-40°C

0.8

0.6

0.4

-40°C

0.8

10

15

20

4

11

18

25

32

VCC2 [V]

VBATT [V]

Figure 4. Output Side Circuit Current

(MODE=H, VEE2=0V, OUT1=L)

Figure 3. Main Power Supply Circuit Current

12

9

2.2

2

Source side

1.8

1.6

1.4

1.2

1

25°C

125°C

6

3

0.8

0.6

0.4

Sink side

-40°C

0

10

15

20

-40

0

40

80

120

VCC2 [V]

Ta [°C]

Figure 5. Output Side Circuit Current

(MODE=H, VEE2=0V, OUT1=H)

Figure 6. FET_G ON-Resistance

(Source side/Sink side)

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500

400

300

200

50

40

30

20

10

0

100

0

20 40 60 80 100 120 140

-40

0

40

80

120

R_RT[kΩ]

Ta [°C]

Figure 8. Soft-start Time

Figure 7. Oscillation Frequency

1.53

1.52

1.51

1.5

-40

-60

-80

-100

-120

-140

-160

1.49

1.48

1.47

-40

0

40

80

120

0

40

80

120

Ta [°C]

Figure 9. FB Pin Threshold Voltage

Figure 10. COMP Pin Sink Current

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160

140

120

100

80

0.23

0.21

0.19

0.17

60

40

-40

0

40

80

120

-40

0

40

80

120

Ta [°C]

Figure 11. COMP Pin Source Current

Figure 12. Over-Current Detection

Threshold

75

50

25

0

75

50

25

0

-40

0

40

80

120

4

11

18

25

32

Ta [°C]

Figure 13. Logic Input Filtering Time

(L pulse)

Figure 14. Logic Input Filtering Time

(H pulse)

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1

0.8

0.6

0.4

0.2

9

8.8

8.6

8.4

8.2

8

V_MODEH

V_MODEL

0

-40

0

40

80

120

-40

0

40

80

120

Ta [℃]

Figure 15. ENA Input Filtering Time

Figure 16. MODE Input Voltage H/L

1.2

1

0.8

0.6

0.4

0.2

0

0.8

0.6

0.4

0.2

0

-40

0

40

80

120

-40

0

40

80

120

Ta [℃]

Figure 17. OUT1H ON-Resistance

(IOUT1=40mA)

Figure 18. OUT1L ON-Resistance

(IOUT1=40mA)

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105

85

1.45

1.25

1.05

0.85

0.65

0.45

65

45

-40

0

40

80

120

-40

0

40

80

120

Ta [℃]

Figure 19. PROOUT ON-Resistance

(IPROOUT=40mA)

Figure 20. Turn ON time

100

80

0.65

0.45

0.25

60

40

-40

0

40

80

120

-40

0

40

80

120

Ta [°C]

Ta [℃]

Figure 21. Turn OFF time

Figure 22. OUT2 ON-Resistance

(I_OUT2=40mA)

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0.53

0.52

0.51

0.5

0.26

0.24

0.22

0.2

0.49

0.48

0.47

0.18

0.16

0.14

-40

0

40

80

120

-40

0

40

80

120

Ta [°C]

Figure 23. Short Current Detection Voltage

Figure 24. DESAT Leading Edge

Blanking Time

0.5

0.44

0.38

0.32

0.26

0.28

0.24

0.2

0.16

0.12

-40

0

40

80

120

-40

0

40

80

120

Ta [°C]

Figure 25. Short Current Detection

Filter Time

Figure 26. Short Current Detection

Delay Time

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0.7

0.5

0.3

0.1

0.2

0.15

0.1

0.05

0

-40

0

40

80

120

-40

0

40

80

120

Ta [°C]

Figure 28. Output Delay Difference

between PROOUT and FLT

Figure 27. SCPIN Pin Low Voltage

1.77

1.73

1.69

1.65

1.61

-40

0

40

80

120

Ta [°C]

Figure 29. Thermal Detection Voltage

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Application Information

1. Description of Pins and Cautions on Layout of Board

(1) V_BATT (Main Power Supply Pin)

This is the main power supply pin. Connect a bypass capacitor between V_BATT and GND1 in order to suppress

voltage variations.

(2) GND1 (Input-side Ground Pin)

The GND1 pin is a ground pin on the input side.

(3) VCC2 (Output-side Positive Power Supply Pin)

The VCC2 pin is a positive power supply pin on the output side. To reduce voltage fluctuations due to OUT1H/L pin

output current and due to the driving current of the internal transformers, connect a bypass capacitor between VCC2

and GND2 pins.

(4) VEE2 (Output-side Negative Power Supply Pin)

The VEE2 pin is a power supply pin on the output side. To suppress voltage fluctuations due to OUT1H/L pin output

current and due to the driving current of the internal transformers, connect a bypass capacitor between the VEE2 and

the GND2 pins. Connect the VEE2 pin to the GND2 pin when no negative power supply is used,

(5) GND2 (Output-side Ground Pin)

The GND2 pin is a ground pin on the output side. Connect the GND2 pin to the emitter / source of a power device.

(6) INA,INB,ENA (Control Input Terminal)

The INA,INB,ENA are pins used to determine output logic.

ENA

L

H

INB

X

H

L

INA

X

L

H

OUT1H

Hi-Z

H

OUT1L

L

Hi-Z

Fault state(FLT=L output) is released in rising of ENA(L→ H).

(7) FLT (Fault Output Pin)

The FLT pin is an open drain pin used to output a fault signal when short circuit protection function (SCP) or thermal

protection function is activated, and will be cleared at the rising edge of ENA.

Status

FLT

While in normal operation

Hi-Z

When a fault occurs

(When SCP or thermal protection is activated)

L

(8) RDY (Ready Output Pin)

The RDY pin shows the status of three internal protection features which are V_BATT UVLO, VCC2 UVLO, and

output state feedback (OSFB). The term ‘output state feedback’ shows whether PROOUT pin voltage (High or Low)

corresponds to input logic or not.

Status

RDY

Hi-Z

L

While in normal operation

V_BATT UVLO or VCC2 UVLO or Output state feedback

(9) MODE (Mode Selection Pin of Output-side UVLO)

The MODE pin is a pin which selects internal threshold or external setting threshold for output-side UVLO.

MODE

Output-side UVLO threshold voltage

Setting by external. (Use UVLOIN pin)

L (=GND2)

H (=VCC2)

Fixed (=V_UVLO2L). (Connect UVLOIN pin to VCC2 pin)

(10) UVLOIN (Output-side UVLO Setting Input Pin)

The UVLOIN pin is a pin for deciding UVLO setting value of VCC2. The threshold value of UVLO can be set by

dividing the resistance voltage of VCC2 and inputting such value. UVLOIN activates only at MODE pin=L. When

MODE pin=H, connect UVLOIN pin to VCC2 pin.

(11) OUT1H, OUT1L(Output Pin)

The OUT1H pin is a source side pin used to drive the gate of a power device, and the OUT1L pin is a sink side pin

used to drive the gate of a power device.

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(12) OUT2 (Miller Clamp Pin)

This is the miller clamp pin for preventing a rise of gate voltage due to miller current of output element connected to

OUT1. It also functions as a pin for monitoring gate voltage for miller clamp and OUT2 pin voltage become not more

than VOUT2ON(typ 2.0V), miller clamp function operates. OUT2 should be connect to VEE2 when miller clamp

function is not used.

(13) PROOUT (Soft Turn-OFF Pin)

This is a pin for soft turn-OFF of output pin when short-circuit protection is in action. It also functions as a pin for

monitoring gate voltage for output state feedback function.

(14) SCPIN(Short Circuit Current Detection Pin)

The SCPIN pin is a pin used to detect current for short circuit protection. When the SCPIN pin voltage exceeds

V_SCDET,SCP function will be activated. This may cause the IC to malfunction in an open state. To avoid such trouble,

short-circuit the SCPIN pin to the GND2 pin when the short circuit protection is not used. In order to prevent the

wrong detection due to noise, the noise filter time t_SCPFILis set.

(15) VTSIN (Thermal Detection Pin)

The VTSIN pin is a temperature sensor voltage input pin, which can be used for thermal protection of an output

device. If VTSIN pin voltage becomes V_TSDETor less, OUT1H/L pin is set to HiZ/L. IC may malfunction in the open

status, so be sure to supply the VTSPIN more than V_TSDETif the thermal protection function is not used. In order to

prevent the wrong detection due to noise, the noise mask time t_TSMSKis set. In addition, it can be used also as

compulsive shutdown terminal other than a temperature sense by inputting a comparator output etc.

(16) RT (Switching Frequency Setting Pin for Switching Controller)

The RT pin is a pin used to make setting of switching frequency of switching controller. The switching frequency is

determined by the resistance value connected between RT and GND1. The value of switching frequency is

determined by the value of the resistor R_RT.

F_SW



kHz

1/( 7.310^8 R_RT 2.210^4)



(17) FB (Error Amplifier Inverting Input Pin for Switching Controller)

This is a voltage feedback pin of the switching controller. This pin combine with voltage monitoring at overvoltage

protection function and under voltage protection function for switching controller. When overvoltage or under voltage

protection is activated, switching controller will be at OFF state (FET_G pin outputs Low). When the protection

holding time (t_DCDCRLS) is completed, the protection function will be released. Under voltage function is not activated

during soft-start.

(18) COMP (Error Amplifier Output Pin for Switching Controller)

This is the gain control pin of the switching controller. Connect a phase compensation capacitor and resistor.

(19) VREG (Input-side internal power supply pin)

This is the input-side internal power supply pin. Be sure to connect a capacitor between VREG and GND1 even when

the switching controller is not used, in order to prevent oscillation and suppress voltage variation due to FET_G

output current.

(20) FET_G (MOS FET Control Pin for Switching Controller)

This is a MOSFET control pin for the switching controller transformer drive.

(21) SENSE (Connection to the Current Feedback Resistor of the Switching Controller)

This is a pin connected to the resistor of the switching controller current feedback. This pin combines with current

monitoring at overcurrent protection function for switching controller. When overcurrent protection is activated,

switching controller will be at OFF state (FET_G pin outputs Low). When the protection holding time (t_DCDCRLS) is

completed, the over-current function will be released.

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2. Description of Functions and Examples of Constant Setting

(1) Miller Clamp Function

When OUT1=L and OUT2 pin voltage < V_OUT2ON, internal MOS of OUT2 pin is turned ON and miller clamp function

operates.

OUT2 pin

IN

OUT2

input voltage

Not more than

V_OUT2ON

L

H

X

Hi-Z

VCC2

PREDRIVER

OUT1H/L

PROOUT

PREDRIVER

LOGIC

OUT2

GND2

+

-

VEE2

Figure 30. Block Diagram of Miller Clamp Function

H

L

ENA

INA

H

L

VTSDET

VTSIN

VSCDET

Hi-Z

L

SCPIN

FLT

H

OUT1H/L

OUT2

Hi-Z

L

VOUT2ON

tPON

tSTO

Figure 31. Timing Chart of Miller Clamp Function

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(2) Under Voltage Lockout (UVLO) Function

The BM60054FV-C incorporates the under voltage lockout (UVLO) function on V_BATT and VCC2. When the power

supply voltage drops to the UVLO ON voltage, the OUT1H/L pin will output the "Hi-Z / L" and the FLT pin will output

the “L” signal. When the power supply voltage rises to the UVLO OFF voltage, these pins will be reset. In addition, to

prevent mis-triggers due to noise, mask time t_UVLOBATTFILand t_UVLO2FILare set on both voltage sides.

H

L

INA

UVLOBATTH

V

V_BATT

UVLOBATTL

V

Hi-Z

L

H

RDY

OUT1H/L

L

H

L

FET_G

Figure 32. VBATT UVLO Function Operation Timing Chart

H

L

INA

UVLOINH

V

UVLOIN

UVLOINL

V

Hi-Z

L

H

L

H

L

RDY

OUT1H/L

FET_G

Figure 33. VCC2 UVLO Function Operation Timing Chart (MODE=L)

H

L

INA

UVLO2H

V

VCC2

UVLO2L

V

Hi-Z

L

H

L

H

RDY

OUT1H/L

FET_G

L

Figure 34. VCC2 UVLO Function Operation Timing Chart (MODE=H)

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(3) Short Circuit Protection Function (SCP)

When the SCPIN pin voltage exceeds V_SCDET, the SCP function will be activated. When the SCP function is activated,

the OUT1H/L pin voltage will be set to the “Hi-Z/Hi-Z” level and the PROOUT pin voltage will go to the “L” level first

(soft turn-OFF). Next, After t_STOhas passed, OUT1H/L pin become Hi-Z/L (PROOUT pin hold L). In addition, when

OUT2 pin voltage < V_OUT2ON, miller clamp function operates.

When the rising edge is put in the ENA pin, the SCP function will be released.

When OUT1H/L=Hi-Z/L or Hi-Z/Hi-Z, internal MOSFET connected to SCPIN pin turns ON to discharge C_BLANKfor

desaturation protection function. When OUT1H/L=H/Hi-Z, internal MOSFET connected to SCPIN pin turns OFF.

R3 R2

V_DESAT

V_CC2



V



 V_SCDET

 V_SCDET



V_F

D1

R3

R3 R2  R1

R3



V





MIN

R2  R1

R3 R2  R1

R3 R2  R1 V

t_{BLANKouternal}



s



 

 R3C_BLANKln(1



^SCDET)  t_DESATleb

R3

V_CC2

設定参考値

R2

V_DESAT

R1

R3

4.0V

4.5V

5.0V

5.5V

6.0V

6.5V

7.0V

7.5V

8.0V

8.5V

9.0V

9.5V

10.0V

15 kΩ

39kΩ

47kΩ

51kΩ

27kΩ

33kΩ

62kΩ

47kΩ

20kΩ

82kΩ

62kΩ

33kΩ

75kΩ

68kΩ

4.7kΩ

5.1kΩ

2.4kΩ

2.7kΩ

4.7kΩ

3.3kΩ

1.3kΩ

5.1kΩ

3.6kΩ

1.8kΩ

3.9kΩ

3.3kΩ

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VCC2

OUT1H/L

PROOUT

LOGIC

FLT

SCPIN

+

SCPFIL

-

V_SCDET

GND2

VEE2

GND1

Figure 35. Block Diagram of Short Circuit Protection

VCC2

R1

OUT1H/L

PROOUT

LOGIC

FLT

D1

R2

R3

FLT

SCPIN

+

SCPFIL

-

V_SCDET

GND2

VEE2

GND1

Figure 36. Block Diagram of DESAT

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H

L

IN

tSCPFIL

tSCPRO

tSCPFIL

tSCPRO

VSCDET

SCPIN

H

OUT1H/L

Hi-Z

L

Hi-Z

L

Hi-Z

PROOUT

FLT

L

tSTO

H

L

ENA

>tENAFIL

Figure 37. SCP Operation Timing Chart

Start

No

V_SCPIN>V_SCDET

Yes

OUT1H/L=Hi-Z / L, PROOUT=L, OUT2=L

No

Exceed filter time

Yes

No

ENA=L→ H

OUT1H/L=Hi-Z / Hi-Z, PROOUT=L,

FLT=L, OUT2=HiZ

Yes

FLT=Hi-Z

No

OUT2<VOUT2ON

Yes

No

OUT2=L

IN=H

Yes

No

OUT1H/L=H / Hi-Z, PROOUT=Hi-Z,

OUT2=HiZ

Exceed t_STO

Yes

Figure 38. SCP Operation Status Transition Diagram

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(4) Thermal Protection Function

When the VTSIN pin voltage becomes V_TSDETor less, the thermal protection function will be activated. When the

thermal protection function is activated, the OUT1H/L pin voltage will be set to the “Hi-Z/Hi-Z” level and the PROOUT

pin voltage will go to the “L” level first (soft turn-OFF). Next, when the VTSIN pin voltage rises to the threshold value

and after t_STOhas passed, OUT1H/L pin become Hi-Z/L (PROOUT pin hold L). In addition, when OUT2 pin voltage <

V_OUT2ON, miller clamp function operates.

When the rising edge is put in the ENA pin, the thermal protection function will be released.

VCC2

OUT1H/L

LOGIC

TSFIL

FLT

PROOUT

VTSIN

FLT

SENSOR

+

-

V_TSDET

GND2

VEE2

GND1

Figure 39. Block Diagram of thermal protection function

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H

L

IN

tTSFIL

VTSIN

VTSDET

H

OUT1H/L

Hi-Z

L

Hi-Z

L

Hi-Z

PROOUT

FLT

L

tSTO

H

L

ENA

>tENAFIL

Figure 40. Thermal Protection Function Operation Timing Chart

START

No

VTSIN>VTSDET

Yes

No

OUT1H/L=Hi-Z / L, PROOUT=L, OUT2=L

Exceed filter time

Yes

OUT1H/L=Hi-Z / Hi-Z, PROOUT=L,

FLT=L, OUT2=HiZ

No

ENA=L→H

Yes

No

OUT2<VOUT2ON

Yes

FLT=Hi-Z

VTSIN<VTSDET

Yes

No

IN=H

Yes

OUT2=L

OUT1H/L=H / Hi-Z, PROOUT=Hi-Z,

OUT2=HiZ

No

Exceed t_STO

Figure 41. Thermal Protection Function Operation Status Transition Diagram

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(5) Switching Controller

(a) Basic action

This IC has a built-in switching power supply controller which repeats ON/OFF synchronizing with internal clock

set by RT pin. When VBATT voltage is supplied (VBATT > V_UVLOBATTH), FET_G pin starts switching by soft-start.

Output voltage is determined by the following equation by external resistance and winding ratio “n” of flyback

transformer (n= V_OUT2side winding number/V_OUT1side winding number)

V_OUT2 V_FB



R₁R₂



/R₂



n

V

 

(b) MAX DUTY

When, for example, output load is large, and voltage level of SENSE pin does not reach current detection level,

output is forcibly turned OFF by Maximum On Duty (D_ONMAX).

(c) Protection function

The switching controller has protection function as overvoltage protection (OVP), under voltage protection (UVP),

and over-current protection (OCP). OVP and UVP monitor the voltage of FB pin, OCP monitor the voltage of

SENSE pin.

When the protection function is activated, switching controller will be OFF state (FET_G pin outputs Low). The

protection holding time (t_DCDCRLS) is completed, the protection function will be released. Under voltage function is

not activated during soft-start.

VOUT1

RT

OSC

V_FB

R1

R2

-

FB

UVLO_BATT

+

OVP

UVP

COMP

V_BATT

VREG

FET_G

SENSE

GND1

Maxduty

VOUT2

VREG

Slope

COMP

V_FB

+

-

R

Q

S

OSC

OC

Softstart

Figure 42. Block Diagram of switching controller

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(d)The pin handling when not using switching controller

When not using switching controller, please do pin handling as follows.

pin no.

21

22

23

24

25

26

27

pin name

RT

processing method

pull down in gnd1 by 68kΩ

connect to VREG

connect power supply

connect capacitor

open

FB

COMP

V_BATT

VREG

FET_G

SENSE

connect to VREG

RT

FB

OSC

V_FB

-

UVLO_BATT

+

OVP

UVP

COMP

V_BATT

VREG

Maxduty

VREG

COMP

+

-

R

Q

FET_G

SENSE

GND1

S

OSC

V_FB

Slope

OC

Softstart

Figure 43. The pin handling when not using switching controller

(6) Gate State Monitoring Function

When gate logic and input logic of output device monitored with PROOUT pin are compared, a logic L is output from

RDY pin when they disaccord. In order to prevent the detection error due to delay of input and output, OSFB filter

time t_OSFBFILis provided.

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(7) I/O Condition Table

Input

Output

P

R

O

U

T

P

V

B

A

T

S

C

P

I

V

T

S

I

O

U

T

1

H

O

U

T

1

V

C

2

O

U

T

2

O

U

T

2

R

O

U

T

E

N

A

I

N

B

I

N

A

F

L

T

R

D

Y

No.

Status

N

L

1

2

○

H

L

H

L

H

X

L

H

X

L

H

L

X

H

L

Hi-Z Hi-Z Hi-Z

Hi-Z Hi-Z

L

Hi-Z

L

SCP

L

3

UVLO

○

X

H

L

H

L

Hi-Z

L

Hi-Z Hi-Z Hi-Z

Hi-Z Hi-Z

Hi-Z Hi-Z Hi-Z

Hi-Z Hi-Z

UVLO_VBATT

UVLO_VCC2

4

○

L

5

UVLO

○

H

L

H

L

6

○

L

7

○

H

L

X

H

L

Hi-Z Hi-Z Hi-Z

Hi-Z Hi-Z

L

Hi-Z

L

Thermal

protection

8

○

L

9

○

H

L

Hi-Z

H

L

Hi-Z Hi-Z Hi-Z

Disable

10

11

12

13

14

15

16

○

L

Hi-Z Hi-Z Hi-Z

○

H

L

H

L

INB active

○

L

○

H

L

H

L

Normal Operation

L Input

○

L

○

L

H

L

H

L

Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z

Hi-Z Hi-Z Hi-Z Hi-Z

Normal Operation

H Input

○

L

H

L

○ : > UVLO, X:Don't care

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(8) Power Supply Startup / Shutoff Sequence

H

L

IN

V_BATT

VCC2

V_UVLOBATTL

V_UVLOBATT

L

V_UVLOBATTL

0V

V_UVLO2H

0V

VEE2

H

OUT1H/L

Hi-Z

L

Hi-Z

OUT2

PROOUT

RDY

L

Hi-Z

L

Hi-Z

L

H

L

IN

V_BATT

VCC2

V_UVLOBATTL

V_UVLO2H

V_UVLOBATTH

0V

V_UVLO2L

0V

VEE2

H

Hi-Z

OUT1H/L

OUT2

L

Hi-Z

L

Hi-Z

PROOUT

RDY

L

Hi-Z

L

H

L

IN

V_BATT

VCC2

V_UVLOBATTL

V_UVLOBATTH

V_UVLO2L

0V

V_UVLO2H

0V

VEE2

H

Hi-Z

OUT1H/L

OUT2

L

Hi-Z

L

Hi-Z

PROOUT

RDY

L

Hi-Z

L

H

L

IN

V_BATT

VCC2

V_UVLOBATTH

0V

V_UVLO2L

0V

VEE2

H

OUT1H/L

Hi-Z

L

Hi-Z

OUT2

PROOUT

RDY

L

Hi-Z

L

Hi-Z

L

: Since the VCC2 to VEE2 pin voltage is low and the output MOS does not turn ON,

the output pins become Hi-Z conditions.

: Since the VCC1 to GND1 pin voltage is low and the RDY output MOS does not turn ON,

the output pins become Hi-Z conditions.

Figure 44. Power Supply Startup / Shutoff Sequence

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Selection of Components Externally Connected

Recommended

ROHM

MCR100JZH

LTR50UZP

Recommended

ROHM

MCR03EZP

Recommended

ROHM

MCR03EZP

Recommended

SUMIDA

CEER117

Recommended

ROHM

MCR100JZH

LTR50UZP

Recommended

ROHM

RB168M150

Recommended

ROHM

LTR18EZP

Recommended

ROHM

RSR025N05

Figure 45. Recommended External Parts

Power Dissipation

1.5

Measurement machine : TH156 (Kuwano Electric)

Measurement condition : ROHM board

Board size : 114.3×76.2×1.6mm³

1.25

1

1-layer board : θja=111.1°C /W

0.75

0.5

0.25

0

25

50

75

100

125

150

175

Ambient Temperature : Ta [℃]

Figure 46. SSOP-B28W Derating Curve

Thermal Design

Please make sure that the IC’s chip temperature Tj is not over 150°C, while considering the IC’s power consumption (W),

package power (Pd) and ambient temperature (Ta). When Tj=150°C is exceeded, the IC may malfunctions or some problems

(ex. abnormal operation of various parasitic elements and increasing of leak current) may occur. Constant use under these

circumstances leads to deterioration and eventually IC may destruct. Tjmax=150°C must be strictly obeyed under all

circumstances.

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I/O Equivalence Circuits

Pin No.

Pin Name

Input Output Equivalent Circuit Diagram

Pin Function

VCC2

PROOUT

2

PROOUT

Soft turn-off pin / Gate voltage input

VEE2

VCC2

VTSIN

3

VTSIN

GND2

Thermal detection pin

VCC2

SCPIN

Schort circuit current detection pin

MODE

4

SCPIN

GND2

VCC2

MODE

7

Mode selection pin of output-side

UVLO

GND2

VEE2

VCC2

UVLOIN

8

Output-side UVLO setting pin

GND2

VEE2

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Pin Name

Pin No.

Input Output Equivalent Circuit Diagram

Pin Function

OUT1H

Source side output pin

OUT1L

VCC2

11

OUT1H

OUT1L

VEE2

12

Sink side output pin

VCC2

OUT2

13

Output pin for Miller Clamp

VEE2

FLT

RDY

16

20

Fault output pin

RDY

GND1

Ready output pin

VREG

ENA

17

Input enabling signal pin

GND1

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Pin Name

Pin No.

Input Output Equivalent Circuit Diagram

Pin Function

VREG

INA

Control input pin A

INB

INA

18

GND1

VREG

INB

19

Control input pin B

GND1

V_BATT

RT

21

RT

Switching frequency setting pin for

switching controller

VEE2

Internal power

supply

V_BATT

FB

22

GND1

Error amplifier inverting input pin

for switching controller

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Pin Name

Pin No.

Input Output Equivalent Circuit Diagram

Internal power

Pin Function

V_BATT

supply

COMP

GND1

23

Error amplifier output pin for

switching controller

VREG

V_BATT

Internal power

supply

25

26

Input-side internal power supply

VREG

FET_G

MOS FET control pin for switching

controller

GND1

Internal power

supply

V_BATT

SENSE

27

SENSE

GND1

Current detection pin for switching

controller

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Operational Notes

1. Reverse Connection of Power Supply

Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the digital

and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog block.

Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and aging on the

capacitance value when using electrolytic capacitors.

2. Power Supply Lines

Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the digital

and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog block.

Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and aging on the

capacitance value when using electrolytic capacitors.

3. Ground Voltage

Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.

4. Ground Wiring Pattern

When using both small-signal and large-current ground traces, the two ground traces should be routed separately but

connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal

ground caused by large currents. Also ensure that the ground traces of external components do not cause variations on

the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.

5. Thermal Consideration

Should by any chance the power dissipation rating be exceeded, the rise in temperature of the chip may result in

deterioration of the properties of the chip. The absolute maximum rating of the Pd stated in this specification is when the

IC is mounted on a 70mm x 70mm x 1.6mm glass epoxy board. In case of exceeding this absolute maximum rating,

increase the board size and copper area to prevent exceeding the Pd rating.

6. Recommended Operating Conditions

These conditions represent a range within which the expected characteristics of the IC can be approximately obtained.

The electrical characteristics are guaranteed under the conditions of each parameter.

7. Inrush Current

When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow

instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power supply.

Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing of

connections.

8. Operation Under Strong Electromagnetic Field

Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.

9. Testing on Application Boards

When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject

the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should always

be turned off completely before connecting or removing it from the test setup during the inspection process. To prevent

damage from static discharge, ground the IC during assembly and use similar precautions during transport and storage.

10.Inter-pin Short and Mounting Errors

Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in

damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.

Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and

unintentional solder bridge deposited in between pins during assembly to name a few.

11.Unused Input Terminals

Input terminals of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and

extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small charge

acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause

unexpected operation of the IC. So unless otherwise specified, unused input terminals should be connected to the power

supply or ground line.

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Operational Notes – continued

12.Regarding Input Pins of the IC

This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated.

P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a parasitic diode

or transistor. For example (refer to figure below):

When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.

When GND > Pin B, the P-N junction operates as a parasitic transistor.

Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual

interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to

operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be

avoided.

Resistor

Transistor (NPN)

Pin A

Pin B

B

E

C

Pin A

B

C

E

P

P⁺

N

P⁺

P

P⁺

N

Parasitic

Elements

Parasitic

Elements

P Substrate

GND GND

P Substrate

GND

Parasitic

Elements

Parasitic

Elements

N Region

close-by

Figure 47. Example of Monolithic IC Structure

13. Ceramic Capacitor

When using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with

temperature and the decrease in nominal capacitance due to DC bias and others.

Ordering Information

F

V

B M 6

0

5

4

-

C E 2

Package

FV: SSOP-B28W

Rank

C:Automotive

Part Number

Packaging and forming specification

E2: Embossed tape and reel

Marking Diagram

SSOP-B28W (TOP VIEW)

Part Number Marking

LOT Number

B M 6 0 0 5 4

1PIN MARK

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Physical Dimension, Tape and Reel Information

Package Name

SSOP-B28W

(Max 9.55 (include.BURR))

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Revision History

Date

Revision

001

Changes

10.Apr.2015

New Release

Page 7 Adding UL1577 Rating Table

Page15 Misprint correction of Description of Pins and Cautions on Layout of Board (7)FLT

Page17 Misprint correction of Description of Functions and Examples of Constant Setting

(1)Miller Clamp Function

25.Dec.2015

002

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Notice

Precaution on using ROHM Products

(Note 1)

1. If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment

,

aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,

bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales

representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way

responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any

ROHM’s Products for Specific Applications.

(Note1) Medical Equipment Classification of the Specific Applications

JAPAN

USA

EU

CHINA

CLASSⅢ

CLASSⅣ

CLASSⅡb

CLASSⅢ

2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor

products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate

safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which

a failure or malfunction of our Products may cause. The following are examples of safety measures:

[a] Installation of protection circuits or other protective devices to improve system safety

[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure

3. Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.

Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the

use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our

Products under any special or extraordinary environments or conditions (as exemplified below), your independent

verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:

[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents

[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust

[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,

H2S, NH3, SO2, and NO2

[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves

[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items

[f] Sealing or coating our Products with resin or other coating materials

[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of

flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning

residue after soldering

[h] Use of the Products in places subject to dew condensation

4. The Products are not subject to radiation-proof design.

5. Please verify and confirm characteristics of the final or mounted products in using the Products.

6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,

confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power

exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect

product performance and reliability.

7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in

the range that does not exceed the maximum junction temperature.

8. Confirm that operation temperature is within the specified range described in the product specification.

9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in

this document.

Precaution for Mounting / Circuit board design

1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product

performance and reliability.

2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must

be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,

please consult with the ROHM representative in advance.

For details, please refer to ROHM Mounting specification

Notice-PAA-E

Rev.003

Precautions Regarding Application Examples and External Circuits

1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the

characteristics of the Products and external components, including transient characteristics, as well as static

characteristics.

2. You agree that application notes, reference designs, and associated data and information contained in this document

are presented only as guidance for Products use. Therefore, in case you use such information, you are solely

responsible for it and you must exercise your own independent verification and judgment in the use of such information

contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses

incurred by you or third parties arising from the use of such information.

Precaution for Electrostatic

This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper

caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be

applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,

isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).

Precaution for Storage / Transportation

1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:

[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2

[b] the temperature or humidity exceeds those recommended by ROHM

[c] the Products are exposed to direct sunshine or condensation

[d] the Products are exposed to high Electrostatic

2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period

may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is

exceeding the recommended storage time period.

3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads

may occur due to excessive stress applied when dropping of a carton.

4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of

which storage time is exceeding the recommended storage time period.

Precaution for Product Label

A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.

Precaution for Disposition

When disposing Products please dispose them properly using an authorized industry waste company.

Precaution for Foreign Exchange and Foreign Trade act

Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign

trade act, please consult with ROHM in case of export.

Precaution Regarding Intellectual Property Rights

1. All information and data including but not limited to application example contained in this document is for reference

only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any

other rights of any third party regarding such information or data.

2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the

Products with other articles such as components, circuits, systems or external equipment (including software).

3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any

third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM

will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to

manufacture or sell products containing the Products, subject to the terms and conditions herein.

Other Precaution

1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.

2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written

consent of ROHM.

3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the

Products or this document for any military purposes, including but not limited to, the development of mass-destruction

weapons.

4. The proper names of companies or products described in this document are trademarks or registered trademarks of

ROHM, its affiliated companies or third parties.

Notice-PAA-E

Rev.003


型号：	BM60054FV-CE2
厂家：	ROHM
描述：	Isolation voltage 2500Vrms 1ch Gate Driver Providing Galvanic Isolation 栅
文件：	总40页 (文件大小：3164K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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