ENA0966B [SANYO]
Bi-CMOS LSI Eight-Channel Switching Regulator Controller; BI -CMOS LSI八通道开关稳压器控制器
| 型号： | ENA0966B |
| 厂家： | 
SANYO SEMICON DEVICE |
| 描述： | Bi-CMOS LSI Eight-Channel Switching Regulator Controller |
| 文件： | 总12页 (文件大小：151K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Ordering number : ENA0966B
Bi-CMOS LSI
LV5604T
Eight-Channel Switching Regulator
Controller
Overview
The LV5604T is a eight-channel switching regulator controller.
Features
• Low-voltage (3V) operation
• Reference voltage precision : ±1%
• Independent standby functions for each of the eight channels
• Is capable of driving MOS transistors
• Synchronous rectification : channel 1 and channel 2
• Supports inverting step-up operation.
Specifications
Maximum Ratings at Ta = 25°C
Parameter
Maximum supply voltage
Allowable power dissipation
Operating temperature
Storage temperature
Symbol
max
Conditions
Ratings
Unit
V
V
16
1
CC
Pd max
Topr
W
-30 to +85
-55 to +125
°C
°C
Tstg
Recommended Operating Conditions at Ta = 25°C
Parameter
Supply voltage
Symbol
Conditions
Ratings
Unit
V
V
3 to 15
3 to 15
7 to 30
CC
Supply voltage
VBIAS
RT
V
Timing resistor
kΩ
pF
Timing capacitor
Triangle wave frequency
CT
100 to 1000
0.1 to 1.3
f
MHz
OSC
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee
thereof. If you should intend to use our products for applications outside the standard applications of our
customer who is considering such use and/or outside the scope of our intended standard applications, please
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our
customer shall be solely responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer
's products or
equipment.
O0108 MS 20080918-S00002 / D1207 MS 20071113-S00006 / O3107 MS PC 20071022-S00010 No.A0966-1/12
LV5604T
= VBIAS = 3.6V, SCP = 0V
Conditions
Electrical Characteristics at Ta = 25°C, V
CC
Ratings
typ
Parameter
Symbol
Unit
V
min
max
Error amplifier 1
+
IN pin internal bias voltage
VB
Value added to the error amplifier
offset at the error amplifier + side
voltage
0.509
0.515
0.521
-
Output low voltage
Output high voltage
Error amplifier 2
ch1 to ch8
ch1 to ch8
V
V
FB
IN = 2.0V, IFB = 20µA
0.2
V
V
Low
FB
-
IN = 0V IFB1 = -20µA
2.0
-6
Hi
-
IN5 RE pin offset voltage
VOF
6
mV
V
-
Output low voltage
Output high voltage
Protection circuit
Threshold voltage
SCP pin current
V
FB5RE
IN5 RE = 2.0V, IFB = 20µA
0.2
Low
V
FB5RE
FB5RE ; H, IFB = 500µA
1.95
1.1
V
Hi
V
I
1.25
4
1.4
0.2
V
µA
V
SCP
SCP
Short circuit detection signal pin
VSCPOUT
Open collector
ISCPOUT = 100µA
Software start block (ch1 to ch8)
Soft start current
Soft start resistance
Fixed duty
ch1 to ch8
I
CSOFT1 to 8 = 0V
3.2
4
4.8
µA
kΩ
SF
ch1 to ch8
R
160
200
240
SF
-
Maximum on duty 1
Maximum on duty 2
Maximum on duty 3
Output block 1 to 6
ch1 to ch4
ch5
Duty MAX 1 to 4
Duty MAX 5
Out monitor, IN = 0V
100
80
%
%
%
-
Out monitor, IN = 0V
85
85
90
90
-
ch6 to ch8
Duty MAX 6 to 8
Out monitor, IN = 0V
80
OUT pin high side on resistance
OUT pin high side on resistance
Triangle wave oscillator block
Current setting pin voltage
Output current
R
R
SOUR
SINK
I
I
= 10mA
= 10mA
25
10
Ω
Ω
OUT
OUT
O
O
VT RT
CT
RT = 10kΩ
0.57
220
2.5
V
I
µA
OH
∆I CT
Output current ratio
Oscillation frequency
Reference voltage block
Reference voltage
Line regulation
CT pin, ISOURCE/ISINK
O
f
1
RT = 10kΩ, CT = 270pF
390
490
570
10
kHz
OSC
VREF
1.230
V
V
REF
V
= 3V to 15V
CC
mV
LN
Control circuit
On state voltage
V
V
I
CTL
2.0
2.0
V
V
ON
OFF state voltage
Pin input current
CTL
0.6
60
OFF
CTL
VCTL = 2V
µA
IN
Standby circuit
On voltage
V
V
I
STBY
STBY
V
V
ON
Off voltage
0.6
60
OFF
Pin input current
STBY
VSTBY = 2V
µA
IN
All circuits
-
-
V
current consumption
I
I
IN1 to IN8 = 1V
6
7.5
1
mA
CC
Standby mode current consumption
CC
OFF
VSTBY = VCTL = 0V
µA
I
= I
+ I
OFF CC BIAS
No.A0966-2/12
LV5604T
Package Dimensions
unit : mm (typ)
3289
Pd max -- Ta
1.2
1
Specified board : 50.0×50.0×1.6mm3
glass epoxy
9.0
7.0
48
33
0.8
0.6
0.4
0.2
49
32
17
0.40
64
1
16
0.125
0.4
0.16
0
–
–
30 20
0
20
40
60
80
100
(0.5)
Ambient temperature, Ta – °C
SANYO : TQFP64J(7X7)
Pin Assignment
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
1
2
3
4
5
6
7
8
9
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
SYNC2
VBIAS1
STBY1
CLK_IN
VBIAS2
V
CC
STBY2
STBY8
STBY7
STBY6
STBY5
CSOFT8
CSOFT7
CSOFT6
CSOFT5
CTL
STBY3
STBY4
CSOFT1
CSOFT2
CSOFT3
10
11
12
13
14
15
16
CSOFT4
SCP
SCP_OUT
-
IN1
SEL_CH8
FB8
FB1
-
-
IN2
IN8
FB2
FB7
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
Top view
No.A0966-3/12
LV5604T
Block Diagram and Sample Application Circuit
Signal system
power supply V
CTL
SCP_OUT
SCP
SCP
(NC) (NC)
CC
VREF
CTL
Pre-output stage
VBAT
power supply VBIAS1
OUT1
FB1A
FB2A
FB3A
FB4A
-
-
+
+
-
Step-down
(DOWN)
-
IN1
FB1A
+
FB1
CSOFT1
OUT1N
SYNC1
V
1
O
3.3V/100mA
SYNC1
L: Synchronous
rectification
H: Diode rectification
-
-
+
+
-
Step-down
(DOWN)
OUT2
-
IN2
FB2A
FB3A
FB4A
+
FB2
CSOFT2
OUT2N
SYNC2
V
2
O
3.3V/100mA
SYNC2
L: Synchronous
rectification
H: Diode rectification
Step-down
(DOWN)
-
-
+
+
-
OUT3
-
IN3
+
FB3
CSOFT3
Step-down
(DOWN)
OUT4
-
-
+
+
-
-
IN4
+
FB4
V
2
O
FB5A
3.3V/100mA
CSOFT4
GND_P(VS1)
VBIAS2
-
IN5 RE
-
+
+
IN5 RE
Inversion
(INVENT)
FB5A
FB5RE
-
-
-
+
+
-
OUT5
IN5
+
FB5
V
3
O
CSOFT5
-4V/100mA
FB6A
FB6A
+
+
-
+
-
-
IN6
-
OUT6
FB6
Step-up
(UP)
CSOFT6
ON/OFF
setting
FB7A
FB7A
+
-
+
+
-
-
IN7
-
OUT7
FB7
Step-up
(UP)
CSOFT7
ON/OFF
setting
SEL_CH8 MODE
Step-down;
Connect to VBIAS
Step-up;
Connect to GND2
FB8A
SEL_CH8
OUT8
FB8A
+
-
+
+
-
-
IN8
-
FB8
Step-up
(UP)
CSOFT8
STBY
OSC
ON/OFF
setting
GND_P(VS2)
GND_S
CLK
CLK_OUT
CLK_IN RT
CT
Channel 8 step-up/step-down is
selected by SEL_CH8
No.A0966-4/12
LV5604T
Pin Function
Block
Pin No.
Pin Name
STBY1
Functions
ch1
3
Standby input. H/ch1 ; ON, L/ch1 ; OFF
Error amplifier Inverting input
Error amplifier output
(Step-down)
-
IN1
13
14
61
62
7
FB1
OUT1
Output. External transistor P-channel gate connect
Output. External transistor N-channel gate connection
Soft start setting capacitor connection. Connect to GND through a capacitor.
Standby input. H/ch2 ; ON, L/ch2 ; OFF
OUT1N
CSOFT1
STBY2
ch2
4
(Step-down)
-
15
16
60
59
8
IN2
Error amplifier Inverting input
FB2
Error amplifier output
OUT2
Output. External transistor P-channel gate connection
Output. External transistor N-channel gate connection
Soft start setting capacitor connection. Connect to GND through a capacitor.
Standby input. H/ch3 ; ON, L/ch3 ; OFF
OUT2N
CSOFT2
STBY3
ch3
5
(Step-down)
-
17
18
9
IN3
Error amplifier Inverting input
FB3
Error amplifier output
CSOFT3
OUT3
STBY4
Soft start setting capacitor connection. Connect to GND through a capacitor.
Output. External transistor P-channel gate connection
Standby input. H/ch4 ; ON, L/ch4 ; OFF
57
6
ch4
(Step-down)
-
19
20
10
56
42
28
29
27
25
26
38
55
43
30
31
39
53
44
32
33
40
52
45
34
35
41
51
IN4
Error amplifier Inverting input
FB4
Error amplifier output
CSOFT4
OUT4
STBY5
Soft start setting capacitor connection. Connect to GND through a capacitor.
Output. External transistor P-channel gate connection
Standby input. H/ch5 ; ON, L/ch5 ; OFF
ch5
(Inversion)
-
IN5 RE
Inversion step-up error amplifier, - (Inverting) input
Inversion step-up error amplifier, + (noninverting) input
Inversion step-up error amplifier output
+
IN5 RE
FB5RE
-
IN5
Error amplifier Inverting input
FB5
Error amplifier output
CSOFT5
OUT5
STBY6
Soft start setting capacitor connection. Connect to GND through a capacitor.
Output. External transistor P-channel gate connection
Standby input. H/ch6 ; ON, L/ch6 ; OFF
ch6
(Step-up)
-
IN6
Error amplifier Inverting input
FB6
Error amplifier output
CSOFT6
OUT6
STBY7
Soft start setting capacitor connection. Connect to GND through a capacitor.
Output. External transistor N-channel gate connection
Standby input. H/ch7 ; ON, L/ch7 ; OFF
ch7
(Step-up)
-
IN7
Error amplifier Inverting input
FB7
Error amplifier output
CSOFT7
OUT7
STBY8
Soft start setting capacitor connection. Connect to GND through a capacitor.
Output. External transistor N-channel gate connection
Standby input. H/ch8 ; ON, L/ch8 ; OFF
ch8
(Step-down)
(Step-up)
-
IN8
Error amplifier Inverting input
FB8
Error amplifier output
CSOFT8
OUT8
Soft start setting capacitor connection. Connect to GND through a capacitor.
Output. External transistor (Step-up / N-channel, Step-down / P-channel) gate connection
Continued on next page.
No.A0966-5/12
LV5604T
Continued from preceding page.
Block
Pin No.
64
1
Pin Name
Functions
MODE
SYNC1
Synchronous rectification/diode rectification switching, L : synchronous rectification H : diode rectification
Synchronous rectification/diode rectification switching, L : synchronous rectification H : diode rectification
Channel 8 step-up/step-down switching, L (GND) : step-up H (VBIAS2) : step-down
Power supply input (signal system)
SYNC2
36
46
2
SEL_CH8
POWER
V
CC
VBIAS1
VBIAS2
GND_S
GND_P1 (VS1)
GND_P2 (VS2)
VREF
Power supply input (ch1 to ch4, pre-output stage)
Power supply input (ch5 to ch8, pre-output stage)
Ground (signal system)
47
24
58
54
23
37
11
12
21
22
48
49
63
50
Ground (ch1 to ch4, pre-output stage)
Ground (ch5 to ch8, pre-output stage)
Reference voltage output
CONTROL
OSC
CTL
Power supply control
SCP
Connection pin for the delay time setting capacitor of short circuit detection circuit
Short circuit detection circuit output
SCP_OUT
CT
Triangle wave oscillation frequency setting capacitor connection
Triangle wave oscillation frequency setting resistor connection
External clock input
RT
CLKIN
CLKOUT
(NC)
Clock output
OTHER
No connection
(NC)
No connection
No.A0966-6/12
LV5604T
Equivalent Circuits
Pin No.
Pin Name
Description
Equivalent Circuit
37
3
CTL
CTL : Controls operation of all channels.
CTL/STBY*
STBY1
STBY2
STBY3
STBY4
STBY5
STBY6
STBY7
STBY8
STBY* : Independently controls operation of
the corresponding channel.
4
120kΩ
30kΩ
5
Operation is high active.
6
High : Circuit operation ON
42
43
44
45
13
15
17
19
25
30
32
34
Low : Circuit operation OFF
-
IN1
Error amplifier inverting input.
VREG
(Internal constant
voltage)
-
IN2
The regulator output is divided by a resistor
-
-
IN3
and connected to IN*
-
IN4
-
IN*
-
IN5
500Ω
-
IN6
-
IN7
-
IN8
5kΩ
5kΩ
GND_S
14
16
18
20
26
31
33
35
FB1
FB2
FB3
FB4
FB5
FB6
FB7
FB8
Error amplifier output.
VREG
(Internal constant
voltage)
-
These pins, in combination with IN* ,
configure the error amplifier filters
20Ω
500Ω
FB*
GND_S
+
29
28
IN5 RE
Inversion step-up (Channel 5) error amplifier
input.
VREG
(Internal constant
voltage)
-
IN5 RE
These pins, in combination with FB5R,
configure the operational amplifier
(independent)
-
+
IN5 RE
IN5 RE
500Ω
500Ω
5kΩ
5kΩ
GND_S
27
FB5RE
Inversion step-up (Channel5) error amplifier
output.
VREG
(Internal constant
voltage)
+
This pin, in combination with IN5 RE and
-
IN5 RE, configures the operational amplifier
(independent).
FB5RE
GND_S
7
CSOFT1
CSOFT2
CSOFT3
CSOFT4
CSOFT5
CSOFT6
CSOFT7
CSOFT8
Soft start.
VREG
8
Connect to GND via a capacitor to set the
soft start time.
(Internal
constant
voltage)
9
10
38
39
40
41
500Ω
CSOFT*
10kΩ
200kΩ
GND_S
Continued on next page.
No.A0966-7/12
LV5604T
Continued from preceding page.
Pin No.
Pin Name
Description
Equivalent Circuit
61
62
60
59
57
56
55
53
52
51
22
OUT1
OUT1N
OUT2
OUT2N
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
RT
Output.
Connect external FET.
VBIAS*
VOUT*
VOUT*N
GND_P*(VS*)
Connect to GND through a resistor.
This pin, together with CT, sets the
oscillation frequency.
VREG
(Internal constant
voltage)
500Ω
500Ω
RT
GND_S
21
CT
Connect to GND through a capacitor.
This pin, together with RT, sets the
oscillation frequency.
VREG
(Internal constant
voltage)
CT
GND_S
11
SCP
Connect to GND via a capacitor to set the
short circuit detection circuit delay time.
VREG
(Internal constant
voltage)
1.5kΩ
13kΩ
SCP
GND_S
12
SCP_OUT
Short circuit detection circuit output.
When SCP exceeds the threshold voltage,
the open collector goes OFF and this pin
goes High.
VREG
(Internal
constant
voltage)
SCP_OUT
GND_S
Continued on next page.
No.A0966-8/12
LV5604T
Continued from preceding page.
Pin No.
Pin Name
Description
Equivalent Circuit
23
VREF
Internal constant voltage circuit output.
Connect a stabilizing capacitor.
VREG
(Internal constant
voltage)
VREF
14.8kΩ
GND_S
48
CLK_IN
External clock input.
VREG
(Internal constant
voltage)
Apply an external clock of the internal
oscillation frequency or higher.
CLKIN
300Ω
GND_S
49
CLK_OUT
Clock output.
VREG
(Internal constant
voltage)
This outputs the internal or external clock
frequency pulse.
300Ω
300Ω
CLKOUT
GND_S
64
1
SYNC1
SYNC2
Channel 1 and channel 2 synchronous/diode
rectification switching.
VREG
(Internal constant voltage)
Low : Synchronous rectification
High : Diode rectification
SYNC*
Switching operates independently for the
corresponding channel.
120kΩ
SYNC*
L : Synchronous rectification
H : Diode rectification
30kΩ
GND_S
36
SEL_CH8
Channel 8 step-up/step-down switching.
High : Sets step-down
VBIAS2
Low : Sets step-up
SEL_CH8
GND_P2 (VS2)
Channel 8 step-up/step-down switching
H (VBIAS2) : step-down, L (GND) : step-up
Continued on next page.
No.A0966-9/12
LV5604T
Continued from preceding page.
Pin No.
Pin Name
Description
Equivalent Circuit
CC
46
V
Signal system power supply
CC
V
2
VBIAS1
VBIAS2
Power system power supply
(Output stage)
VBIAS*
GND_S
47
24
GND_S
Signal system GND
58
54
GND_P1 (VS1) Output stage GND
GND_P2 (VS2) (Output stage GND)
GND_P*(VS*)
50
63
(NC)
(NC)
Use prohibited
(NC)
(Not connected pins)
Notes
(1) Channel 8 step-up/step-down selection function
The channel 8 step-up or step-down converter selection is made by the SEL_8CH pin connection.
Step-up/step-down is selected by SEL_CH8, but this selection cannot be switched during use, and is fixed to either
step-up or step-down in the design stage. In addition, unlike other channels, channel 8 is not connected internally to a
pull-up/pull-down resistor, so an external resistor must be connected instead.
(Mode selection using SEL_CH8)
Selected mode
Step-down (DOWN converter)
Step-up (UP converter)
SEL_CH8 connection
OUT8 resistor connection
VBIAS2
Connect to VBIAS2 via a resistor (between the PchTr gate and VBIAS2)
GND_P2 (VS2)
Connect to GND_P2 (VS2) via a resistor
(between the NchTr gate and GND_P2 (VS2))
(2) Soft start time setting method
The soft start time is set with the capacitor connected between CSOFT* and GND_S.
This IC has an independent soft start function for each channel, so a capacitor must be connected for each channel to
set the soft start (time).
(Description of soft start operation)
(Outline of soft start pin)
CSOFT* [V]
VB ( = 0.515 [V] (TYP))
CSOFT* voltage
VREG
(Internal constant voltage)
CSOFT*
GND_S
T [s]
200kΩ
Soft start time (Tsoft [s])
VB (0.515 [V])
CSOFT pin
charging starts
The output voltage reaches the
set voltage
(Output voltage constant)
(3) Setting the oscillation frequency
The internal oscillation frequency is set by the resistor connected to the RT pin and the capacitor connected to the CT
pin. The waveform generated on CT is a triangular wave with the charging/discharging waveform determined by RT
and CT.
1
f
=
[Hz]
OSC
CT × RT
The actual internal oscillation frequency deviates from the calculated value due to overshoot, undershoot and other
factors, so the frequency should be confirmed in an actual set.
No.A0966-10/12
LV5604T
(4) External input CLK function (CLK_IN)
Switching operation can be synchronized with external clock input (CLK_IN) by using the CLK_IN pin.
• External clock (CLK_IN) frequency and input level
When using external clock (CLK_IN) input, input a frequency equal to the internal oscillation frequency +20% or
more to CLK_IN. In addition, the CLK_IN configuration is shown in the figure “CLK_IN (input) equivalent circuit
(outline)” below.
The 0.8V reference voltage and CLK_IN are compared to determine the edges, so input a signal of 0.8V or more
(V
voltage or less) as the external clock (CLK_IN).
CC
• External/internal clock switching
Set the CTL pin Low before switching between the external clock and the internal clock.
• Maximum ON duty
The maximum ON duty (Duty_MAX*) of channel 1 to channel 4 is the 85% (typ.) setting. When using the external
clock (CLK_IN), the maximum ON duty (Duty_MAX*) becomes smaller, so care must be taken for the set output
voltage.
(CLK_IN (input) equivalent circuit (outline))
CLK_IN
0.8V
(5) SCP function
• Description of operation
When FB1 to FB8 go High due to the load being shorted or other reason, charging to the SCP pin starts, and if output
does not recover during the set time Tscp, the protective circuit (SCP) operates. When the protection circuit (SCP)
operates, all channel outputs are turned OFF. When not using the protection function (SCP), the SCP pin must be
shorted to GND_S with a line that is as short as possible.
When the SCP function operates and SCP_OUT goes High, all outputs are latched OFF. This latched state is
canceled by setting the CTL pin Low or by turning the power supply off.
• SCP_OUT
The SCP_OUT pin functions to notify an external microcontroller or other component of the SCP (short circuit
protection) and CTL status. The output configuration is an open drain output, and a pull-up resistor is used. When
not used, leave this pin open.
• Switching time
The SCP_OUT switching time is set by the capacitor connected to the SCP pin.
(SCP charging operation)
(SCP and SCP_OUT operation)
SCP [V]
Charging with
Iscp = 4 [µA]
CTL
SCP
1.25 [V]
(TYP)
Threshold voltage
1.25 (TYP)
T [s]
tscp
SCP_OUT
Output short circuit
SCP operation
No.A0966-11/12
LV5604T
SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using
products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition
ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd.
products described or contained herein.
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This catalog provides information as of October, 2008. Specifications and information herein are subject
to change without notice.
PS No.A0966-12/12
相关型号：
ENA0967
Bi-CMOS LSI PWM Constant-Current Control Stepping Motor Driver and Switching Regulator Controller
SANYO
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