SI4012 [SILICON]

CRYSTAL-LESS RF TRANSMITTER; 无晶体射频发射器
SI4012
型号: SI4012
厂家: SILICON    SILICON
描述:

CRYSTAL-LESS RF TRANSMITTER
无晶体射频发射器

晶体 射频
文件: 总16页 (文件大小:108K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Si4012  
Si4012 CRYSTAL-LESS RF TRANSMITTER  
Features  
Frequency range  
27–960 MHz  
Output Power Range  
–13 to +10 dBm  
Low Power Consumption  
OOK  
Crystal-less operation  
±150 ppm: 0 to 20° C  
±250 ppm: –40 to 85° C  
Optional crystal input for higher  
tolerances  
Low power shutdown mode  
Integrated voltage regulator  
256 byte FIFO  
Low battery detector  
SMBus Interface  
–40 to +85 °C temperature range  
10-Pin MSOP Package, Pb-free  
RoHs compliant  
14.2 mA @ +10 dBm  
FSK  
19.8 mA @ +10 dBm  
Ordering Information:  
Data Rate = 0 to 100 kbaud FSK  
FSK and OOK modulation  
Power Supply = 1.8 to 3.6 V  
See page 53.  
Low BOM  
Pin Assignments  
Si4012  
Applications  
Wireless MBus T1-mode  
Remote control  
Home security & alarm  
Personal data logging  
Toy control  
Remote meter reading  
Remote keyless entry  
Home automation  
Industrial control  
Sensor networks  
Health monitors  
GPIO0/XTAL  
1
2
3
4
5
10 SDA  
GND  
TXM  
TXP  
VDD  
9
8
7
6
SCL  
SDN  
nIRQ  
LED  
Si4012  
Wireless PC peripherals  
Description  
Silicon Laboratories’ Si4012 is a fully integrated crystal-less CMOS high-data rate  
RF transmitter designed for the sub-GHz ISM band. This chip is optimized for  
battery powered applications requiring low standby currents and high output  
transmit power.  
Patents pending  
The device offers advanced radio features including continuous frequency  
coverage from 27–960 MHz, adjustable output power of up to +10 dBm, and data  
rates up to 100 kbaud in FSK mode. The Si4012’s high level of integration offers  
reduced BOM cost while simplifying the overall system design.  
Functional Block Diagram  
Si4012  
DIGITAL LOGIC  
ANTENNA  
RF ANALOG CORE  
TUNE  
OOK  
SDA  
SCL  
SMBus  
INTERFACE  
TXP  
TXM  
AUTO  
TUNE  
DIVIDER  
LPOSC  
PA  
FSK  
SDN  
nIRQ  
MODULATOR  
LCOSC  
TX  
256 BYTE  
DATA FIFO  
LDO  
POR  
BANDGAP  
VDD  
GND  
VA  
VD  
DIGITAL  
CONTROLLER  
LED  
GPIO0/XTAL  
SLP  
TMR  
REGISTER  
BANK  
BATTERY  
MONITOR  
XTAL  
OSC  
Rev 0.1 7/10  
Copyright © 2010 by Silicon Laboratories  
Si4012  
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.  
Si4012  
2
Rev 0.1  
Si4012  
TABLE OF CONTENTS  
Section  
Page  
1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4  
1.1. Definition of Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9  
2. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10  
3. Pin Descriptions: Si4012 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11  
4. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12  
5. Package Outline: Si4012 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13  
6. PCB Land Pattern: Si4012 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14  
Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16  
Rev 0.1  
3
Si4012  
1. Electrical Specifications  
Table 1. DC Characteristics1  
Parameter  
Symbol  
Conditions  
Min Typ Max Units  
Supply Voltage Range  
VDD  
1.8  
3.6  
V
Power Saving Modes IShutdown  
IIdle  
Lowest current mode  
100  
700  
nA  
nA  
Register values retained, lowest current consumption idle  
mode  
TUNE Mode Current  
ITune  
Register values retained, LCOSC on fastest response to TX  
mode  
5
mA  
TX Mode Current @  
10 dBm  
ITX_OOK  
ITX_FSK  
OOK, Manchester encoded  
FSK  
14.2  
19.8  
mA  
mA  
Notes:  
1. All specification guaranteed by production test unless otherwise noted. Production test conditions and max limits are  
listed in the "Production Test Conditions" section on page 9.  
2. Guaranteed by qualification. Qualification test conditions are listed in the "Production Test Conditions" section on  
page 9.  
Table 2. Absolute Maximum Ratings1,2  
Parameter  
Symbol  
Value  
–0.5 to 3.9  
10  
Unit  
V
Supply Voltage  
V
I
DD  
3
Input Current  
mA  
V
IN  
4
Input Voltage  
V
–0.3 to (V + 0.3)  
IN  
DD  
Junction Temperature  
Storage Temperature  
Notes:  
T
–40 to 90  
C  
C  
OP  
T
–55 to 125  
STG  
1. Permanent device damage may occur if the absolute maximum ratings are exceeded. Functional operation should be  
restricted to the conditions as specified in the operational sections of this data sheet. Exposure beyond recommended  
operating conditions for extended periods may affect device reliability.  
2. Handling and assembly of these devices should only be done at ESD-protected workstations.  
3. All input pins besides VDD  
.
4. For GPIO pins configured as inputs.  
4
Rev 0.1  
Si4012  
Table 3. Si4012 RF Transmitter Characteristics  
(TA = 25° C, VDD = 3.3 V, RL = 550 , unless otherwise noted)  
Parameter  
Symbol  
Test Condition  
Min  
Typ  
Max  
Unit  
1
Frequency Range  
F
27  
960  
MHz  
ppm  
RF  
2
Frequency Noise (rms)  
Allen deviation, measured  
across 1 ms interval  
0.3  
Phase Noise @ 915 MHz  
10 kHz offset  
100 kHz offset  
1 MHz offset  
–70  
–100  
–105  
5
dBc/Hz  
dBc/Hz  
dBc/Hz  
ms  
Frequency Tuning Time  
Selected Frequencies in  
Range of 27–960 MHz  
Discrete frequencies  
315  
MHz  
MHz  
MHz  
MHz  
MHz  
ppm  
390  
433.92  
868  
915  
Carrier Frequency Accuracy  
0°C T 70° C  
–150  
–250  
–15  
+150  
+250  
15  
A
–40°C T 85° C  
ppm  
A
F
= 100 MHz  
kHz  
RF  
0°C T 70° C  
A
F
= 100 MHz  
–25  
–47.3  
–78.8  
–65.1  
–108  
–130  
–217  
–137  
–229  
–10  
25  
kHz  
kHz  
kHz  
kHz  
kHz  
kHz  
kHz  
kHz  
kHz  
ppm  
RF  
–40°C T 85° C  
A
F
= 315 MHz  
47.3  
78.8  
65.1  
108  
130  
217  
137  
229  
+10  
RF  
0°C T 70° C  
A
F
= 315 MHz  
RF  
–40°C T 85° C  
A
F
= 433.92 MHz  
RF  
0°C T 70° C  
A
F
= 433.92 MHz  
RF  
–40°C T 85° C  
A
F
= 868 MHz  
RF  
0°C T 70° C  
A
F
= 868 MHz  
RF  
–40°C T 85° C  
A
F
= 915 MHz  
RF  
0°C T 70° C  
A
F
= 915 MHz  
RF  
–40°C T 85° C  
A
Frequency Error  
Contribution with External  
Crystal  
Notes:  
1. The frequency range is continuous over the specified range.  
2. The frequency step size is limited by the frequency noise.  
3. Optimum differential load is equal to 4 V/(11.5mA/2 * 4/PI) = 550 Therefore the antenna load resistance in parallel  
with the Si4012 differential output resistance should equal 600   
Rev 0.1  
5
Si4012  
Table 3. Si4012 RF Transmitter Characteristics (Continued)  
(TA = 25° C, VDD = 3.3 V, RL = 550 , unless otherwise noted)  
Parameter  
Symbol  
Test Condition  
Min  
Typ  
Max  
Unit  
3
Transmit Power  
Maximum programmed Tx  
10  
dBm  
power, with optimum differential  
load, V > 2.2 V  
DD  
Minimum programmed TX  
power, with optimum differential  
load,  
–13  
dBm  
V
> 2.2 V  
DD  
–1.0  
–2.5  
0.5  
0.5  
dB  
dB  
Power variation vs temp and  
supply, with optimum differential  
load, V > 2.2 V  
DD  
Power variation vs temp and  
supply, with optimum differential  
load, V  
> 1.8 V  
DD  
Transmit power step size  
from –13 to 6.5 dBm  
0.25  
dB  
us  
OOK mode  
0.34  
10.7  
PA Edge Ramp Rate  
Programmable Range  
Data Rate  
OOK  
FSK  
0.1  
0.1  
50  
kbaud  
kbaud  
100  
Notes:  
1. The frequency range is continuous over the specified range.  
2. The frequency step size is limited by the frequency noise.  
3. Optimum differential load is equal to 4 V/(11.5mA/2 * 4/PI) = 550 Therefore the antenna load resistance in parallel  
with the Si4012 differential output resistance should equal 600   
6
Rev 0.1  
Si4012  
Table 3. Si4012 RF Transmitter Characteristics (Continued)  
(TA = 25° C, VDD = 3.3 V, RL = 550 , unless otherwise noted)  
Parameter  
Symbol  
Test Condition  
Min  
Typ  
Max  
Unit  
FSK Deviation  
Max frequency deviation  
Deviation resolution  
Deviation accuracy  
300  
2
ppm  
ppm  
ppm  
kHz  
TBD  
30  
Max frequency deviation,  
100 MHz  
Deviation resolution,  
100 MHz  
200  
95  
Hz  
Max frequency deviation,  
315 MHz  
kHz  
Deviation resolution, 315 MHz  
630  
130  
Hz  
Max frequency deviation,  
433.92 MHz  
kHz  
Deviation resolution,  
433.92 MHz  
868  
260  
Hz  
Max frequency deviation,  
868 MHz  
kHz  
Deviation resolution, 868 MHz  
1740  
275  
Hz  
Max frequency deviation,  
915 MHz  
kHz  
Deviation resolution, 915 MHz  
60  
1830  
Hz  
dB  
pF  
OOK Modulation depth  
315 MHz  
2.4  
12.5  
Antenna Tuning Capacitive  
Range (Differential)  
Notes:  
1. The frequency range is continuous over the specified range.  
2. The frequency step size is limited by the frequency noise.  
3. Optimum differential load is equal to 4 V/(11.5mA/2 * 4/PI) = 550 Therefore the antenna load resistance in parallel  
with the Si4012 differential output resistance should equal 600   
Rev 0.1  
7
Si4012  
Table 4. Low Battery Detector Characteristics  
(TA = 25° C, VDD = 3.3 V, RL = 550 , unless otherwise noted)  
Parameter  
Symbol  
Test Condition  
Min  
Typ  
Max  
Unit  
Battery Voltage Measurement  
Accuracy  
2
%
Table 5. Optional Crystal Oscillator Characteristics  
(TA = 25° C, VDD = 3.3 V, RL = 600 , unless otherwise noted)  
Parameter  
Symbol  
Test Condition  
Min  
Typ  
Max  
Unit  
Crystal Frequency Range  
GPI0 configured as crystal  
oscillator  
10  
13  
MHz  
Input Capacitance (GPIO0)  
Crystal ESR  
GPI0 configured as crystal  
oscillator  
5
9
50  
pF  
GPI0 configured as crystal  
oscillator  
Start-up Time  
Crystal oscillator only,  
60 mH motional arm  
inductance  
ms  
Table 6. EEPROM Characteristics  
Parameter  
Conditions  
Independent of number of bits  
Min  
Typ  
Max  
Units  
Program Time  
8
40  
ms  
changing values  
Maximum Count per Counter  
Write Endurance (per bit)*  
Using API  
1000000  
cycles  
cycles  
50000  
Note: *API uses coding technique to achieve write endurance of 1M cycles per bit.  
Table 7. Low Power Oscillator Characteristics  
VDD = 1.8 to 3.6 V; TA = –40 to +85 °C unless otherwise specified. Use factory-calibrated settings.  
Parameter  
Conditions  
Min  
Typ  
Max  
Units  
Programmable Frequency Range Programmable divider in pow- .1875  
ers of 2 up to 128  
24  
MHz  
Frequency Accuracy  
–1  
+1  
%
8
Rev 0.1  
Si4012  
1.1. Definition of Test Conditions  
Production Test Conditions:  
T = +25 °C  
A
V  
= +3.3 VDC  
DD  
TX output power measured at 100 MHz  
All RF output levels referred to the pins of the Si4012 (not the RF module)  
Qualification Test Conditions:  
T = –40 to +85 °C  
A
V  
= +1.8 to +3.6 VDC  
DD  
All RF output levels referred to the pins of the Si4012 (not the RF module)  
Rev 0.1  
9
Si4012  
2. Functional Description  
Si4012  
DIGITAL LOGIC  
RF ANALOG CORE  
ANTENNA  
TUNE  
OOK  
SDA  
SCL  
SMBus  
INTERFACE  
TXP  
TXM  
AUTO  
TUNE  
DIVIDER  
LPOSC  
PA  
FSK  
SDN  
nIRQ  
MODULATOR  
LCOSC  
TX  
256 BYTE  
DATA FIFO  
LDO  
POR  
BANDGAP  
VDD  
GND  
VA  
VD  
DIGITAL  
CONTROLLER  
LED  
GPIO0/XTAL  
SLP  
TMR  
REGISTER  
BANK  
BATTERY  
MONITOR  
XTAL  
OSC  
Figure 1. Si4012 Functional Block Diagram  
The Si4012 is a crystal wireless transmitter with The Si4012's PA output power can be configured  
continuous frequency tuning over the frequency range between –13 to +10 dBm with 0.25 dB of resolution.  
of 27–960 MHz. The wide operating voltage range of The PA incorporates automatic ramp-up and ramp-  
1.8–3.6 V and low current consumption makes the down control to reduce unwanted spectral spreading.  
Si4012 an ideal solution for battery powered  
applications.  
The Si4012 is designed to work with a microcontroller to  
allow custom configuration of the transmitter for  
The RF carrier is generated by Silicon Labs patented optimum performance. Voltage regulators are integrated  
pending crystal-less oscillator technology. The device on-chip which allows for a wide operating supply voltage  
2
achieves a frequency accuracy of ±150 ppm over the range of 1.8 to 3.6 V. A standard 2-pin SMB (I C) bus is  
commercial temperature range of 0 to 70 °C and used to communicate with an external microcontroller.  
±250 ppm over the industrial temperature range of –40  
to +85 °C.  
10  
Rev 0.1  
Si4012  
3. Pin Descriptions: Si4012  
GPIO0/XTAL 1  
10 SDA  
9 SCL  
8 SDN  
7 nIRQ  
6 LED  
GND 2  
TXM 3  
TXP 4  
VDD 5  
Si4012  
Pin Number  
Name  
GPIO0/XTAL  
GND  
Description  
1
2
General purpose input or crystal input  
Ground  
3,4  
5
TXM, TXP  
VDD  
RF transmitter differential outputs  
Supply input  
9
LED  
LED driver output pin  
7
nIRQ  
Interrupt status output, active low  
Shutdown input pin, active high  
8
SDN  
2
9
SCL  
SMB (I C) Clock input  
2
10  
SDA  
SMB (I C) Data input/output pin  
Rev 0.1  
11  
Si4012  
4. Ordering Information  
Part  
Number*  
Description  
Package  
Type  
Operating  
Temperature  
Si4012-A0-GT Crystal-less RF Transmitter  
MSOP-10  
–40 to 85 °C  
*Note: Add an “(R)” at the end of the device part number to denote tape and reel option.  
12  
Rev 0.1  
Si4012  
5. Package Outline: Si4012  
Figure 21 illustrates the package details for the Si4012. Table 16 lists the values for the dimensions shown in the  
illustration.  
Figure 2. 20-Pin Quad Flat No-Lead (QFN)  
Table 8. Package Dimensions  
Symbol  
Millimeters  
Nom  
Symbol  
Millimeters  
Nom  
Min  
Max  
Min  
Max  
A
1.10  
0.15  
0.95  
0.33  
0.23  
e
0.50 BSC  
A1  
0.00  
0.75  
0.17  
0.08  
L
0.40  
0.60  
0.80  
A2  
0.85  
L2  
0.25 BSC  
b
q
0°  
8°  
c
D
aaa  
bbb  
ccc  
ddd  
0.20  
0.25  
0.10  
0.08  
3.00 BSC  
4.90 BSC  
3.00 BSC  
E
E1  
Notes:  
1. All dimensions are shown in millimeters (mm).  
2. Dimensioning and tolerancing per ASME Y14.5M-1994.  
3. This drawing conforms to JEDEC Outline MO-187, Variation “BA.”  
4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body Components.  
Rev 0.1  
13  
Si4012  
6. PCB Land Pattern: Si4012  
Figure 2 illustrates the PCB land pattern details for the Si4012. Table 17 lists the values for the dimensions shown  
in the illustration.  
Figure 3. PCB Land Pattern  
14  
Rev 0.1  
Si4012  
Table 9. 10-Pin MSOP Package Dimensions  
Dimension  
MIN  
MAX  
C1  
E
4.40 REF  
0.50 BSC  
G1  
X1  
Y1  
Z1  
3.00  
0.30  
1.40 REF  
5.80  
Notes:  
General  
1. All dimensions shown are in millimeters (mm) unless otherwise noted.  
2. Dimensioning and Tolerancing per ASME Y14.5M-1994.  
3. This Land Pattern Design is based on the IPC-7351 guidelines.  
4. All dimensions shown are at Maximum Material Condition (MMC).  
Least Material Condition (LMC) is calculated based on a Fabrication  
Allowance of 0.05 mm.  
Solder Mask Design  
1. All metal pads are to be non-solder mask defined (NSMD). Clearance  
between the solder mask and the metal pad is to be 60 µm minimum,  
all the way around the pad.  
Stencil Design  
1. A stainless steel, laser-cut and electro-polished stencil with  
trapezoidal walls should be used to assure good solder paste release.  
2. The stencil thickness should be 0.125 mm (5 mils).  
3. The ratio of stencil aperture to land pad size should be 1:1.  
Card Assembly  
1. A No-Clean, Type-3 solder paste is recommended.  
2. The recommended card reflow profile is per the JEDEC/IPC J-STD-  
020 specification for Small Body Components.  
Rev 0.1  
15  
Si4012  
CONTACT INFORMATION  
Silicon Laboratories Inc.  
400 West Cesar Chavez  
Austin, TX 78701  
Tel: 1+(512) 416-8500  
Fax: 1+(512) 416-9669  
Toll Free: 1+(877) 444-3032  
Please visit the Silicon Labs Technical Support web page:  
https://www.silabs.com/support/pages/contacttechnicalsupport.aspx  
and register to submit a technical support request.  
The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice.  
Silicon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from  
the use of information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed features  
or parameters. Silicon Laboratories reserves the right to make changes without further notice. Silicon Laboratories makes no warranty, rep-  
resentation or guarantee regarding the suitability of its products for any particular purpose, nor does Silicon Laboratories assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation conse-  
quential or incidental damages. Silicon Laboratories products are not designed, intended, or authorized for use in applications intended to  
support or sustain life, or for any other application in which the failure of the Silicon Laboratories product could create a situation where per-  
sonal injury or death may occur. Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized ap-  
plication, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages.  
Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc.  
Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders.  
16  
Rev 0.1  

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