SSM9977GJ [SSC]
N-CHANNEL ENHANCEMENT-MODE POWER MOSFET; N沟道增强模式功率MOSFET
| 型号： | SSM9977GJ |
| 厂家： | 
SILICON STANDARD CORP. |
| 描述： | N-CHANNEL ENHANCEMENT-MODE POWER MOSFET |
| 文件： | 总5页 (文件大小：262K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SSM9977GH,J
N-CHANNEL ENHANCEMENT-MODE POWER MOSFET
Low gate-charge
BVDSS
R DS(ON)
ID
60V
90mW
11A
D
S
Simple drive requirement
Fast switching
G
Description
G
The SSM9977GH is in a TO-252 package, which is widely used for
commercial and industrial surface mount applications, and is well suited
for low voltage applications such as DC/DC converters. The through-hole
version, the SSM9977GJ in TO-251, is available for low-footprint vertical
mounting. These devices are manufactured with an advanced process,
providing improved on-resistance and switching performance.
D
S
TO-252 (H)
TO-251 (J)
G
D
S
Pb-free lead finish (second-level interconnect)
Absolute Maximum Ratings
Symbol
Parameter
Rating
60
Units
V
VDS
VGS
Drain-Source Voltage
Gate-Source Voltage
±25
V
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current1
ID @ TC=25°C
ID @ TC=100°C
IDM
11
A
7.1
A
45
A
PD @ TC=25°C
Total Power Dissipation
21
W
Linear Derating Factor
0.17
W/°C
°C
°C
TSTG
TJ
Storage Temperature Range
Operating Junction Temperature Range
-55 to 150
-55 to 150
Thermal Data
Symbol
Parameter
Value
6
Units
°C/W
°C/W
Rthj-c
Thermal Resistance Junction-case
Thermal Resistance Junction-ambient
Max.
Max.
Rthj-a
110
2/16/2005 Rev.2.2
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SSM9977GH,J
Electrical Characteristics @ Tj=25oC (unless otherwise specified)
Symbol
BVDSS
Parameter
Test Conditions
VGS=0V, ID=250uA
Min. Typ. Max. Units
Drain-Source Breakdown Voltage
60
-
-
0.04
-
-
V
∆BVDSS/∆Tj
Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=1mA
Static Drain-Source On-Resistance2 VGS=10V, ID=5A
VGS=4.5V, ID=4A
-
V/°C
mΩ
RDS(ON)
-
90
-
1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
120 mΩ
VGS(th)
gfs
Gate Threshold Voltage
VDS=VGS, ID=250uA
VDS=10V, ID=5A
VDS=60V, VGS=0V
VDS=48V ,VGS=0V
VGS=±25V
3
V
Forward Transconductance
Drain-Source Leakage Current (T=25oC)
7
-
S
IDSS
uA
uA
nA
nC
nC
nC
ns
ns
ns
ns
pF
pF
pF
-
10
j
Drain-Source Leakage Current (T=150oC)
-
25
j
IGSS
Qg
Gate-Source Leakage
Total Gate Charge2
Gate-Source Charge
Gate-Drain ("Miller") Charge
Turn-on Delay Time2
Rise Time
-
±100
ID=5A
6
10
Qgs
Qgd
td(on)
tr
VDS=48V
2
-
VGS=4.5V
3
-
VDS=30V
6
-
ID=5A
11
14
2
-
td(off)
tf
Turn-off Delay Time
Fall Time
RG=3.3Ω ,VGS=10V
RD=6Ω
-
-
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
VGS=0V
485
55
40
780
VDS=25V
-
-
f=1.0MHz
Source-Drain Diode
Symbol
Parameter
Test Conditions
Min. Typ. Max. Units
VSD
trr
Forward On Voltage2
IS=5A, VGS=0V
IS=5A, VGS=0V,
dI/dt=100A/µs
-
-
-
-
1.2
V
Reverse Recovery Time
Reverse Recovery Charge
23
28
-
-
ns
nC
Qrr
Notes:
1.Pulse width limited by Max. junction temperature.
2.Pulse width <300us , duty cycle <2%.
2/16/2005 Rev.2.2
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SSM9977GH,J
25
20
15
10
5
25
20
15
10
5
10V
7.0V
5.0V
4.5V
T C =25 o C
10V
7.0V
T C = 150 o
C
5.0V
4.5V
V G =3.0V
V
G =3.0V
0
0
0
2
4
6
8
0
2
4
6
8
V DS , Drain-to-Source Voltage (V)
V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
105
2.0
1.6
1.2
0.8
0.4
I D = 4 A
I D =5A
T
C =25 o C
V
G =10V
95
85
75
-50
0
50
100
150
2
4
6
8
10
V GS , Gate-to-Source Voltage (V)
T j , Junction Temperature ( o C)
Fig 3. On-Resistance vs. Gate Voltage
Fig 4. Normalized On-Resistance
vs. Junction Temperature
6
1.5
1.1
0.7
0.3
5
4
3
2
1
0
T j =150 o C
T j =25 o C
0
0.2
0.4
0.6
0.8
1
1.2
-50
0
50
100
150
T j , Junction Temperature ( o C)
V SD , Source-to-Drain Voltage (V)
Fig 5. Forward Characteristic of the
Reverse Diode
Fig 6. Gate Threshold Voltage vs.
Junction Temperature
2/16/2005 Rev.2.2
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SSM9977GH,J
f=1.0MHz
1000
100
10
12
10
8
I D = 5 A
C iss
V DS =48V
V DS =38V
V
DS =30V
6
C oss
C rss
4
2
0
0
4
8
12
1
5
9
13
17
21
25
29
Q G , Total Gate Charge (nC)
V DS , Drain-to-Source Voltage (V)
Fig 7. Gate Charge Characteristics
Fig 8. Typical Capacitance Characteristics
100
1
Duty factor=0.5
100us
0.2
10
0.1
0.1
0.05
1ms
PDM
0.02
1
t
10ms
0.01
T
T C =25 o C
100ms
Single Pulse
Duty factor = t/T
DC
Single Pulse
Peak Tj = PDM x Rthjc + TC
0.1
0.01
0.00001
0.1
1
10
100
1000
0.0001
0.001
0.01
0.1
1
V DS , Drain-to-Source Voltage (V)
t , Pulse Width (s)
Fig 9. Maximum Safe Operating Area
Fig 10. Effective Transient Thermal Impedance
VG
VDS
90%
QG
4.5V
QGD
QGS
10%
VGS
tr
td(on)
td(off) tf
Q
Charge
Fig 11. Switching Time Waveform
Fig 12. Gate Charge Waveform
2/16/2005 Rev.2.2
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SSM9977GH,J
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no
guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no
responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its
use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including
without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to
the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of
Silicon Standard Corporation or any third parties.
2/16/2005 Rev.2.2
www.SiliconStandard.com
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