STA5150 [STMICROELECTRONICS]
200W MONO BASH POWER AMPLIFIER; 单声道200W的BASH功放
| 型号： | STA5150 |
| 厂家： | 
ST |
| 描述： | 200W MONO BASH POWER AMPLIFIER |
| 文件： | 总14页 (文件大小：149K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
STA5150
200W MONO
POWER AMPLIFIER
■
MONOCHIP BRIDGE MONO AMPLIFIER FOR
®
BASH ARCHITECTURE
■
■
■
■
■
■
■
■
Ω,
Ω,
160W OUTPUT POWER @ R = 4
THD = 0.5%
L
200W OUTPUT POWER @ R = 4
L
THD = 10%
FLEXIWATT27
HIGH DYNAMIC PREAMPLIFIER INPUT
STAGES
TRANSISTOR POWER PROTECTION
ABSOLUTE OUTPUT CURRENT LIMIT
INTEGRATED THERMAL PROTECTION
EXTERNAL PROGRAMMABLE FEEDBACK
TYPE COMPRESSORS
■
■
■
AC COUPLED INPUT TO CLASS AB BRIDGE
OUTPUT AMPLIFIER
POWER SUPPLY OVER VOLTAGE
PROTECTION
PRECISION RECTIFIERS TO DRIVE THE
DIGITAL CONVERTER
■
FLEXIWATT POWER PACKAGE WITH 27 PIN
■ BASH® LICENCE REQUIRED
ON-OFF SEQUENCE/ TIMER WITH MUTE
AND STANDBY
DESCRIPTION
PROPORTIONAL OVER POWER OUTPUT
CURRENT TO LIMIT THE DIGITAL
CONVERTER
The STA5150 is a fully integrated power module de-
signed to implement a BASH® amplifier when used
in conjunction with STABP01 digital processor.
■
ABSOLUTE POWER BRIDGE OUTPUT
BLOCK DIAGRAM
+VS GND
-VS
OUT_ PRE
TRK
PWR_INP
ABSOLUTE
VALUE
BLOCK
CD+P
+
-
+2
OUTP
OUTP
CD-P
CD+
∆G
+2
IN_PRE
COMPRESSOR
V/l
OUTPUT BRIDGE
ATT_REL
PEAK
DETECTOR
S1
SOA
PROT.
DETECTOR
OVER
VOLTAGE
Ict
PROTECTION
THRESH
TURN-
ON/OFF
SEQUENCE
TRK_OUT
THERMAL
PROTECTION
STBY/MUTE
CD+N
OUTN
-1
-1
OUTN
CD-N
OUTPUT BRIDGE
D01AU1280
July 2003
1/14
STA5150
DESCRIPTION (continued)
Notice that normally only one Digital Converter is needed to supply a stereo or multi-channel amplifier system,
therefore most of the functions implemented in the circuit have summing outputs
The signal circuits are biased by fixed negative and positive voltages referred to Ground. Instead the final stag-
es of the output amplifiers are supplied by two external voltages that are following the audio signal . In this way
the headroom for the output transistors is kept at minimum level to obtain a high efficiency power amplifier.
The Compressor circuits, one for each channel, performs a particular transfer behavior to avoid the dynamic
restriction that an adaptive system like this requires. To have a high flexibility the attack / release time and the
threshold levels are externally programmable. The tracking signal for the external digital converter is generated
from the Absolute Value block that rectifies the audio signal present at the compressor output. The outputs of
these blocks are decoupled by a diode to permit an easy sum of this signal for the multichannel application. The
output power bridges have a dedicated input pin to perform an AC decoupling to cancel the compressor output
DC offset. The gain of the stage is equal to 4 (+12dB). A sophisticated circuit performs the output transistor pow-
er detector that , with the digital converter, reduces the power supply voltage . Moreover, a maximum current
output limiting and the over temperature sensor have been added to protect the circuit itself. The external volt-
age applied to the STBY/MUTE pin forces the two amplifiers in the proper condition to guarantee a silent turn-
on and turn-off.
ABSOLUTE MAXIMUM RATINGS
Symbol
+V
Parameter
Value
30
Unit
V
Positive supply voltage referred to pin 13 (GND)
Negative supply voltage referred to pin 13 (GND)
Positive supply voltage tracking rail referred to pin 13 (GND)
s
-V
s
-24
22
V
V
V
V
CD+
CD+
(1)
0.3
V
Positive supply voltage operated to Vs+
(1)
V
V
-0.3
V
CD-
CD-
Negative supply voltage referred to -Vs
Negative supply voltage tracking rail referred to pin 13 (GND)
-22
V
V
V
Att_Rel
Pin 3 Negative & Positive maximum voltage reffered to GND (pin
13)
-0.5 to +20
V
VTrk Pin 7, 10 Negative & Positive maximum voltage referred to
GNC (pin 13)
-20 to +20
-0.5 to +0.5
-7 to +0.5
V
V
V
Pwr_Imp
V
Pin 8 Negative & Positive maximum voltage referred to GND (pin
13)
In_pre
V
Pin 17 Negative & Positive maximum voltage referred to GND (pin
13)
threshold
I
Pin 11 maximum input current (Internal voltage clamp at 5V)
Pin 11 negative maximum voltage referred to GND (pin 13)
500
-0.5
µA
stb-max
V
V
stbymute
Notes: 1. V
must not be more negative than -Vs and V must not be more positive than +V
CD+ S
CD-
THERMAL DATA
Symbol
Parameter
Value
150
1
Unit
°C
T
Max Junction temperature
Thermal Resistance Junction to case .............................. ..max
j
R
°C/W
th j_case
2/14
STA5150
OPERATING RANGE
Symbol
Parameter
Value
+20 to +32
-10 to -24
Unit
+V
Positive supply voltage
Negative supply voltage
V
s
-V
s
V
∆V
Delta positive supply voltage
5V ≤ (Vs+ - VCD+) ≤ 10V
+3 to 20.7
-20.7 to -3
-1 to +1
V
s+
V
CD+
Positive supply voltage tracking rail
Negative supply voltage tracking rail
Current at pin In_Pre related to compressor behaviour
Voltage at pin Threshold
V
V
V
mA peak
V
CD-
I
in_Max
V
-5 to 0
trheshold
T
amb
Ambient Temperature Range
0 to 70
°C
I
Pin 11 maximum input current (Internal voltage clmp at 5V)
200
µA
sb_max
PIN CONNECTION
1
27
D01AU1281
3/14
STA5150
PIN FUNCTION
N°
1
Name
Description
-Vs
CD-P
Att_Rel
OutP
Negative Bias Supply
2
Channel P Time varying tracking rail negative power supply
Attack release rate
3
4
Channel P
5
OutP
Channel P
6
CD+P
Pwr_Inp
In_pre
Out_pre
Trk
Channel P positive power supply
Input to power stage
7
8
Pre-amp input (virtual ground)
Output channel
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
Absolute value block input
Stby/mute
Protection
Gnd
Standby/mute input voltage control
Protection signal for STABP01 digital processor
Analog Ground
+Vs
Positive Bias Supply
CD+
Time varying tracking rail positive power supply
Reference output for STABP01 digital processor
Compressor threshold input
Trk_out
Threshold
N.C.
N.C.
N.C.
N.C.
CD+N
OutN
Channel N positive power supply
Channel N
OutN
Channel N
N.C.
CD-N
-Vs
Channel N Time varying tracking rail negative power supply
Negative Bias Supply
4/14
STA5150
ELECTRICAL CHARACTERISTCS (Test Condition: Vs+ = 28V, Vs- = -24V, V
= 20V, V
= -20V,
CD-
CD+
Ω
R = 4 , external components at the nominal value f = 1KHz, Tamb = 25°C unless otherwise specified
L
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
PREAMPLIFIER AND COMPRESSOR
V
Maximum Voltage at Out_pre pin
Audio input current
10
11
12
Vpeak
mA
out clamp
I
0.8
in
V
Voltage at Attack_Release pin
Attenuation = 0dB
Attenuation = 6dB
Attenuation = 26dB
0
0.5
9
V
V
V
control
0.35
6
0.65
12
VC
Input voltage range for the
compression
-5
-1
V
omp_
Th
Z
Input impedance of Threshold pin
100
KΩ
th
Voffset Output Offset at Out_pre pin with:
V
CRT
V
CRT
V
CRT
= 0V; Attenuation = 0dB
= 0.5V; Attenuation = 6dB
= 9V; Attenuation = 26dB
-10
-250
-450
10
250
450
mV
mV
mV
THD
EN
Distortion at Out_pre:
Noise at Out_pre pin :
V
V
V
= 0V; Attenuation = 0dB
= 0.5V; Attenuation = 6dB
= 9V; Attenuation = 26dB
0.01
%
%
%
CRT
CRT
CRT
5
5
(2)
V
V
V
= 0V; Attenuation = 0dB
= 0.5V; Attenuation = 6dB
= 9V; Attenuation = 26dB
µV
µV
µV
CRT
CRT
CRT
10
50
60
I
Attack time current at pin
Attack_release
1.5
mA
ct
2. This value is due to the thermal noise of the external resistors R and R .
r
i
TRACKING PARAMETERS
G
Tracking reference voltage gain
Tracking ref. output voltage
Current capability
13
0
14
20
6
15
7
V
V
trk
V
trk_out
I
5
mA
MΩ
trk_out
Z
Input impedance (T )
1
trk_in
rk
OUTPUT BRIDGE
G
Half Output bridge gain
5.5
11
-1
6
6.5
13
1
dB
dB
dB
out
G
Output bridge differential gain
Output bridges gain mismatch
Continuous Output Power
12
ch
∆G
ch
P
out
THD = 0.5%
THD = 10%
150
190
160
200
W
W
THD
Total harmonic distortion of the
output bridge
Po = 5W
0.01
%
%
f = 20Hz to 20KHz; Po = 50W
0.1
50
V
Off
Output bridge D.C. offset
Noise at Output bridge pins
Input impedance
mV
µV
KΩ
EN
f = 20Hz to 20KHz; Rg = 50Ω
12
Z
100
140
180
br_in
5/14
STA5150
ELECTRICAL CHARACTERISTCS (continued)
Symbol
Parameter
Output power Rdson
Open Loop Voltage Gain
Unity Gain Bandwidth
Slew Rate
Test Condition
Min.
Typ.
100
100
1.4
7
Max.
Unit
mΩ
R
I
O
= 1A
200
dson
OLG
GB
dB
MHz
V/µs
SR
PROTECTION
V
Stby voltage range
0
1.6
4
0.8
3
V
V
stby
V
mute
Mute voltage range
V
Play voltage range
5
V
play
T
First Over temperature threshold
130
150
°C
°C
h1
h2
T
Second Over temperature
threshold
+
-
Unbal. Upper Unbalancing ground
Ground threshold
5
V
V
Referred to (CD - CD )/2
+
-
Unbal. Lower Unbalancing ground
Ground threshold
-5
20
Referred to (CD - CD )/2
UV
Under voltage threshold
|Vs+| + |Vs-|
V
th
P
Power dissipation threshold for
system regulation
I
= 50µA; @ Vds = 10V
prot
64
12
78
16
W
d_reg.
P
Switch off power dissipation
threshold
@ Vds = 10V
120
W
d_max
I
Protection current slope
Limiting Current threshold
for Pd > Pd
400
14
µA/W
prot
reg
I
A
lct
I+Vs
I-Vs
Positive supply current
Negative supply current
Stby (Vstby/mute pin = 0V)
Mute (Vstby/mute pin = 2.5V)
Play (Vstby/mute pin = 5V no signal)
4
30
30
mA
mA
mA
Stby (Vstby/mute pin = 0V)
Mute (Vstby/mute pin = 2.5V)
Play (Vstby/mute pin = 5V no signal)
4
30
30
mA
mA
mA
ICD+
ICD-
Positive traking rail supply current Stby (Vstby/mute pin = 0V)
Mute (Vstby/mute pin = 2.5V)
100
110
110
µA
mA
mA
Play (Vstby/mute pin = 5V no signal)
Negative traking rail supply current Stby (Vstby/mute pin = 0V)
Mute (Vstby/mute pin = 2.5V)
100
110
110
µA
mA
mA
Play (Vstby/mute pin = 5V no signal)
6/14
STA5150
FUNCTIONAL DESCRIPTION
The circuit contains all the blocks to build a mono amplifier. It is based on the Output Bridge Power Amplifier,
and its protection circuit. Moreover, the compression function and a signal rectifier are added to complete the
circuit.
The operation modes are driven by The Turn-on/off sequence block. In fact the IC can be set in three states by
the Stby/mute pin:
Standby ( V < 0.8V), Mute (1.6V < V < 3V), and Play (V > 4V).
pin
pin
pin
In the Standby mode all the circuits involved in the signal path are in off condition, instead
in Mute mode the circuits are biased but the Speakers Outputs are forced to ground potential.
These voltages can be get by the external RC network connected to Stby/Mute pin.
The same block is used to force quickly the I.C. In standby mode or in mute mode when the I.C. dangerous
condition has been detected. The RC network in these cases is used to delay the Normal operation restore.
The protection of the I.C. are implemented by the Over Temperature, Unbalance Ground, Output Short circuit,
Under voltage, and output transistor Power sensing as shown in the following table:
Table 1. Protection Implementation
Fault Type
Condition
Tj > 130 °C
Protection strategy
Action time
Release time
Chip Over
temperature
Mute
Fast
Fast
Fast
Fast
Fast
Slow Related to
Turn_on sequence
Chip Over
temperature
Tj > 150 °C
Standby
Slow, Related to
Turn_on sequence
Unbalancing
Ground
|Vgnd| > ((CD+) -
(CD-))/2 + 5V
Standby
Slow, Related to
Turn_on sequence
Short circuit
Iout > 14A
Standby
Slow, related to
Turn_on sequence
Under Voltage
|Vs+| + |Vs-|< 20V
Pd tr. > 64W
Standby
Slow, related to
Turn_on sequence
Extra power
dissipation
Reducing DIGITAL
CONVERTER output DIGITAL
Related to the
Related to the
DIGITAL
at output transistor
voltage.
CONVERTER
CONVERTER
Maximum power
dissipation
Pd tr. > 120W
Standby
Fast
Slow, related to
Turn_on sequence
at output transistor
See the POWER PROTECTION paragraph for the details
Compression
An other important function implemented, to avoid high power dissipation and clipping distortion, is the Com-
pression of the signal input. In fact the preamplifier stage performs a voltage gain equal to 5, fixed by Ri and Rr
external resistor, but in case of high input signal or low power supply voltage, its gain could be reduced of 26dB.
This function is obtained with a feedback type compressor that , in practice, reduces the impedance of the ex-
ternal feedback network. The behavior of compression it's internally fixed but depends from the Audio input volt-
age signal level, and from the Threshold voltage applied to the Threshold pin. The attack and release time are
programmable by the external RC network connected to the Att_Rel pins.
The constraints of the circuit in the typical application are the following:
Vthreshold range
Vin peak max
= -5 to 0
= 8V
Vout peak max
= 10V
7/14
STA5150
Gain without compression (G)
Max Attenuation ratio
= 5
= 26 dB
The following graph gives the representation of the Compressor activation status related to the Vthreshold and
the input voltage. The delimitation line between the two fields, compression or not, is expressed by the formula :
2
Vthreshold
= -------------------------------------------
V
in
G
Where G is the preamplifier gain without compression.
In the compression region the gain of the preamplifier will be reduced
(G = 2·Vthreshold/Vin) to maintain at steady state the output voltage equal 2*|Vthreshold| .
Instead in the other region the compressor will be off (G = 5).
The delimitation line between the two fields can be related to the output voltage of the preamplifier: in this case
the formula is :
=
V
2
Vthreshold
out
Figure 1. Compressor activation field
PEAK
V
IN
8
6
4
2
COMPRESSION
G < 5
G = 5
|Vthreshold|
D01AU1264
1
2
3
4
5
The relative attenuation introduced by the variable gain cell is the following :
V
2
5 V
th
-- ---------------------
20log
=
Attenuation
in_peak
The total gain of the stage will be:
Gdb = 20log5 + Attenuation
The maximum input swing is related to the value of input resistor, to guarantee that the input current remain
under Iin_Max value (1 mA).
V
in_peak
> ---------------------
R
i
I
in_max
8/14
STA5150
Figure 2. Compressor attenuation vs. input amplitude
Attenuation(dB)
0
-6
-12
-18
-24
|Vinpk|
D01AU1265
1
2
3
4
5
6
7
8
ABSOLUTE VALUE BLOCK
The absolute value block rectifies the signal after the compression to extract the control voltage for the external
digital converter. The output voltage swing is internally limited, the gain is internally fixed to 14.
The input impedance of the rectifier is very high , to allow the appropriate filtering of the audio signal before the
rectification (between Out_pre and Trk pins).
OUTPUT BRIDGE
The Output bridge amplifier makes the single-ended to Differential conversion of the Audio signal using two
power amplifiers, one in non-inverting configuration with gain equal to 2 and the other in inverting configuration
with unity gain. To guarantee the high input impedance at the input pins, Pwr_Inp1 and Pwr_Inp2, the second
amplifier stages are driven by the output of the first stages respectively.
POWER PROTECTION
To protect the output transistors of the power bridge a power detector is implemented (fig 3).
The current flowing in the power bridge and trough the series resistor Rsense is measured reading the voltage
drop between CD+1 and CD+. In the same time the voltage drop on the relevant power (Vds) is internally mea-
sured. These two voltages are converted in current and multiplied: the resulting current , Ipd, is proportional to
the instantaneous dissipated power on the relevant output transistor. The current Ipd is compared with the ref-
erence current Ipda, if bigger (dissipated power > 64W) a current, Iprot, is supplied to the Protection pin. The
aim of the current Iprot is to reduce the reference voltage for the digital converter supplying the power stage of
µ
the chip, and than to reduce the dissipated power. The response time of the system must be less than 200 Sec
to have an effective protection. As further protection, when Ipd reaches an higher threshold (when the dissipated
value is higher then 120W) the chip is shut down, forcing low the Stby/Mute pin, and the turn on sequence is
restarted.
9/14
STA5150
Figure 3. Power Protection Block Diagram
RSENSE
CD+
CD+P
ILOAD
V/I
OC1
TO TURN-ON/OFF
SEQUENCE
ILIM
CURRENT COMP
MULTIPLIER
I_PD
X
PDP1
TO TURN-ON/OFF
SEQUENCE
IPD
IPDP
V/I
CURRENT COMP
IPROT
IPD
TO PROT PAD
OPA
OPA
IPDA
D01AU1282
OUTP
CD-
OUTP
In fig. 4 there is the power protection strategy pictures. Under the curve of the 64W power, the chip is in normal
operation, over 120W the chip is forced in Standby. This last status would be reached if the digital converter
does not respond quikly enough reducing the stress to less than 120W.
The fig.5 gives the protection current, Iprot, behavior. The current sourced by the pin Prot follows the formula:
(Pd – Pd_av_th ) 5 10–4
-----------------------------------------------------------------
≡
Iprot
1.25V
for P < P
the I
= 0
prot
d
d_av_th
Independently of the output voltage, the chip is also shut down in the folowing conditions:
When the currentthrough the sensing resistor, R , reaches 14A (Voltage drop (CD+) - (CD+1) = 700mV).
sense
When the average junction temperature of the chip reaches 150°C.
When the ground potential differ from more than 5V from the half of the power supply voltage, ((CD+)-(CD-))/2
|
| +
When the sum of the supply voltage Vs+ |Vs-| <20V
The output bridge is muted when the average junction temperature reaches 130°C.
10/14
STA5150
Figure 4. Power protection threshold
Figure 5. Protection current behaviour
Ids(mA)
Iprot(mA)
20
Ilim=14A
16
12
Standby
Pd_Max=120W
8
10
Iprot slope=0.4mA/W
Pd_reg=64W
4
Normal
Operation
Pd(W)
Vds(V)
D01AU1284
20
40
64 80 100 120
0
10
20
30
40
50 D01AU1283
Figure 6. Test and Application Circuit
C12
R2
C3
C4
R4
R6
R5
C1
OUT_PRE
8
TRK
PWR_INP
INPUT1
R1
OUTP
OUTP
9
10
7
4
5
OUTP
IN_PRE
5V
R3
C2
ATT_REL
3
R13
R10
R11
CD+P
CD+
6
R14
C9
STBY/
MUTE
MUTE
R15
STBY
CD+
+VS
15
22
14
CD+N
+VS
11
R16
C10
R15
C8
C9
C6
STA5150
GND
C7
13
OUTN
OUTN
24
23
OUTN
C11
-VS
CD-
27
1
-VS
-VS
D1
2
CD-N
26
16
12
17
CD-P
TRK-OUT
TRK-OUT
PROT
PROT
R13
R14
THRESH
THRESH
R12
D01AU1285
11/14
STA5150
EXTERNAL COMPONENTS
Name
Function
Value
Formula
Ri
R1
Input resistor
10KΩ
(|G| = 5, Rr = 50KΩ)
Rr
Ri = -------
G
Rr
R2
Feedback resistor
50KΩ
(|G| = 5, Ri = 10KΩ
Rr = G Rr
Cac
C1
AC Decoupling capacitor
100nF
(fp = 16Hz,
Rac =100KΩ )
1
Cac = --------------------------------
2π fp Rac
Cct
C2
Capacitor for the attack time
2.2µF
Ict
Cct = attack------------------------
Vcontrol
(Tattack = 13mSec,
Vcontrol = 9V,
Ict = 1.5mA)
R3
Release constant time Resistor
470KΩ
(t = 1 Sec. ,
Cct = 2.2 µF )
τ
Rct = ---------
Cct
R4
R5
R6
C3
Resistor for tracking input voltage
filter
10KΩ
56KΩ
10KΩ
1nF
Resistor for tracking input voltage
filter
Resistor for tracking input voltage
filter
Capacitor for Tracking input
voltage filter
C4
R7
Dc decoupling capacitor
1µF
Bias Resistor for Stby/Mute
function
10KΩ
R8
R9
Stby/Mute constant time resistor
Mute resistor
30KΩ
30KΩ
2.2µF
C5
Capacitor for Stby/Mute resistor
Sensing resistor for SOA detector
R10 = R11
50mΩ
5% 4W
R12
Conversion resistor for threshold
voltage
100KΩ
C6 = C7
R15 = R16
C8 = C9
R13
Power supply filter capacitor
Centering resistor
100nF
400 Ω , 1W
680nF
Tracking rail power supply filter
Protection
1KΩ
R14
TRK_out
40KΩ
C10 = C11
C12
Power supply filter capacitor
Feedback capacitor
Schottky diode
470 µF , 63V
100pF
D1
SB360
Note: Vcontrol is the voltage at Att_Rel pin.
12/14
STA5150
mm
inch
TYP. MAX.
DIM.
MIN. TYP. MAX. MIN.
OUTLINE AND
MECHANICAL DATA
A
B
C
D
E
4.45
1.80
4.50
1.90
1.40
0.90
0.39
4.65 0.175 0.177 0.183
2.00 0.070 0.074 0.079
0.055
1.05 0.029 0.035 0.041
0.42 0.014 0.015 0.016
0.75
0.37
F (1)
G
0.57
0.022
0.80
1.00
1.20 0.031 0.040 0.047
G1
25.75 26.00 26.25 1.014 1.023 1.033
H (2) 28.90 29.23 29.30 1.139 1.150 1.153
H1
H2
H3
17.00
12.80
0.80
0.669
0.503
0.031
L (2) 22.07 22.47 22.87 0.869 0.884 0.904
L1 18.57 18.97 19.37 0.731 0.747 0.762
L2 (2) 15.50 15.70 15.90 0.610 0.618 0.626
L3
L4
L5
M
M1
N
7.70
7.85
5
3.5
4.00
4.00
2.20
2
7.95 0.303 0.309 0.313
0.197
0.138
3.70
3.60
4.30 0.145 0.157 0.169
4.40 0.142 0.157 0.173
0.086
0.079
O
R
1.70
0.5
0.3
1.25
0.50
0.067
0.02
0.12
0.049
R1
R2
R3
R4
V
V1
V2
V3
0.019
5˚ (Typ.)
3˚ (Typ.)
20˚ (Typ.)
45˚ (Typ.)
Flexiwatt27 (vertical)
(1): dam-bar protusion not included
(2): molding protusion included
V
C
B
V
H
H1
V3
A
H2
R3
H3
R4
V1
R2
N
R
L
L1
V1
V2
D
R2
R1
R1
M
R1
E
L5
Pin 1
G
F
G1
FLEX27ME
M1
7139011
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STA5150
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of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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