STP9NK65ZFP [STMICROELECTRONICS]

N-CHANNEL 650V - 1ohm - 7A TO-220/TO-220FP Zener-Protected SuperMESH⑩Power MOSFET; N沟道650V - 1欧姆 - 7A TO- 220 / TO- 220FP齐纳保护SuperMESH⑩Power MOSFET
STP9NK65ZFP
型号: STP9NK65ZFP
厂家: ST    ST
描述:

N-CHANNEL 650V - 1ohm - 7A TO-220/TO-220FP Zener-Protected SuperMESH⑩Power MOSFET
N沟道650V - 1欧姆 - 7A TO- 220 / TO- 220FP齐纳保护SuperMESH⑩Power MOSFET

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STP9NK65Z  
STP9NK65ZFP  
N-CHANNEL 650V - 1- 7A TO-220/TO-220FP  
Zener-Protected SuperMESH™Power MOSFET  
TARGET DATA  
TYPE  
V
R
I
D
Pw  
DSS  
DS(on)  
STP9NK65Z  
STP9NK65ZFP  
650 V  
650 V  
< 1.2  
< 1.2 Ω  
7 A  
7 A  
110 W  
30 W  
TYPICAL R (on) = 1.0  
DS  
EXTREMELY HIGH dv/dt CAPABILITY  
IMPROVED ESD CAPABILITY  
100% AVALANCHE RATED  
GATE CHARGE MINIMIZED  
VERY LOW INTRINSIC CAPACITANCES  
VERY GOOD MANUFACTURING  
REPEATIBILITY  
3
3
2
2
1
1
TO-220  
TO-220FP  
DESCRIPTION  
The SuperMESH™ series is obtained through an  
extreme optimization of ST’s well established strip-  
based PowerMESH™ layout. In addition to pushing  
on-resistance significantly down, special care is tak-  
en to ensure a very good dv/dt capability for the  
most demanding applications. Such series comple-  
ments ST full range of high voltage MOSFETs in-  
cluding revolutionary MDmesh™ products.  
INTERNAL SCHEMATIC DIAGRAM  
APPLICATIONS  
HIGH CURRENT, HIGH SPEED SWITCHING  
IDEAL FOR OFF-LINE POWER SUPPLIES,  
ADAPTORS AND PFC  
ORDERING INFORMATION  
SALES TYPE  
MARKING  
P9NK65Z  
PACKAGE  
TO-220  
PACKAGING  
TUBE  
STP9NK65Z  
STP9NK65ZFP  
P9NK65ZFP  
TO-220FP  
TUBE  
July 2003  
1/7  
STP9NK65 - STP9NK65ZFP  
ABSOLUTE MAXIMUM RATINGS  
Symbol  
Parameter  
Value  
Unit  
STP9NK65Z  
STP9NK65ZFP  
V
Drain-source Voltage (V = 0)  
650  
650  
± 30  
V
V
DS  
GS  
V
Drain-gate Voltage (R = 20 k)  
DGR  
GS  
V
Gate- source Voltage  
V
GS  
I
Drain Current (continuous) at T = 25°C  
7
7 (*)  
4.4 (*)  
28 (*)  
30  
A
D
C
I
Drain Current (continuous) at T = 100°C  
4.4  
28  
A
D
C
I
( )  
Drain Current (pulsed)  
A
DM  
P
Total Dissipation at T = 25°C  
110  
0.88  
W
TOT  
C
Derating Factor  
0.24  
W/°C  
KV  
V/ns  
V
V
Gate source ESD(HBM-C=100pF, R=1.5KΩ)  
Peak Diode Recovery voltage slope  
Insulation Withstand Voltage (DC)  
3500  
TBD  
ESD(G-S)  
dv/dt (1)  
V
ISO  
-
2500  
T
T
stg  
Operating Junction Temperature  
Storage Temperature  
-55 to 150  
-55 to 150  
°C  
°C  
j
( ) Pulse width limited by safe operating area  
(1) I TBD, di/dt TBD, V V , T T  
JMAX.  
SD  
DD  
(BR)DSS  
j
(*) Limited only by maximum temperature allowed  
THERMAL DATA  
TO-220  
TO-220FP  
Rthj-case  
Rthj-amb  
Thermal Resistance Junction-case Max  
1.14  
4.2  
°C/W  
°C/W  
°C  
Thermal Resistance Junction-ambient Max  
62.5  
300  
T
Maximum Lead Temperature For Soldering Purpose  
l
AVALANCHE CHARACTERISTICS  
Symbol  
Parameter  
Max Value  
Unit  
I
Avalanche Current, Repetitive or Not-Repetitive  
7
A
AR  
(pulse width limited by T max)  
j
E
Single Pulse Avalanche Energy  
TBD  
mJ  
AS  
(starting T = 25 °C, I = I , V = 50 V)  
j
D
AR  
DD  
GATE-SOURCE ZENER DIODE  
Symbol  
BV  
Parameter  
Test Conditions  
Igs=± 1mA (Open Drain)  
Min.  
Typ.  
Max.  
Unit  
Gate-Source Breakdown  
Voltage  
30  
V
GSO  
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES  
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s  
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be  
applied from gate to souce. In this respect the Zener voltage is appropriate to achieve an efficient and cost-  
effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the usage  
of external components.  
2/7  
STP9NK65 - STP9NK65ZFP  
ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED)  
ON/OFF  
Symbol  
Parameter  
Drain-source  
Test Conditions  
Min.  
Typ.  
Max.  
Unit  
V
I
= 1 mA, V = 0  
650  
V
(BR)DSS  
D
GS  
Breakdown Voltage  
I
Zero Gate Voltage  
V
V
= Max Rating  
= Max Rating, T = 125 °C  
1
50  
µA  
µA  
DSS  
DS  
DS  
Drain Current (V = 0)  
GS  
C
I
Gate-body Leakage  
V
= ± 20V  
±10  
µA  
GSS  
GS  
Current (V = 0)  
DS  
V
V
V
= V , I = 100µA  
Gate Threshold Voltage  
3
3.75  
1.0  
4.5  
1.2  
V
GS(th)  
DS  
GS  
GS  
D
R
Static Drain-source On  
Resistance  
= 10V, I = 3 A  
DS(on)  
D
DYNAMIC  
Symbol  
Parameter  
Test Conditions  
Min.  
Typ.  
Max.  
Unit  
g
(1)  
Forward Transconductance  
V
V
= 8 V I = 3 A  
TBD  
S
fs  
DS  
, D  
C
C
C
Input Capacitance  
Output Capacitance  
Reverse Transfer  
Capacitance  
V
= 25V, f = 1 MHz, V = 0  
TBD  
TBD  
TBD  
pF  
pF  
pF  
iss  
DS  
GS  
oss  
rss  
C
(3) Equivalent Output  
Capacitance  
= 0V, V = 0V to 480V  
TBD  
pF  
oss eq.  
GS  
DS  
SWITCHING ON  
Symbol  
Parameter  
Test Conditions  
Min.  
Typ.  
Max.  
Unit  
t
Turn-on Delay Time  
Rise Time  
V
R
= 325 V, I = 3 A  
= 4.7V = 10 V  
GS  
TBD  
TBD  
ns  
ns  
d(on)  
DD  
D
t
r
G
(Resistive Load see, Figure 3)  
Q
Q
Q
V
V
= 520V, I = 6 A,  
= 10V  
Total Gate Charge  
Gate-Source Charge  
Gate-Drain Charge  
TBD  
TBD  
TBD  
nC  
nC  
nC  
g
DD  
GS  
D
gs  
gd  
SWITCHING OFF  
Symbol  
Parameter  
Test Conditions  
Min.  
Typ.  
Max.  
Unit  
t
Turn-off Delay Time  
Fall Time  
V
= 325 V, I = 3 A  
TBD  
TBD  
ns  
ns  
d(off)  
DD  
D
t
f
R = 4.7V = 10 V  
G GS  
(Resistive Load see, Figure 3)  
t
V
R
= 520 V, I = 6 A,  
Off-voltage Rise Time  
Fall Time  
Cross-over Time  
TBD  
TBD  
TBD  
ns  
ns  
ns  
r(Voff)  
DD  
D
t
f
= 4.7Ω, V = 10V  
G
GS  
t
c
(Inductive Load see, Figure 5)  
SOURCE DRAIN DIODE  
Symbol  
Parameter  
Test Conditions  
Min.  
Typ.  
Max.  
Unit  
I
7
28  
A
A
Source-drain Current  
Source-drain Current (pulsed)  
SD  
(2)  
I
SDM  
V
(1)  
I
I
= 7 A, V = 0  
Forward On Voltage  
1.6  
V
SD  
SD  
SD  
GS  
t
= 6 A, di/dt = 100A/µs  
= 35V, T = 150°C  
Reverse Recovery Time  
Reverse Recovery Charge  
Reverse Recovery Current  
TBD  
TBD  
TBD  
ns  
µC  
A
rr  
Q
V
DD  
rr  
RRM  
j
I
(see test circuit, Figure 5)  
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.  
2. Pulse width limited by safe operating area.  
3. C  
is defined as a constant equivalent capacitance giving the same charging time as C  
when V increases from 0 to 80%  
oss DS  
oss eq.  
V
.
DSS  
3/7  
STP9NK65 - STP9NK65ZFP  
Fig. 1: Unclamped Inductive Load Test Circuit  
Fig. 2: Unclamped Inductive Waveform  
Fig. 3: Switching Times Test Circuit For  
Fig. 4: Gate Charge test Circuit  
Resistive Load  
Fig. 5: Test Circuit For Inductive Load Switching  
And Diode Recovery Times  
4/7  
STP9NK65 - STP9NK65ZFP  
TO-220 MECHANICAL DATA  
mm  
inch  
DIM.  
MIN.  
4.40  
1.23  
2.40  
TYP.  
MAX.  
4.60  
1.32  
2.72  
MIN.  
0.173  
0.048  
0.094  
TYP.  
MAX.  
0.181  
0.051  
0.107  
A
C
D
D1  
E
1.27  
0.050  
0.49  
0.61  
1.14  
1.14  
4.95  
2.4  
0.70  
0.88  
1.70  
1.70  
5.15  
2.7  
0.019  
0.024  
0.044  
0.044  
0.194  
0.094  
0.393  
0.027  
0.034  
0.067  
0.067  
0.203  
0.106  
0.409  
F
F1  
F2  
G
G1  
H2  
L2  
L4  
L5  
L6  
L7  
L9  
DIA.  
10.0  
10.40  
16.4  
0.645  
13.0  
2.65  
15.25  
6.2  
14.0  
2.95  
15.75  
6.6  
0.511  
0.104  
0.600  
0.244  
0.137  
0.147  
0.551  
0.116  
0.620  
0.260  
0.154  
0.151  
3.5  
3.93  
3.85  
3.75  
L2  
Dia.  
L5  
L9  
L7  
L6  
L4  
P011C  
5/7  
STP9NK65 - STP9NK65ZFP  
TO-220FP MECHANICAL DATA  
mm.  
inch  
TYP.  
DIM.  
MIN.  
TYP  
MAX.  
4.6  
2.7  
2.75  
0.7  
1
MIN.  
0.173  
0.098  
0.098  
0.017  
0.030  
0.045  
0.045  
0.195  
0.094  
0.393  
MAX.  
0.181  
0.106  
0.108  
0.027  
0.039  
0.067  
0.067  
0.204  
0.106  
0.409  
A
B
4.4  
2.5  
D
2.5  
E
0.45  
0.75  
1.15  
1.15  
4.95  
2.4  
F
F1  
F2  
G
1.5  
1.5  
5.2  
2.7  
10.4  
G1  
H
10  
L2  
L3  
L4  
L5  
L6  
L7  
Ø
16  
0.630  
28.6  
9.8  
2.9  
15.9  
9
30.6  
10.6  
3.6  
1.126  
.0385  
0.114  
0.626  
0.354  
0.118  
1.204  
0.417  
0.141  
0.645  
0.366  
0.126  
16.4  
9.3  
3
3.2  
L3  
L6  
L7  
1 2 3  
L4  
L5  
L2  
6/7  
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the  
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from  
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications  
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information  
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or  
systems without express written approval of STMicroelectronics.  
© The ST logo is a registered trademark of STMicroelectronics  
© 2003 STMicroelectronics - Printed in Italy - All Rights Reserved  
STMicroelectronics GROUP OF COMPANIES  
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© http://www.st.com  

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