CC2640R2FTWRGZTQ1 [TI]
符合汽车标准的 SimpleLink™ 32 位 Arm Cortex-M3 低功耗 Bluetooth® 无线 MCU | RGZ | 48 | -40 to 105;型号: | CC2640R2FTWRGZTQ1 |
厂家: | TEXAS INSTRUMENTS |
描述: | 符合汽车标准的 SimpleLink™ 32 位 Arm Cortex-M3 低功耗 Bluetooth® 无线 MCU | RGZ | 48 | -40 to 105 无线 |
文件: | 总47页 (文件大小:1814K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
CC2640R2F-Q1
ZHCSGW5B –JANUARY 2017 –REVISED OCTOBER 2020
CC2640R2F-Q1 适用于汽车应用的SimpleLink™ 低功耗Bluetooth ® 无线MCU
– 集成温度传感器
1 特性
• 外部系统
– 片上内部直流/直流转换器
– 极少的外部组件
• 符合汽车应用要求
• 具有符合AEC-Q100 标准的下列特性:
– 与SimpleLink™ CC2590 和CC2592 范围扩展
– 器件温度等级2:-40°C 至+105°C 环境工作温
度范围
器无缝集成
• 低功耗
– 器件人体模型(HBM) 静电放电(ESD) 分类等级
2
– 器件CDM ESD 分类等级C3
• 微控制器
– 宽电源电压范围:1.8 至3.8 V
– 有源模式RX:6.1 mA
– 有源模式TX (0dBm):7.0 mA
– 有源模式TX (+5dBm):9.3 mA
– 有源模式MCU:61µA/MHz
– 有源模式MCU:48.5CoreMark/mA
– 有源模式传感器控制器:
– 功能强大的Arm® Cortex®-M3
– EEMBC CoreMark® 评分:142
– 高达48MHz 的时钟速度
– 275KB 非易失性存储器,包括128KB 系统内可
编程闪存
0.4 mA + 8.2µA/MHz
– 待机:1.3μA(RTC 运行,RAM/CPU 保持)
– 关断:150nA(发生外部事件时唤醒)
• 射频(RF) 部分
– 高达28KB 系统SRAM,其中20KB 为超低泄漏
SRAM
– 8KB SRAM 作为缓存或系统RAM 用途
– 2 引脚cJTAG 和JTAG 调试
– 支持无线(OTA) 升级
– 与低功耗蓝牙(BLE) 4.2 和5 规范兼容的
2.4GHz 射频收发器
• 超低功耗传感器控制器
– 出色的接收器灵敏度(对于低功耗蓝牙1Mbps
为–97dBm)、可选择性和阻断性能
– 高达+5dBm 的可编程输出功率
– 对于低功耗蓝牙1Mbps,链路预算为102dB
– 适用于符合各项全球射频规范的系统
• ETSI EN 300 328 和EN 300 440(欧洲)
• FCC CFR47 第15 部分(美国)
• ARIB STD-T66(日本)
– 可独立于系统其余部分自主运行
– 16 位架构
– 20KB 超低泄漏电流代码和数据SRAM
• 高效代码大小架构,在ROM 中装载驱动程序、低
功耗Bluetooth® 控制器和引导加载程序,让更多闪
存供应用使用
• 符合RoHS 标准的汽车级封装
– 具有可湿性侧面的7mm × 7mm RGZ VQFN48
封装
• 外设
• 开发工具和软件
– 全功能开发套件
– Sensor Controller Studio
– 31 个GPIO,所有数字外设引脚均可连接至任何
GPIO
– 四个通用计时器模块
(8 个16 位计时器或4 个32 位计时器,均采
用PWM)
– SmartRF™ Studio
– IAR Embedded Workbench® for Arm®
– Code Composer Studio™ 集成式开发环境(IDE)
– Code Composer Studio™ Cloud IDE
2 应用
– 12 位ADC、200ksps、8 通道模拟多路复用器
– 持续时间比较器
– 超低功耗模拟比较器
– 可编程电流源
• 汽车
– 汽车门禁和安全系统
• 无钥匙进入及启动(PEPS) 系统
• 手机即钥匙(PaaK)
• 遥控免钥匙进入(RKE)
• 工业
– UART
– 2 个同步串行接口(SSI)(SPI、MICROWIRE
和TI)
– I2C、I2S
– 工厂自动化
– 实时时钟(RTC)
– 资产跟踪和管理
– 人机界面(HMI)
– 门禁
– AES-128 安全模块
– 真随机数发生器(TRNG)
– 支持8 个电容式感应按钮
本文档旨在为方便起见,提供有关TI 产品中文版本的信息,以确认产品的概要。有关适用的官方英文版本的最新信息,请访问
www.ti.com,其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前,请务必参考最新版本的英文版本。
English Data Sheet: SWRS201
CC2640R2F-Q1
ZHCSGW5B –JANUARY 2017 –REVISED OCTOBER 2020
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3 说明
SimpleLink™ 低功耗 Bluetooth ® CC2640R2F-Q1 器件是一款符合 AEC-Q100 标准的无线微控制器 (MCU),面
®
®
向低功耗 Bluetooth 4.2 和 Bluetooth 5 汽车应用,例如无钥匙进入/启动系统 (PEPS)、遥控免钥匙进入
(RKE)、汽车共享、泊车引导、电缆更换和智能手机连接。
CC2640R2F-Q1 器件属于德州仪器 (TI)™ 的 SimpleLink™ MCU 平台系列。该平台包含 Wi-Fi®、低功耗
Bluetooth ®、Sub-1GHz、以太网、Zigbee®、Thread 和主机 MCU。所有这些器件均共用一个简单易用的通用开
发环境,其中包含单个核心软件开发套件(SDK) 和丰富的工具集。借助一次性集成的 SimpleLink™ 平台,用户可
以将产品系列中的任何器件组合添加到自己的设计中,从而在设计要求变更时实现 100% 代码重用。更多信息,
请访问http://www.ti.com/wireless-connectivity/simplelink-solutions/overview/overview.html。
CC2640R2F-Q1 的有源射频和 MCU 电流消耗非常低,并且具有灵活的低功耗模式,可提供出色的电池寿命,使
连接到汽车电池的节点依靠小型纽扣电池实现远距离操作并具有低功耗。出色的接收器灵敏度和可编程输出功
率,为严苛的汽车射频环境提供其所需的出色射频性能。
CC2640R2F-Q1 无线 MCU 包含一个作为主应用处理器以 48MHz 速率运行的 32 位 Arm® Cortex®-M3 处理器,
并包含嵌入于 ROM 中的低功耗 Bluetooth ® 4.2 控制器库和主机库。此架构可改善整体系统性能和功耗,并释放
大量闪存以供应用使用。
此外,该器件通过了 AEC-Q100 认证,达到 2 级温度范围(–40°C 至 +105°C),并采用具有可湿性侧面的
7mm × 7mm VQFN 封装。可湿性侧面有助于降低生产线成本,并通过光学检查焊点的方式提高可靠性。
可从ti.com 免费获取低功耗蓝牙软件栈。
器件信息(1)
封装尺寸(标称值)
器件型号
CC2640R2FTWRGZQ1
封装
7.00mm × 7.00mm
具有可湿性侧面的VQFN (48) 封装
(1) 如需了解更多信息,请参阅机械、封装和可订购信息。
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4 功能方框图
图4-1 显示了CC2640R2F-Q1 器件的方框图。
AEC-Q100 Automotive Grade
SimpleLink CC2640R2F-Q1 Wireless MCU
RF Core
cJTAG
Main CPU
ROM
ADC
ADC
ARM
128-KB
Flash
Cortex-M3
Digital PLL
DSP Modem
4-KB
8-KB
Cache
ARM
SRAM
20-KB
SRAM
Cortex-M0
ROM
General Peripherals / Modules
Sensor Controller
I2C
4× 32-bit Timers
Sensor Controller
Engine
UART
I2S
2× SSI (SPI, µW, TI)
Watchdog Timer
12-bit ADC, 200 ks/s
2× Comparator
31 GPIOs
AES
TRNG
SPI-I2C Digital Sensor IF
Constant Current Source
Time-to-Digital Converter
2-KB SRAM
Temp. / Batt. Monitor
32 ch. µDMA
RTC
DC/DC Converter
图4-1. 方框图
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Table of Contents
8.20 Thermal Resistance Characteristics for RGZ
1 特性................................................................................... 1
2 应用................................................................................... 1
3 说明................................................................................... 2
4 功能方框图.........................................................................3
5 Revision History.............................................................. 4
6 Device Comparison.........................................................5
6.1 Related Products........................................................ 6
7 Terminal Configuration and Functions..........................7
7.1 Pin Diagram –RGZ Package....................................7
7.2 Signal Descriptions –RGZ Package.........................8
7.3 Wettable Flanks.......................................................... 9
8 Specifications................................................................ 10
8.1 Absolute Maximum Ratings...................................... 10
8.2 ESD Ratings............................................................. 10
8.3 Recommended Operating Conditions.......................10
8.4 Power Consumption Summary................................. 11
8.5 General Characteristics.............................................11
8.6 1-Mbps GFSK (Bluetooth low energy
Package...................................................................... 20
8.21 Timing Requirements..............................................21
8.22 Switching Characteristics........................................21
8.23 Typical Characteristics............................................22
9 Detailed Description......................................................26
9.1 Overview...................................................................26
9.2 Main CPU..................................................................26
9.3 RF Core.................................................................... 26
9.4 Sensor Controller......................................................27
9.5 Memory.....................................................................28
9.6 Debug....................................................................... 28
9.7 Power Management..................................................29
9.8 Clock Systems.......................................................... 30
9.9 General Peripherals and Modules............................ 30
9.10 System Architecture................................................31
10 Application, Implementation, and Layout................. 32
10.1 Application Information........................................... 32
10.2 7 × 7 Internal Differential (7ID) Application Circuit..34
11 Device and Documentation Support..........................36
11.1 Device Nomenclature..............................................36
11.2 Tools and Software..................................................37
11.3 Documentation Support.......................................... 38
11.4 Texas Instruments Low-Power RF Website............ 38
11.5 Support Resources................................................. 38
11.6 Trademarks............................................................. 38
11.7 Electrostatic Discharge Caution..............................38
11.8 Export Control Notice..............................................38
11.9 Glossary..................................................................38
12 Mechanical, Packaging, and Orderable
Technology) –RX...................................................... 12
8.7 1-Mbps GFSK (Bluetooth low energy
Technology) –TX.......................................................13
8.8 24-MHz Crystal Oscillator (XOSC_HF).....................13
8.9 32.768-kHz Crystal Oscillator (XOSC_LF)................13
8.10 48-MHz RC Oscillator (RCOSC_HF)......................14
8.11 32-kHz RC Oscillator (RCOSC_LF)........................ 14
8.12 ADC Characteristics................................................14
8.13 Temperature Sensor............................................... 15
8.14 Battery Monitor........................................................15
8.15 Continuous Time Comparator.................................15
8.16 Low-Power Clocked Comparator............................17
8.17 Programmable Current Source...............................17
8.18 Synchronous Serial Interface (SSI).........................17
8.19 DC Characteristics..................................................19
Information.................................................................... 39
12.1 Packaging Information............................................ 39
5 Revision History
Changes from Revision A (August 2017) to Revision B (October 2020)
Page
• 更新了整个文档中的章节、表格、图和交叉参考的编号..................................................................................... 1
• 更改了节1 中的开发工具和软件......................................................................................................................... 1
• 更改了节2 ......................................................................................................................................................... 1
• 更改了节3 ......................................................................................................................................................... 2
• Added note to 节8.1 about injection current and associated this note with the "Voltage on any digital pin"
specification......................................................................................................................................................10
• Removed the flash write time specification's association with note 2 in 节8.5 ................................................11
• Added "Zero cycles" as the test condition for flash page/sector erase time in 节8.5 ......................................11
• Added new flash page/sector erase time at 30 000 cycles in 节8.5 ................................................................11
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6 Device Comparison
表6-1. Device Family Overview
FLASH
(KB)
RAM
(KB)
DEVICE
PHY SUPPORT
GPIO
31
PACKAGE(1)
Bluetooth low energy (Normal, High
Speed, Long Range, Automotive)
CC2640R2F-Q1(2)
CC2640R2Fxxx(2)
128
128
20
20
RGZ (Wettable Flanks)
RGZ, RHB, YFV, RSM
Bluetooth low energy (Normal, High
Speed, Long Range)
31, 15, 14, 10
CC2650F128xxx
CC2640F128xxx
CC2630F128xxx
CC2620F128xxx
Multi-Protocol(3)
128
128
128
128
20
20
20
20
31, 15, 10
31, 15, 10
31, 15, 10
31, 10
RGZ, RHB, RSM
RGZ, RHB, RSM
RGZ, RHB, RSM
RGZ, RSM
Bluetooth low energy (Normal)
IEEE 802.15.4 (Zigbee/6LoWPAN)
IEEE 802.15.4 (RF4CE)
(1) Package designator replaces the xxx in device name to form a complete device name, RGZ is 7-mm × 7-mm VQFN48, RHB is 5-mm ×
5-mm VQFN32, RSM is 4-mm × 4-mm VQFN32, and YFV is 2.7-mm × 2.7-mm DSBGA.
(2) CC2640R2F-xxx devices contain Bluetooth 4.2 Host and Controller libraries in ROM, leaving more of the 128KB of flash available for
the customer application when used with supported BLE-Stack software protocol stack releases. Actual use of ROM and flash by
the protocol stack may vary depending on device software configuration. See Bluetooth low energy Stack for more details.
(3) The CC2650 device supports all PHYs and can be reflashed to run all the supported standards.
表6-2. Typical(1) Flash Memory Available for Customer Applications
Device
Simple BLE Peripheral (BT 4.0)(2)
Simple BLE Peripheral (BT 4.2)(2) (3)
CC2640R2Fxxx, CC2640R2F-Q1(4)
83 KB
41 KB
80 KB
31 KB
CC2640F128xxx, CC2650F128xxx
(1) Actual use of ROM and flash by the protocol stack will vary depending on device software configuration. The values in this table are
provided as guidance only.
(2) Application example with two services (GAP and Simple Profile). Compiled using IAR.
(3) BT4.2 configuration including Secure Pairing, Privacy 1.2, and Data Length Extension
(4) Bluetooth low energy applications running on the CC2640R2F-Q1 device make use of up to 115 KB of system ROM and up to 32 KB
of RF Core ROM in order to minimize the flash usage. The maximum amount of nonvolatile memory available for Bluetooth low energy
applications on the CC2640R2F-Q1 device is thus 275 KB (128-KB flash + 147-KB ROM).
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6.1 Related Products
Wireless Connectivity
The wireless connectivity portfolio offers a wide selection of low power RF solutions
suitable for a broad range of applications. The offerings range from fully customized
solutions to turn key offerings with pre-certified hardware and software (protocol).
TI's SimpleLink™ Sub-1 Long-range, low-power wireless connectivity solutions are offered in a wide range of
GHz Wireless MCUs
Sub-1 GHz ISM bands.
Design & development
Review design and development resources that are available for this product.
SimpleLink™ CC2640R2 The CC2640R2 LaunchPad™ development kit brings easy Bluetooth low energy
Wireless MCU
LaunchPad™
Development Kit
(BLE) connection to the LaunchPad ecosystem with the SimpleLink ultra-low power
CC26xx family of devices. Compared to the CC2650 LaunchPad kit, the CC2640R2
LaunchPad kit provides the following:
• More free flash memory for the user application in the CC2640R2 wireless MCU
• Out-of-the-box support for Bluetooth 4.2 specification
• 4× faster over-the-air download speed compared to Bluetooth 4.1
SimpleLink™ Bluetooth
The SensorTag IoT kit invites you to realize your cloud-connected product idea. The
low energy/Multistandard SensorTag includes 10 low-power MEMS sensors in a tiny red package, and it is
SensorTag
expandable with DevPacks to make it easy to add your own sensors or actuators.
Reference Designs for
CC2640
TI Reference Design Library is a robust reference design library spanning analog,
embedded processor and connectivity. Created by TI experts to help you jump-start
your system design, all TI Designs include schematic or block diagrams, BOMs and
design files to speed your time to market. Search and download designs at ti.com/
tidesigns.
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7 Terminal Configuration and Functions
7.1 Pin Diagram –RGZ Package
DIO_24 37
DIO_25 38
DIO_26 39
DIO_27 40
DIO_28 41
DIO_29 42
DIO_30 43
VDDS 44
24 JTAG_TMSC
23 DCOUPL
22 VDDS3
21 DIO_15
20 DIO_14
19 DIO_13
18 DIO_12
17 DIO_11
16 DIO_10
15 DIO_9
VDDR 45
X24M_N 46
X24M_P 47
VDDR_RF 48
14 DIO_8
13 VDDS2
The following I/O pins marked in bold have high-drive capabilities:
•
•
•
•
•
•
Pin 10: DIO_5
Pin 11: DIO_6
Pin 12: DIO_7
Pin 24: JTAG_TMSC
Pin 26: DIO_16
Pin 27: DIO_17
The following I/O pins marked in italics have analog capabilities:
•
•
•
•
•
•
•
•
Pin 36: DIO_23
Pin 37: DIO_24
Pin 38: DIO_25
Pin 39: DIO_26
Pin 40: DIO_27
Pin 41: DIO_28
Pin 42: DIO_29
Pin 43: DIO_30
图7-1. 48-Pin RGZ Package With Wettable Flanks, 7-mm × 7-mm Pinout, 0.5-mm Pitch (Top View)
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7.2 Signal Descriptions –RGZ Package
表7-1. Signal Descriptions –RGZ Package
NAME
NO.
33
23
5
TYPE
DESCRIPTION
DCDC_SW
DCOUPL
DIO_0
Power
Output from internal DC/DC(1)
Power
1.27-V regulated digital-supply decoupling capacitor(2)
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
GPIO, Sensor Controller
DIO_1
6
GPIO, Sensor Controller
DIO_2
7
GPIO, Sensor Controller
DIO_3
8
GPIO, Sensor Controller
DIO_4
9
GPIO, Sensor Controller
DIO_5
10
11
12
14
15
16
17
18
19
20
21
26
27
28
29
30
31
32
36
37
38
39
40
41
42
43
24
25
35
GPIO, Sensor Controller, high-drive capability
DIO_6
GPIO, Sensor Controller, high-drive capability
DIO_7
GPIO, Sensor Controller, high-drive capability
DIO_8
GPIO
DIO_9
GPIO
DIO_10
DIO_11
DIO_12
DIO_13
DIO_14
DIO_15
DIO_16
DIO_17
DIO_18
DIO_19
DIO_20
DIO_21
DIO_22
DIO_23
DIO_24
DIO_25
DIO_26
DIO_27
DIO_28
DIO_29
DIO_30
JTAG_TMSC
JTAG_TCKC
RESET_N
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO, JTAG_TDO, high-drive capability
GPIO, JTAG_TDI, high-drive capability
GPIO
GPIO
GPIO
GPIO
GPIO
Digital/Analog I/O GPIO, Sensor Controller, Analog
Digital/Analog I/O GPIO, Sensor Controller, Analog
Digital/Analog I/O GPIO, Sensor Controller, Analog
Digital/Analog I/O GPIO, Sensor Controller, Analog
Digital/Analog I/O GPIO, Sensor Controller, Analog
Digital/Analog I/O GPIO, Sensor Controller, Analog
Digital/Analog I/O GPIO, Sensor Controller, Analog
Digital/Analog I/O GPIO, Sensor Controller, Analog
Digital I/O
Digital I/O
Digital input
JTAG TMSC, high-drive capability
JTAG TCKC
Reset, active-low. No internal pullup.
Positive RF input signal to LNA during RX
Positive RF output signal to PA during TX
RF_P
RF_N
1
2
RF I/O
RF I/O
Negative RF input signal to LNA during RX
Negative RF output signal to PA during TX
VDDR
45
48
Power
Power
Connect to output of internal DC/DC(2) (3)
Connect to output of internal DC/DC(2) (4)
VDDR_RF
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表7-1. Signal Descriptions –RGZ Package (continued)
NAME
NO.
44
13
22
34
3
TYPE
DESCRIPTION
1.8-V to 3.8-V main chip supply(1)
VDDS
Power
VDDS2
Power
1.8-V to 3.8-V DIO supply(1)
1.8-V to 3.8-V DIO supply(1)
1.8-V to 3.8-V DC/DC supply
32-kHz crystal oscillator pin 1
32-kHz crystal oscillator pin 2
24-MHz crystal oscillator pin 1
24-MHz crystal oscillator pin 2
Ground –Exposed Ground Pad
VDDS3
Power
VDDS_DCDC
X32K_Q1
X32K_Q2
X24M_N
X24M_P
EGP
Power
Analog I/O
Analog I/O
Analog I/O
Analog I/O
Power
4
46
47
(1) See the technical reference manual listed in 节11.3 for more details.
(2) Do not supply external circuitry from this pin.
(3) If internal DC/DC is not used, this pin is supplied internally from the main LDO.
(4) If internal DC/DC is not used, this pin must be connected to VDDR for supply from the main LDO.
7.3 Wettable Flanks
The automotive industry requires original equipment manufacturers (OEMs) to perform 100% automated visual
inspection (AVI) post-assembly to ensure that cars meet the current demands for safety and high reliability.
Standard quad-flat no-lead (VQFN) packages do not have solderable or exposed pins/terminals that are easily
viewed. It is therefore difficult to determine visually whether or not the package is successfully soldered onto the
printed circuit board (PCB). To resolve the issue of side-lead wetting of leadless packaging for automotive and
commercial component manufacturers, the wettable-flank process was developed. The wettable flanks on the
VQFN package provide a visual indicator of solderability and thereby lower the inspection time and
manufacturing costs.
The CC2640R2F-Q1 device is assembled using an automotive-grade VQFN package with wettable flanks.
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8 Specifications
8.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1) (2)
MIN
MAX UNIT
VDDR supplied by internal DC/DC regulator or
internal GLDO. VDDS_DCDC connected to VDDS
on PCB.
Supply voltage, VDDS(3)
4.1
V
–0.3
Voltage on any digital pin(4) (5)
VDDS + 0.3, max 4.1
V
V
–0.3
–0.3
–0.3
–0.3
–0.3
Voltage on crystal oscillator pins, X32K_Q1, X32K_Q2, X24M_N and X24M_P
Voltage scaling enabled
VDDR + 0.3, max 2.25
VDDS
1.49
Voltage on ADC input (Vin)
Voltage scaling disabled, internal reference
Voltage scaling disabled, VDDS as reference
V
VDDS / 2.9
5
Input RF level
Tstg
dBm
°C
Storage temperature
150
–40
(1) All voltage values are with respect to ground, unless otherwise noted.
(2) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(3) VDDS2 and VDDS3 need to be at the same potential as VDDS.
(4) Including analog-capable DIO.
(5) Injection current is not supported on any GPIO pin.
8.2 ESD Ratings
VALUE
±2000
±250
UNIT
Human Body Model (HBM), per AEC Q100-002(1) (2)
Charged Device Model (CDM), per AEC Q100-011(3)
All pins
VESD
Electrostatic discharge
XOCS pins 46, 47
All other pins
V
±500
(1) AEC Q100-002 indicates HBM stressing is done in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
(2) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(3) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
8.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
Ambient temperature
105
°C
V
–40
Operating supply voltage,
VDDS
For operation in battery-powered and 3.3-V systems
(internal DC/DC can be used to minimize power consumption)
1.8
3.8
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8.4 Power Consumption Summary
Measured on the TI CC2640Q1EM-7ID reference design with Tc = 25°C, VDDS = 3.0 V with internal DC/DC converter, unless
otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
100
150
1.3
MAX
UNIT
Reset. RESET_N pin asserted or VDDS below
power-on-reset (POR) threshold
nA
Shutdown. No clocks running, no retention
Standby. With RTC, CPU, RAM and (partial)
register retention. RCOSC_LF
Standby. With RTC, CPU, RAM and (partial)
register retention. XOSC_LF
1.5
3.4
Standby. With Cache, RTC, CPU, RAM and
(partial) register retention. RCOSC_LF
µA
Icore
Core current consumption
Standby. With Cache, RTC, CPU, RAM and
(partial) register retention. XOSC_LF
3.6
Idle. Supply Systems and RAM powered.
Active. Core running CoreMark
Radio RX
650
1.45 mA + 31 µA/MHz
6.1
7.0
9.3
Radio TX, 0-dBm output power
Radio TX, 5-dBm output power
mA
Peripheral Current Consumption (Adds to core current Icore for each peripheral unit activated)(1)
Peripheral power domain
Serial power domain
Delta current with domain enabled
Delta current with domain enabled
20
13
µA
µA
Delta current with power domain enabled, clock
enabled, RF core idle
RF Core
237
µA
µDMA
Timers
I2C
Delta current with clock enabled, module idle
Delta current with clock enabled, module idle
Delta current with clock enabled, module idle
Delta current with clock enabled, module idle
Delta current with clock enabled, module idle
Delta current with clock enabled, module idle
130
113
12
µA
µA
µA
µA
µA
µA
Iperi
I2S
36
SSI
93
UART
164
(1) Iperi is not supported in Standby or Shutdown.
8.5 General Characteristics
Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
FLASH MEMORY
Supported flash erase cycles before
failure
100
k Cycles
Maximum number of write operations
per row before erase(1)
write
operations
83
Years at
105°C
Flash retention
105°C
11.4
Flash page/sector erase current
Flash page/sector size
Average delta current
12.6
4
mA
KB
ms
ms
mA
Flash page/sector erase time(2)
Flash page/sector erase time (2)
Flash write current
Zero cycles
8
4000
30 000 cycles
Average delta current, 4 bytes at a time
8.15
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8.5 General Characteristics (continued)
Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Flash write time
4 bytes at a time
8
µs
(1) Each row is 2048 bits (or 256 bytes) wide.
(2) This number is dependent on Flash aging and will increase over time and erase cycles.
8.6 1-Mbps GFSK (Bluetooth low energy Technology) –RX
Measured on the TI CC2640Q1EM-7ID reference design with Tc = 25°C, VDDS = 3.0 V, fRF = 2440 MHz, unless otherwise
noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
Differential mode. Measured at the CC2640Q1EM-7ID SMA
connector, BER = 10–3
Receiver sensitivity
dBm
–97
Differential mode. Measured at the CC2640Q1EM-7ID SMA
connector, BER = 10–3
Receiver saturation
4
dBm
Difference between the incoming carrier frequency and the
internally generated carrier frequency
Frequency error tolerance
Data rate error tolerance
Co-channel rejection(3)
Selectivity, ±1 MHz(3)
350
750
kHz
ppm
dB
–350
–750
Difference between incoming data rate and the internally
generated data rate
Wanted signal at –67 dBm, modulated interferer in channel,
–6
7 / 2(1)
BER = 10–3
Wanted signal at –67 dBm, modulated interferer at ±1 MHz,
dB
BER = 10–3
Wanted signal at –67 dBm, modulated interferer at ±2 MHz,
Image frequency is at –2 MHz, BER = 10–3
Selectivity, ±2 MHz(3)
39 / 17(2) (1)
38 / 30(1)
42 / 36(1)
32
dB
dB
dB
dB
dB
dB
Wanted signal at –67 dBm, modulated interferer at ±3 MHz,
Selectivity, ±3 MHz(3)
BER = 10–3
Wanted signal at –67 dBm, modulated interferer at ±4 MHz,
Selectivity, ±4 MHz(3)
BER = 10–3
Wanted signal at –67 dBm, modulated interferer at ≥±5
Selectivity, ±5 MHz or more(3)
Selectivity, Image frequency(3)
MHz, BER = 10–3
Wanted signal at –67 dBm, modulated interferer at image
17
frequency, BER = 10–3
Selectivity, Image frequency
±1 MHz(3)
Wanted signal at –67 dBm, modulated interferer at ±1 MHz
2 / 30(1)
from image frequency, BER = 10–3
Out-of-band blocking (4)
Out-of-band blocking
Out-of-band blocking
Out-of-band blocking
30 MHz to 2000 MHz
2003 MHz to 2399 MHz
2484 MHz to 2997 MHz
3000 MHz to 12.75 GHz
dBm
dBm
dBm
dBm
–20
–5
–8
–8
Wanted signal at 2402 MHz, –64 dBm. Two interferers at
2405 and 2408 MHz respectively, at the given power level
Intermodulation
dBm
dBm
–34
–65
Conducted measurement in a 50-Ωsingle-ended load.
Suitable for systems targeting compliance with EN 300 328,
EN 300 440, FCC CFR47, Part 15 and ARIB STD-T-66
Spurious emissions,
30 MHz to 1000 MHz
Conducted measurement in a 50-Ωsingle-ended load.
Suitable for systems targeting compliance with EN 300 328,
EN 300 440, FCC CFR47, Part 15 and ARIB STD-T-66
Spurious emissions,
1 GHz to 12.75 GHz
dBm
–52
RSSI dynamic range
RSSI accuracy
70
±4
dB
dB
(1) X / Y, where X is +N MHz and Y is –N MHz.
(2) +2MHz selectivity is reduced to 33dB when using radio FW supporting 2Mbps and Coded PHYs
(3) Numbers given as I/C dB.
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(4) Excluding one exception at Fwanted / 2, per Bluetooth Specification.
8.7 1-Mbps GFSK (Bluetooth low energy Technology) –TX
Measured on the TI CC2640Q1EM-7ID reference design with Tc = 25°C, VDDS = 3.0 V, fRF = 2440 MHz, unless otherwise
noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
Differential mode, delivered to a single-ended 50-Ωload
through a balun
Output power, highest setting
Output power, lowest setting
5
dBm
dBm
dBm
dBm
dBm
dBm
Delivered to a single-ended 50-Ωload through a balun
f < 1 GHz, outside restricted bands
f < 1 GHz, restricted bands ETSI
–21
–44
–62
–62
–55
Spurious emission conducted
measurement(1)
f < 1 GHz, restricted bands FCC
f > 1 GHz, including harmonics
(1) Suitable for systems targeting compliance with worldwide radio-frequency regulations ETSI EN 300 328 and EN 300 440 (Europe),
FCC CFR47 Part 15 (US), and ARIB STD-T66 (Japan).
8.8 24-MHz Crystal Oscillator (XOSC_HF)
Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.(1)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
60
UNIT
Ω
ESR Equivalent series resistance(2)
ESR Equivalent series resistance(2)
20
6 pF < CL ≤9 pF
80
5 pF < CL ≤6 pF
Ω
Relates to load capacitance
(CL in Farads)
LM Motional inductance(2)
< 1.6 × 10–24 / CL
H
2
CL Crystal load capacitance(2)
Crystal frequency(2) (3)
5
9
pF
MHz
ppm
µs
24
Crystal frequency tolerance(2) (4)
Start-up time(3) (5)
40
–40
150
(1) Probing or otherwise stopping the crystal while the DC/DC converter is enabled may cause permanent damage to the device.
(2) The crystal manufacturer's specification must satisfy this requirement
(3) Measured on the TI CC2640Q1EM-7ID reference design with Tc = 25°C, VDDS = 3.0 V
(4) Includes initial tolerance of the crystal, drift over temperature, ageing and frequency pulling due to incorrect load capacitance, as per
Bluetooth specification.
(5) Kick-started based on a temperature and aging compensated RCOSC_HF using precharge injection.
8.9 32.768-kHz Crystal Oscillator (XOSC_LF)
Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.
PARAMETER
Crystal frequency(1)
TEST CONDITIONS
MIN
–500
6
TYP
MAX
UNIT
32.768
kHz
Crystal frequency tolerance, Bluetooth low-
energy applications(1) (2)
500
ppm
ESR Equivalent series resistance(1)
CL Crystal load capacitance(1)
30
100
12
kΩ
pF
(1) The crystal manufacturer's specification must satisfy this requirement.
(2) Includes initial tolerance of the crystal, drift over temperature, ageing and frequency pulling due to incorrect load capacitance, as per
Bluetooth specification.
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8.10 48-MHz RC Oscillator (RCOSC_HF)
Measured on the TI CC2640Q1EM-7ID reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Frequency
48
MHz
Uncalibrated frequency accuracy
Calibrated frequency accuracy(1)
Start-up time
±1%
±0.25%
5
µs
(1) Accuracy relative to the calibration source (XOSC_HF).
8.11 32-kHz RC Oscillator (RCOSC_LF)
Measured on the TI CC2640Q1EM-7ID reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.
PARAMETER
Calibrated frequency(1)
Temperature coefficient
TEST CONDITIONS
MIN
TYP
32.8
50
MAX
UNIT
kHz
ppm/°C
(1) The frequency accuracy of the real time clock (RTC) is not directly dependent on the frequency accuracy of the 32-kHz RC oscillator.
The RTC can be calibrated by measuring the frequency error of RCOSC_LF relative to XOSC_HF and compensating the RTC tick
speed.
8.12 ADC Characteristics
Tc = 25°C, VDDS = 3.0 V without internal DC/DC converter and with voltage scaling enabled, unless otherwise noted.(1)
PARAMETER
Input voltage range
Resolution
TEST CONDITIONS
MIN
TYP
MAX UNIT
0
VDDS
200
V
12
Bits
ksps
LSB
LSB
LSB
LSB
Sample rate
Offset
Internal 4.3-V equivalent reference(2)
Internal 4.3-V equivalent reference(2)
2
2.4
Gain error
DNL(3) Differential nonlinearity
>–1
±3
INL(4)
Integral nonlinearity
Internal 4.3-V equivalent reference(2), 200 ksps,
9.6-kHz input tone
9.8
10
ENOB Effective number of bits
VDDS as reference, 200 ksps, 9.6-kHz input tone
Bits
dB
dB
dB
Internal 1.44-V reference, voltage scaling disabled,
32 samples average, 200 ksps, 300-Hz input tone
11.1
Internal 4.3-V equivalent reference(2), 200 ksps,
9.6-kHz input tone
–65
–69
–71
THD
Total harmonic distortion VDDS as reference, 200 ksps, 9.6-kHz input tone
Internal 1.44-V reference, voltage scaling disabled,
32 samples average, 200 ksps, 300-Hz input tone
Internal 4.3-V equivalent reference(2), 200 ksps,
9.6-kHz input tone
60
63
69
Signal-to-noise
and
Distortion ratio
SINAD,
SNDR
VDDS as reference, 200 ksps, 9.6-kHz input tone
Internal 1.44-V reference, voltage scaling disabled,
32 samples average, 200 ksps, 300-Hz input tone
Internal 4.3-V equivalent reference(2), 200 ksps,
9.6-kHz input tone
67
72
73
Spurious-free dynamic
range
SFDR
VDDS as reference, 200 ksps, 9.6-kHz input tone
Internal 1.44-V reference, voltage scaling disabled,
32 samples average, 200 ksps, 300-Hz input tone
clock-
cycles
Conversion time
Serial conversion, time-to-output, 24-MHz clock
50
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Tc = 25°C, VDDS = 3.0 V without internal DC/DC converter and with voltage scaling enabled, unless otherwise noted.(1)
PARAMETER
TEST CONDITIONS
Internal 4.3-V equivalent reference(2)
VDDS as reference
MIN
TYP
0.66
0.75
MAX UNIT
Current consumption
Current consumption
mA
mA
Equivalent fixed internal reference (input voltage scaling
enabled). For best accuracy, the ADC conversion should
be initiated through the TI-RTOS API to include the gain/
offset compensation factors stored in FCFG1.
Reference voltage
4.3(2) (5)
V
Fixed internal reference (input-voltage scaling disabled).
For the best accuracy, the ADC conversion should be
initiated through the TI-RTOS API to include the gain/offset
compensation factors stored in FCFG1. This value is
derived from the scaled value (4.3 V) as follows.
Vref = 4.3 V × 1408 / 4095
Reference voltage
1.48
V
VDDS as reference (also known as RELATIVE) (input
voltage scaling enabled)
Reference voltage
Reference voltage
VDDS
V
V
VDDS as reference (also known as RELATIVE) (input
voltage scaling disabled)
VDDS /
2.82(5)
200 ksps, voltage scaling enabled. Capacitive input, input
impedance depends on sampling frequency and sampling
time
Input Impedance
>1
MΩ
(1) Using IEEE Std 1241™-2010 for terminology and test methods.
(2) Input signal scaled down internally before conversion, as if voltage range was 0 to 4.3 V.
(3) No missing codes. Positive DNL typically varies from +0.3 to +3.5, depending on device (see 图8-21).
(4) For a typical example, see 图8-22.
(5) Applied voltage must be within absolute maximum ratings at all times (see 节8.1).
8.13 Temperature Sensor
Measured on the TI CC2640Q1EM-7ID reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
°C
Resolution
Range
4
105
°C
–40
Accuracy
±5
°C
Supply voltage coefficient(1)
3.2
°C/V
(1) Automatically compensated when using supplied driver libraries.
8.14 Battery Monitor
Measured on the TI CC2640Q1EM-7ID reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
mV
V
Resolution
Range
50
1.8
3.8
Accuracy
13
mV
8.15 Continuous Time Comparator
Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
0
TYP
MAX
VDDS
VDDS
UNIT
V
Input voltage range
External reference voltage
0
V
Internal reference voltage
Offset
DCOUPL as reference
1.27
3
V
mV
mV
µs
Hysteresis
<2
Decision time
0.72
Step from –10 mV to 10 mV
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Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Current consumption when enabled(1)
8.6
µA
(1) Additionally, the bias module must be enabled when running in standby mode.
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8.16 Low-Power Clocked Comparator
Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Input voltage range
0
VDDS
V
Clock frequency
32
1.49–1.51
1.01–1.03
0.78–0.79
1.25–1.28
0.63–0.65
0.42–0.44
0.33–0.34
<2
kHz
Internal reference voltage, VDDS / 2
Internal reference voltage, VDDS / 3
Internal reference voltage, VDDS / 4
Internal reference voltage, DCOUPL / 1
Internal reference voltage, DCOUPL / 2
Internal reference voltage, DCOUPL / 3
Internal reference voltage, DCOUPL / 4
Offset
V
V
V
V
V
V
V
mV
Hysteresis
<5
mV
Decision time
<1
clock-cycle
nA
Step from –50 mV to 50 mV
Current consumption when enabled
362
8.17 Programmable Current Source
Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
µA
Current source programmable output range
Resolution
0.25–20
0.25
µA
Including current source at maximum
programmable output
Current consumption(1)
23
µA
(1) Additionally, the bias module must be enabled when running in standby mode.
8.18 Synchronous Serial Interface (SSI)
Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
system
clocks
S1(1) tclk_per (SSIClk period)
Device operating as SLAVE
12
65024
S2(1) tclk_high (SSIClk high time)
S3(1) tclk_low (SSIClk low time)
Device operating as SLAVE
Device operating as SLAVE
0.5
0.5
tclk_per
tclk_per
One-way communication to SLAVE:
Device operating as MASTER
system
clocks
S1 (TX only)(1) tclk_per (SSIClk period)
S1 (TX and RX)(1) tclk_per (SSIClk period)
4
8
65024
65024
Normal duplex operation:
Device operating as MASTER
system
clocks
S2(1) tclk_high (SSIClk high time)
S3(1) tclk_low(SSIClk low time)
Device operating as MASTER
Device operating as MASTER
0.5
0.5
tclk_per
tclk_per
(1) Refer to SSI timing diagrams 图8-1, 图8-2, and 图8-3.
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S1
S2
SSIClk
S3
SSIFss
SSITx
SSIRx
MSB
LSB
4 to 16 bits
图8-1. SSI Timing for TI Frame Format (FRF = 01), Single Transfer Timing Measurement
S2
S1
SSIClk
SSIFss
SSITx
SSIRx
S3
MSB
LSB
8-bit control
0
MSB
LSB
4 to 16 bits output data
图8-2. SSI Timing for MICROWIRE Frame Format (FRF = 10), Single Transfer
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S1
S2
SSIClk
(SPO = 0)
S3
SSIClk
(SPO = 1)
SSITx
(Master)
MSB
LSB
SSIRx
(Slave)
MSB
LSB
SSIFss
图8-3. SSI Timing for SPI Frame Format (FRF = 00), With SPH = 1
8.19 DC Characteristics
PARAMETER
TA = 25°C, VDDS = 1.8 V
GPIO VOH at 8-mA load
GPIO VOL at 8-mA load
GPIO VOH at 4-mA load
GPIO VOL at 4-mA load
GPIO pullup current
TEST CONDITIONS
MIN
1.32
1.32
TYP
MAX UNIT
IOCURR = 2, high-drive GPIOs only
IOCURR = 2, high-drive GPIOs only
IOCURR = 1
1.54
0.26
1.58
0.21
71.7
21.1
V
0.32
0.32
V
V
IOCURR = 1
V
Input mode, pullup enabled, V(pad) = 0 V
Input mode, pulldown enabled, V(pad) = VDDS
µA
µA
GPIO pulldown current
GPIO high/low input transition,
no hysteresis
IH = 0, transition between reading 0 and reading 1
0.88
1.07
V
V
GPIO low-to-high input transition,
with hysteresis
IH = 1, transition voltage for input read as 0 →1
GPIO high-to-low input transition,
with hysteresis
0.74
0.33
V
V
IH = 1, transition voltage for input read as 1 →0
IH = 1, difference between 0 →1 and 1 →0 points
GPIO input hysteresis
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MAX UNIT
PARAMETER
TEST CONDITIONS
MIN
TYP
TA = 25°C, VDDS = 3.0 V
GPIO VOH at 8-mA load
GPIO VOL at 8-mA load
GPIO VOH at 4-mA load
GPIO VOL at 4-mA load
TA = 25°C, VDDS = 3.8 V
GPIO pullup current
IOCURR = 2, high-drive GPIOs only
IOCURR = 2, high-drive GPIOs only
IOCURR = 1
2.68
0.33
2.72
0.28
V
V
V
V
IOCURR = 1
Input mode, pullup enabled, V(pad) = 0 V
277
113
µA
µA
GPIO pulldown current
Input mode, pulldown enabled, V(pad) = VDDS
GPIO high/low input transition,
no hysteresis
IH = 0, transition between reading 0 and reading 1
1.67
1.94
V
V
GPIO low-to-high input transition,
with hysteresis
IH = 1, transition voltage for input read as 0 →1
GPIO high-to-low input transition,
with hysteresis
1.54
0.4
V
V
IH = 1, transition voltage for input read as 1 →0
IH = 1, difference between 0 →1 and 1 →0 points
GPIO input hysteresis
TA = 25°C
Lowest GPIO input voltage reliably interpreted as a
«High»
V(IH)
V(IL)
0.8 VDDS(1)
VDDS(1)
Highest GPIO input voltage reliably interpreted as a
«Low»
0.2
(1) Each GPIO is referenced to a specific VDDS pin. See the technical reference manual listed in 节11.3 for more details.
8.20 Thermal Resistance Characteristics for RGZ Package
over operating free-air temperature range (unless otherwise noted)
NAME
DESCRIPTION
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
(°C/W)(1) (2)
29.6
15.7
6.2
RθJA
RθJC(top)
RθJB
PsiJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
0.3
PsiJB
6.2
1.9
RθJC(bot)
(1) °C/W = degrees Celsius per watt.
(2) These values are based on a JEDEC-defined 2S2P system (with the exception of the Theta JC [RθJC] value, which is based on a
JEDEC-defined 1S0P system) and will change based on environment as well as application. For more information, see the following
EIA/JEDEC standards:
•
•
•
•
JESD51-2, Integrated Circuits Thermal Test Method Environmental Conditions - Natural Convection (Still Air)
JESD51-3, Low Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages
JESD51-7, High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages
JESD51-9, Test Boards for Area Array Surface Mount Package Thermal Measurements
Power dissipation of 2 W and an ambient temperature of 70°C is assumed.
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8.21 Timing Requirements
MIN
0
NOM
MAX UNIT
100 mV/µs
20 mV/µs
Rising supply-voltage slew rate
Falling supply-voltage slew rate
0
Falling supply-voltage slew rate, with low-power flash settings(1)
3
mV/µs
No limitation for negative
temperature gradient, or
outside standby mode
Positive temperature gradient in standby(3)
5
°C/s
CONTROL INPUT AC CHARACTERISTICS(2)
RESET_N low duration
1
µs
(1) For smaller coin cell batteries, with high worst-case end-of-life equivalent source resistance, a 22-µF VDDS input capacitor (see 图
10-1) must be used to ensure compliance with this slew rate.
(2) TA = –40°C to +105°C, VDDS = 1.8 V to 3.8 V, unless otherwise noted.
(3) Applications using RCOSC_LF as sleep timer must also consider the drift in frequency caused by a change in temperature (see 节
8.11).
8.22 Switching Characteristics
Measured on the TI CC2640Q1EM-7ID reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
WAKEUP and TIMING
14
151
µs
µs
µs
Idle →Active
Standby →Active
Shutdown →Active
1015
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8.23 Typical Characteristics
-95
-95
-96
BLE 1-Mbps
-96
-97
-97
-98
-98
-99
-99
-100
-100
-40
-20
0
20 40
Temperature (°C)
60
80
100
1.8
2
2.2 2.4 2.6 2.8
3
Supply Voltage VDDS (V)
3.2 3.4 3.6 3.8
D001
D002
图8-4. Bluetooth low energy Sensitivity vs
图8-5. Bluetooth low energy Sensitivity vs Supply
Temperature
Voltage (VDDS)
-95
6
5
4
3
2
1
BLE 1-Mbps
-95.5
-96
-96.5
-97
-97.5
-98
-98.5
-99
-99.5
-100
+5 dBm settings
60 80 100
0
-40
2400 2410 2420 2430 2440 2450 2460 2470 2480
Channel Frequency (MHz)
-20
0
20 40
Temperature (°C)
D003
D004
图8-6. Bluetooth low energy Sensitivity vs
图8-7. TX Output Power vs Temperature
Channel Frequency
5.5
5
6
4.5
4
5
4
3
2
1
3.5
3
2.5
2
1.5
1
+5 dBm settings
+5 dBm setting
0.5
1.8
2
2.2 2.4 2.6 2.8 3
Supply Voltage VDDS (V)
3.2 3.4 3.6 3.8
2400 2410 2420 2430 2440 2450 2460 2470 2480
Channel Frequency (MHz)
D005
D006
图8-8. TX Output Power vs Supply Voltage (VDDS)
图8-9. TX Output Power vs Channel Frequency
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10.5
10
9.5
9
16
15
14
13
12
11
10
9
+5 dBm settings
0 dBm settings
8.5
8
7.5
7
6.5
6
8
5.5
5
7
6
4.5
1.8
5
1.8
2
2.2 2.4 2.6 2.8
3
Supply Voltage VDDS (V)
3.2 3.4 3.6 3.8
2
2.2 2.4 2.6 2.8
3
Supply Voltage VDDS (V)
3.2 3.4 3.6 3.8
D008
D007
图8-11. RX Mode Current vs Supply Voltage
图8-10. TX Current Consumption vs Supply
(VDDS)
Voltage (VDDS)
7
6.5
6
10
9
8
7
6
+5 dBm settings
0 dBm settings
5.5
-40
5
-40
-20
0
20 40
Temperature (°C)
60
80
100
-20
0
20 40
Temperature (°C)
60 80 100
D009
D010
图8-12. RX Mode Current Consumption vs
图8-13. TX Mode Current Consumption vs
Temperature
Temperature
5
4
3
2
3.2
3.1
3
2.9
2.8
2.7
1.8
2
2.2 2.4 2.6 2.8
3
Supply Voltage VDDS (V)
3.2 3.4 3.6 3.8
-40
-20
0
20 40
Temperature (°C)
60
80
100
D012
D011
图8-15. Active Mode (MCU Running, No
图8-14. Active Mode (MCU Running, No
Peripherals) Current Consumption vs Supply
Voltage (VDDS)
Peripherals) Current Consumption vs Temperature
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10
9
8
7
6
5
4
3
2
1
0
11.4
11.2
11
10.8
10.6
10.4
10.2
10
9.8
9.6
9.4
Fs = 200 kHz, No Averaging
Fs = 200 kHz, 32 Samples Averaging
9.2
9
500
1000
10000
Input Frequency (Hz)
100000
-40
-20
0
20 40
Temperature (°C)
60
80
100
D013
图8-17. SoC ADC Effective Number of Bits vs Input
图8-16. Standby Mode Current Consumption vs
Frequency (Internal Reference, No Scaling)
Temperature
1005
1004
1003
1002
1001
1005
1004
1003
1002
1001
1000
-40
-20
0
20
40
60
80
100
1.8
2.3
2.8
Supply Voltage VDDS (V)
3.3
3.8
Temperature (èC)
D016
D015
图8-19. SoC ADC Output vs Temperature (Fixed
图8-18. SoC ADC Output vs Supply Voltage (Fixed
Input, Internal Reference, No Scaling)
Input, Internal Reference, No Scaling)
11
10.9
10.8
10.7
10.6
10.5
ENOB Internal Reference (32 Samples Averaging)
ENOB Internal Reference (No Averaging)
10.4
10.3
10.2
10.1
10
9.9
9.8
1k
10k
Input Frequency (Hz)
100k 200k
D019
图8-20. SoC ADC ENOB vs Sampling Frequency (Input Frequency = FS / 10)
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1
0.8
0.6
0.4
0.2
0
-0.2
-0.4
-0.6
-0.8
-1
0
600
1200
1800
2400
3000
3600
4200
DD0101701
ADC CODE
图8-21. SoC ADC DNL vs ADC Code (Internal Reference, No Scaling)
1.5
1
0.5
0
-0.5
-1
-1.5
0
400
800
1200
1600
2000
ADC CODE
2400
2800
3200
3600
4000 4200
D018
图8-22. SoC ADC INL vs ADC Code (Internal Reference, No Scaling)
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9 Detailed Description
9.1 Overview
节4 shows the core modules of the CC26xx product family.
9.2 Main CPU
The automotive grade SimpleLink™ CC2640R2F-Q1 Wireless MCU contains an Arm® Cortex®-M3 (CM3) 32-bit
CPU, which runs the application and the higher layers of the protocol stack.
The Cortex®-M3 processor provides a high-performance, low-cost platform that meets the system requirements
of minimal memory implementation, and low-power consumption, while delivering outstanding computational
performance and exceptional system response to interrupts.
Cortex-M3 features include the following:
• 32-bit Arm® Cortex®-M3 architecture optimized for small-footprint embedded applications
• Outstanding processing performance combined with fast interrupt handling
• Arm Thumb®-2 mixed 16- and 32-bit instruction set delivers the high performance expected of a 32-bit Arm
core in a compact memory size usually associated with 8- and 16-bit devices, typically in the range of a few
kilobytes of memory for microcontroller-class applications:
– Single-cycle multiply instruction and hardware divide
– Atomic bit manipulation (bit-banding), delivering maximum memory use and streamlined peripheral control
– Unaligned data access, enabling data to be efficiently packed into memory
• Fast code execution permits slower processor clock or increases sleep mode time
• Harvard architecture characterized by separate buses for instruction and data
• Efficient processor core, system, and memories
• Hardware division and fast digital-signal-processing oriented multiply accumulate
• Saturating arithmetic for signal processing
• Deterministic, high-performance interrupt handling for time-critical applications
• Enhanced system debug with extensive breakpoint and trace capabilities
• Serial wire trace reduces the number of pins required for debugging and tracing
• Migration from the ARM7™ processor family for better performance and power efficiency
• Optimized for single-cycle flash memory use
• Ultra-low power consumption with integrated sleep modes
• 1.25 DMIPS per MHz
9.3 RF Core
The RF Core contains an Arm Cortex-M0 processor that interfaces the analog RF and base-band circuitries,
handles data to and from the system side, and assembles the information bits in a given packet structure. The
RF core offers a high level, command-based API to the main CPU.
The RF core is capable of autonomously handling the time-critical aspects of the radio protocols (Bluetooth ® low
energy) thus offloading the main CPU and leaving more resources for the user application.
The RF core has a dedicated 4-KB SRAM block and runs initially from separate ROM memory. The Arm Cortex-
M0 processor is not programmable by customers.
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9.4 Sensor Controller
The Sensor Controller contains circuitry that can be selectively enabled in standby mode. The peripherals in this
domain may be controlled by the Sensor Controller Engine, which is a proprietary power-optimized CPU. This
CPU can read and monitor sensors or perform other tasks autonomously, thereby significantly reducing power
consumption and offloading the main Cortex-M3 CPU.
The Sensor Controller is set up using a PC-based configuration tool, called Sensor Controller Studio, and
potential use cases may be (but are not limited to):
• Analog sensors using integrated ADC
• Digital sensors using GPIOs, bit-banged I2C, and SPI
• UART communication for sensor reading or debugging
• Capacitive sensing
• Waveform generation
• Pulse counting
• Keyboard scan
• Quadrature decoder for polling rotation sensors
• Oscillator calibration
备注
Texas Instruments provides application examples for some of these use cases, but not for all of them.
The peripherals in the Sensor Controller include the following:
• The low-power clocked comparator can be used to wake the device from any state in which the comparator is
active. A configurable internal reference can be used in conjunction with the comparator. The output of the
comparator can also be used to trigger an interrupt or the ADC.
• Capacitive sensing functionality is implemented through the use of a constant current source, a time-to-digital
converter, and a comparator. The continuous time comparator in this block can also be used as a higher-
accuracy alternative to the low-power clocked comparator. The Sensor Controller will take care of baseline
tracking, hysteresis, filtering and other related functions.
• The ADC is a 12-bit, 200-ksamples/s ADC with eight inputs and a built-in voltage reference. The ADC can be
triggered by many different sources, including timers, I/O pins, software, the analog comparator, and the
RTC.
• The Sensor Controller also includes a SPI–I2C digital interface.
• The analog modules can be connected to up to eight different GPIOs.
The peripherals in the Sensor Controller can also be controlled from the main application processor.
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表9-1. GPIOs Connected to the Sensor Controller(1)
7 × 7 RGZ
DIO NUMBER
ANALOG CAPABLE
Y
Y
Y
Y
Y
Y
Y
Y
N
N
N
N
N
N
N
N
30
29
28
27
26
25
24
23
7
6
5
4
3
2
1
0
(1) Up to 16 pins can be connected to the Sensor Controller. Up to 8 of these pins can be connected to
analog modules.
9.5 Memory
The flash memory provides nonvolatile storage for code and data. The flash memory is in-system
programmable.
The SRAM (static RAM) can be used for both storage of data and execution of code and is split into two 4-KB
blocks and two 6-KB blocks. Retention of the RAM contents in standby mode can be enabled or disabled
individually for each block to minimize power consumption. In addition, if flash cache is disabled, the 8-KB cache
can be used as a general-purpose RAM.
The ROM provides preprogrammed embedded TI-RTOS kernel, Driver Library, and lower layer protocol stack
®
software (Bluetooth low energy Controller). It also contains a bootloader that can be used to reprogram the
device using SPI or UART.
9.6 Debug
The on-chip debug support is done through a dedicated cJTAG (IEEE 1149.7) or JTAG (IEEE 1149.1) interface.
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9.7 Power Management
To minimize power consumption, the CC2640R2F-Q1 device supports a number of power modes and power
management features (see 表9-2).
表9-2. Power Modes
SOFTWARE CONFIGURABLE POWER MODES
RESET PIN
HELD
MODE
ACTIVE
IDLE
Off
STANDBY
Off
SHUTDOWN
CPU
Active
Off
Off
Off
Off
Flash
On
Available
On
Off
SRAM
On
Available
On
Off
Off
Radio
Available
On
Off
Off
Off
Supply System
Current
On
Duty Cycled
1.3 µA
151 µs
Partial
Full
Off
Off
1.45 mA + 31 µA/MHz
650 µA
14 µs
Full
0.15 µA
1015 µs
No
0.1 µA
1015 µs
No
Wake-up Time to CPU Active(1)
Register Retention
SRAM Retention
–
Full
Full
Full
No
No
XOSC_HF or
RCOSC_HF
XOSC_HF or
RCOSC_HF
High-Speed Clock
Low-Speed Clock
Off
Off
Off
Off
Off
XOSC_LF or
RCOSC_LF
XOSC_LF or
RCOSC_LF
XOSC_LF or
RCOSC_LF
Peripherals
Available
Available
Available
Available
Available
Active
Available
Available
Available
Available
Available
Active
Off
Off
Off
Off
Off
Sensor Controller
Available
Available
Available
Available
Duty Cycled
Active
Wake up on RTC
Off
Off
Wake up on Pin Edge
Wake up on Reset Pin
Brown Out Detector (BOD)
Power On Reset (POR)
Available
Available
Off
Off
Available
N/A
Active
Active
Active
N/A
(1) Not including RTOS overhead
In active mode, the application Cortex-M3 CPU is actively executing code. Active mode provides normal
operation of the processor and all of the peripherals that are currently enabled. The system clock can be any
available clock source (see 表9-2).
In idle mode, all active peripherals can be clocked, but the Application CPU core and memory are not clocked
and no code is executed. Any interrupt event will bring the processor back into active mode.
In standby mode, only the always-on domain (AON) is active. An external wake event, RTC event, or sensor-
controller event is required to bring the device back to active mode. MCU peripherals with retention do not need
to be reconfigured when waking up again, and the CPU continues execution from where it went into standby
mode. All GPIOs are latched in standby mode.
In shutdown mode, the device is turned off entirely, including the AON domain and the Sensor Controller. The
I/Os are latched with the value they had before entering shutdown mode. A change of state on any I/O pin
defined as a wake from Shutdown pin wakes up the device and functions as a reset trigger. The CPU can
differentiate between a reset in this way, a reset-by-reset pin, or a power-on-reset by reading the reset status
register. The only state retained in this mode is the latched I/O state and the Flash memory contents.
The Sensor Controller is an autonomous processor that can control the peripherals in the Sensor Controller
independently of the main CPU, which means that the main CPU does not have to wake up, for example, to
execute an ADC sample or poll a digital sensor over SPI. The main CPU saves both current and wake-up time
that would otherwise be wasted. The Sensor Controller Studio enables the user to configure the sensor
controller and choose which peripherals are controlled and which conditions wake up the main CPU.
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9.8 Clock Systems
The CC2640R2F-Q1 device supports two external and two internal clock sources.
A 24-MHz crystal is required as the frequency reference for the radio. This signal is doubled internally to create a
48-MHz clock.
The 32-kHz crystal is optional. Bluetooth ® low energy requires a slow-speed clock with better than
±500 ppm accuracy if the device is to enter any sleep mode while maintaining a connection. The internal
32-kHz RC oscillator can in some use cases be compensated to meet the requirements. The low-speed crystal
oscillator is designed for use with a 32-kHz watch-type crystal.
The internal high-speed oscillator (48-MHz) can be used as a clock source for the CPU subsystem.
The internal low-speed oscillator (32.768-kHz) can be used as a reference if the low-power crystal oscillator is
not used.
The 32-kHz clock source can be used as external clocking reference through GPIO.
9.9 General Peripherals and Modules
The I/O controller controls the digital I/O pins and contains multiplexer circuitry to allow a set of peripherals to be
assigned to I/O pins in a flexible manner. All digital I/Os are interrupt and wake-up capable, have a
programmable pullup and pulldown function and can generate an interrupt on a negative or positive edge
(configurable). When configured as an output, pins can function as either push-pull or open-drain. Five GPIOs
have high drive capabilities (marked in bold in 节7).
The SSIs are synchronous serial interfaces that are compatible with SPI, MICROWIRE, and synchronous serial
interfaces from Texas Instruments™. The SSIs support both SPI master and slave up to 4 MHz.
The UART implements a universal asynchronous receiver/transmitter function. It supports flexible baud-rate
generation up to a maximum of 3 Mbps and is compatible with the Bluetooth ® HCI specifications.
Timer 0 is a general-purpose timer module (GPTM), which provides two 16-bit timers. The GPTM can be
configured to operate as a single 32-bit timer, dual 16-bit timers or as a PWM module.
Timer 1, Timer 2, and Timer 3 are also GPTMs. Each of these timers is functionally equivalent to Timer 0.
In addition to these four timers, the RF core has its own timer to handle timing for RF protocols; the RF timer can
be synchronized to the RTC.
The I2C interface is used to communicate with devices compatible with the I2C standard. The I2C interface is
capable of 100-kHz and 400-kHz operation, and can serve as both I2C master and I2C slave.
The TRNG module provides a true, nondeterministic noise source for the purpose of generating keys,
initialization vectors (IVs), and other random number requirements. The TRNG is built on 24 ring oscillators that
create unpredictable output to feed a complex nonlinear combinatorial circuit.
The watchdog timer is used to regain control if the system fails due to a software error after an external device
fails to respond as expected. The watchdog timer can generate an interrupt or a reset when a predefined time-
out value is reached.
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The device includes a direct memory access (µDMA) controller. The µDMA controller provides a way to offload
data transfer tasks from the Cortex-M3 CPU, allowing for more efficient use of the processor and the available
bus bandwidth. The µDMA controller can perform transfer between memory and peripherals. The µDMA
controller has dedicated channels for each supported on-chip module and can be programmed to automatically
perform transfers between peripherals and memory as the peripheral is ready to transfer more data. Some
features of the µDMA controller include the following (this is not an exhaustive list):
• Highly flexible and configurable channel operation of up to 32 channels
• Transfer modes:
– Memory-to-memory
– Memory-to-peripheral
– Peripheral-to-memory
– Peripheral-to-peripheral
• Data sizes of 8, 16, and 32 bits
The AON domain contains circuitry that is always enabled, except in Shutdown mode (where the digital supply is
off). This circuitry includes the following:
• The RTC can be used to wake the device from any state where it is active. The RTC contains three compare
and one capture registers. With software support, the RTC can be used for clock and calendar operation. The
RTC is clocked from the 32-kHz RC oscillator or crystal. The RTC can also be compensated to tick at the
correct frequency even when the internal 32-kHz RC oscillator is used instead of a crystal.
• The battery monitor and temperature sensor are accessible by software and give a battery status indication
as well as a coarse temperature measure.
9.10 System Architecture
Depending on the product configuration, the CC2640R2F-Q1 device can function either as a wireless network
processor (WNP—a device running the wireless protocol stack with the application running on a separate MCU),
or as a system-on-chip (SoC), with the application and protocol stack running on the Arm Cortex-M3 core inside
the device.
In the first case, the external host MCU communicates with the device using SPI or UART. In the second case,
the application must be written according to the application framework supplied with the wireless protocol stack.
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10 Application, Implementation, and Layout
备注
以下应用部分的信息不属于TI 组件规范,TI 不担保其准确性和完整性。客户应负责确定 TI 组件是否适
用于其应用。客户应验证并测试其设计,以确保系统功能。
10.1 Application Information
Very few external components are required for the operation of the CC2640R2F-Q1 device. This section
provides general information about the differential configuration when using the CC2640R2F-Q1 device in an
application, and an example application circuit with schematics and layout is shown in 图 10-1, 图 10-2, 图 10-3,
and 图 10-4. This is only a small selection of the many application circuit examples available as complete
reference designs from the product folder on www.ti.com.
图 10-1 shows the differential RF front-end configuration option with internal biasing. See the CC2640Q1EM-7ID
reference design for this option.
To VDDR
pins
10 µF
Optional
inductor is
needed
6.8 pF
only for
DC-DC
operation
10 µH
Antenna
(50 Q)
2.4 nH
1 pF
CC26xx
DCDC_SW
Pin 2 (RF N)
Pin 1 (RF P)
2 nH
1 pF
2 nH
(GND exposed die
attached pad)
VDDS_DCDC
Pin 2 (RF N)
Pin 1 (RF P)
2.4 to 2.7 nH
1 pF
input
decoupling
10 µF to 22 µF
12 pF
Differential operation
24-MHz XTAL
(Load capacitors on chip)
Copyright © 2017, Texas Instruments Incorporated
图10-1. CC2640R2F-Q1 Application Circuit
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图 10-2 shows the various supply voltage configuration options for the CC2640R2F-Q1 device. Not all power
supply decoupling capacitors or digital I/Os are shown. For a detailed overview of power supply decoupling and
wiring, see the TI reference designs and the CC13x0, CC26x0 SimpleLink Wireless MCU Technical Reference
Manual.
Internal DC-DC Regulator
Internal LDO Regulator
To all VDDR Pins
To all VDDR Pins
10 ꢀF
10 ꢀF
VDDS
VDDS
VDDS
VDDS
10 ꢀH
CC26xx
CC26xx
DCDC_SW Pin
NC
(GND Exposed Die
Attached Pad)
(GND Exposed Die
Attached Pad)
VDDS_DCDC Pin
Pin 2 (RF N)
Pin 1 (RF P)
VDDS_DCDC Pin
Pin 2 (RF N)
Pin 1 (RF P)
VDDS_DCDC
Input Decoupling
10 ꢀF to 22 ꢀF
VDDS_DCDC
Input Decoupling
10 ꢀF to 22 ꢀF
24-MHz XTAL
(Load Capacitors on Chip)
24-MHz XTAL
(Load Capacitors on Chip)
1.8 V to 3.8 V
to all VDDS Pins
1.8-V to 3.8-V
Supply Voltage
To All VDDS Pins
Copyright © 2017, Texas Instruments Incorporated
图10-2. Supply Voltage Configurations
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10.2 7 × 7 Internal Differential (7ID) Application Circuit
VDD_EB
VDDS
VDDR
VDDS Decoupling Capacitors
VDDR Decoupling Capacitors
FL1
L1
DCDC_SW
Pin 13
C3
Pin 22
C4
Pin 44
Pin 34
C6
Pin 45
Pin 48
C16
BLM18HE152SZ1
10uH
C2
C5
C7
C8
C9
C10
DNM
0.1uF
0.1uF
0.1uF
10uF
100nF
10uF
0.1uF
0.1uF
DNM_0402
Place L1 and
C8 close to pin 33
VDDS
J1
SMA-10V21-TGG
3
R1
100k
VDDS
VDDR
4
5
C31
2
nRESET
U1A
6.8pF
13
2
VDDS2
VDDS3
VDDS
VDDS_DCDC
VDDR
VDDR
1
22
44
34
45
48
JTAG_TMS
JTAG_TCK
C20
24
25
35
L11
JTAG_TMSC
JTAG_TCKC
RESET_N
C24
A1
2.4nH
0.1uF
C11
1pF
1
12pF
2
1
3
DCDC_SW
33
L12
L13
C14
R12
0
DCDC_SW
1
2
1
2
1
2
RF_P
RF_N
3
4
23
49
2.4GHz
X32K_Q1
X32K_Q2
DCOUPL
VSS
2nH
2nH
Y1
L21
C12
C15
DNM_0402
DNM_0402
1
2
46
47
1
2
C13
1pF
X24M_N
X24M_P
DNM_0402
2.4nH
C17
32.768kHz
C18
22pF
C19
1uF
Mount either
C24 or C14
To select SMA
or PCB ant.
R12 and C15 for
antenna matching
CC2640R2FTWRGZRQ1
C21
1pF
22pF
Y2
24MHz
Note that a
DC-blocking
capacitor must
be used if
antenna
has DC-path
to ground.
1
3
U1B
C23
DNM_0402
C22
DNM_0402
DIO_0
DIO_1
DIO_2
DIO_3
DIO_4
DIO_5
DIO_6
DIO_7
DIO_8
DIO_9
DIO_10
DIO_11
DIO_12
DIO_13
DIO_14
DIO_15
DIO_16 / JTAG TDO
DIO_17 / JTAG TDI
DIO_18
DIO_19
DIO_20
DIO_21
DIO_22
DIO_23
DIO_24
DIO_25
DIO_26
DIO_27
DIO_28
DIO_29
DIO_30
5
6
7
8
26
27
28
29
30
31
32
36
37
38
39
40
41
42
43
DIO_0
DIO_1
DIO_16
DIO_17
DIO_18
DIO_19
DIO_20
DIO_21
DIO_22
DIO_23
DIO_24
DIO_25
DIO_26
DIO_27
DIO_28
DIO_29
DIO_30
2
4
DIO_2
DIO_3
DIO_4
DIO_5
DIO_6
DIO_7
DIO_8
DIO_9
DIO_10
DIO_11
DIO_12
DIO_13
DIO_14
DIO_15
9
10
11
12
14
15
16
17
18
19
20
21
DIO22
TP_0.9mm_PTH
CC2640R2FTWRGZRQ1
EM connector 1
P1
EM connector 2
P2
DIO_7
DIO_6
JTAG_TCK
1
3
5
7
9
11
13
15
17
19
2
4
6
8
10
12
14
16
18
20
1
3
5
7
9
11
13
15
17
2
4
6
8
10
12
14
16
18
20
DIO_0
DIO_1
DIO_2
DIO_3
DIO_4
DIO_5
DIO_13
DIO_14
JTAG_TMS
DIO_26
DIO_20
DIO_24
DIO_30
DIO_29
DIO_28
DIO_21
DIO_15
DIO_18
DIO_19
DIO_12
DIO_11
DIO_10
DIO_9
DIO_23
VDD_EB
DIO_25
DIO_27
nRESET
DIO_17 / JTAG TDI
DIO_16 / JTAG TDO
19
FIDU1
FIDU4
FIDU2
FIDU5
FIDU3
DIO_8
SFM-110-02-S-D-A-K-TR
SFM-110-02-S-D-A-K-TR
FIDU6
Copyright © 2017, Texas Instruments Incorporated
图10-3. 7 × 7 Internal Differential (7ID) Application Circuit
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10.2.1 Layout
图10-4. Layout
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11 Device and Documentation Support
11.1 Device Nomenclature
To designate the stages in the product development cycle, TI assigns prefixes to all part numbers and date-
code. Each device has one of three prefixes/identifications: X, P, or null (no prefix) (for example, CC2640R2F-Q1
is in production; therefore, no prefix/identification is assigned).
Device development evolutionary flow:
X
P
Experimental device that is not necessarily representative of the final device's electrical specifications and
may not use production assembly flow.
Prototype device that is not necessarily the final silicon die and may not necessarily meet final electrical
specifications.
null Production version of the silicon die that is fully qualified.
Production devices have been characterized fully, and the quality and reliability of the device have been
demonstrated fully. TI's standard warranty applies.
Predictions show that prototype devices (X or P) have a greater failure rate than the standard production
devices. Texas Instruments recommends that these devices not be used in any production system because their
expected end-use failure rate still is undefined. Only qualified production devices are to be used.
TI device nomenclature also includes a suffix with the device family name. This suffix indicates the package type
(for example, RGZ).
For orderable part numbers of the CC2640R2F-Q1 device package types, see the Package Option Addendum of
this document, the TI website (www.ti.com), or contact your TI sales representative.
CC26 40
R2 FTW RGZ R/T Q1
PREFIX
Q1 = Q100
X = Experimental device
P = Prototype
Blank = Qualified device
R = Large Reel
T = Small Reel
DEVICE FAMILY
SimpleLink™ Multistandard
Wireless MCU
PACKAGE DESIGNATOR
RGZ = 48-pin VQFN
(Very Thin Quad Flatpack No-Lead)
F = Flash
T = Grade 2, 105°C
W = Wettable flanks
DEVICE
40 = Bluetooth low energy
ROM revision 2
Flash = 128KB
图11-1. Device Nomenclature
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11.2 Tools and Software
TI offers an extensive line of development tools, including tools to evaluate the performance of the processors,
generate code, develop algorithm implementations, and fully integrate and debug software and hardware
modules.
The following products support development of the CC2640R2F-Q1 device applications:
Software Tools:
SmartRF Studio 7 is a PC application that helps designers of radio systems to easily evaluate the RF-IC at an
early stage in the design process.
• Test functions for sending and receiving radio packets, continuous wave transmit and receive
• Evaluate RF performance on custom boards by wiring it to a supported evaluation board or debugger
• Can also be used without any hardware, but then only to generate, edit and export radio configuration
settings
• Can be used in combination with several development kits for TI's CCxxxx RF-ICs
Sensor Controller Studio provides a development environment for the CC26xx Sensor Controller. The Sensor
Controller is a proprietary, power-optimized CPU in the CC26xx, which can perform simple background tasks
autonomously and independent of the System CPU state.
• Allows for Sensor Controller task algorithms to be implemented using a C-like programming language
• Outputs a Sensor Controller Interface driver, which incorporates the generated Sensor Controller machine
code and associated definitions
• Allows for rapid development by using the integrated Sensor Controller task testing and debugging
functionality. This allows for live visualization of sensor data and algorithm verification.
IDEs and Compilers:
Code Composer Studio™ Integrated Development Environment (IDE):
• Integrated development environment with project management tools and editor
• Code Composer Studio (CCS) 6.1 and later has built-in support for the CC26xx device family
• Best support for XDS debuggers; XDS100v3, XDS110 and XDS200
• High integration with TI-RTOS with support for TI-RTOS Object View
IAR Embedded Workbench® for Arm®:
• Integrated development environment with project management tools and editor
• IAR EWARM 7.30.3 and later has built-in support for the CC26xx device family
• Broad debugger support, supporting XDS100v3, XDS200, IAR I-Jet and Segger J-Link
• Integrated development environment with project management tools and editor
• RTOS plugin available for TI-RTOS
For a complete listing of development-support tools for theCC2640R2F-Q1 platform, visit the Texas Instruments
website at www.ti.com. For information on pricing and availability, contact the nearest TI field sales office or
authorized distributor.
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11.3 Documentation Support
To receive notification of documentation updates, navigate to the device product folder on ti.com (CC2640R2F-
Q1). In the upper right corner, click on Alert me to register and receive a weekly digest of any product information
that has changed. For change details, review the revision history included in any revised document.
The current documentation that describes the CC2640R2F-Q1 devices, related peripherals, and other technical
collateral is listed in the following.
Technical Reference Manual
CC13x0, CC26x0 SimpleLink™ Wireless MCU Technical Reference Manual
Errata
CC2640R2M-Q1 SimpleLink™ Wireless MCU Errata
11.4 Texas Instruments Low-Power RF Website
Texas Instruments' Low-Power RF website has all the latest products, application and design notes, FAQ
section, news and events updates. Go to www.ti.com/lprf.
11.5 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
11.6 Trademarks
SimpleLink™, SmartRF™, Code Composer Studio™, 德州仪器(TI)™, LaunchPad™, Texas Instruments™, and TI
E2E™ are trademarks of Texas Instruments.
IEEE Std 1241™ is a trademark of Institute of Electrical and Electronics Engineers, Incorporated.
ARM7™ is a trademark of Arm Limited (or its subsidiaries).
Arm®, Cortex®, and Arm Thumb® are registered trademarks of Arm Limited (or its subsidiaries).
CoreMark® is a registered trademark of Embedded Microprocessor Benchmark Consortium.
Bluetooth® is a registered trademark of Bluetooth SIG, Inc.
IAR Embedded Workbench® is a registered trademark of IAR Systems AB.
Zigbee® is a registered trademark of Zigbee Alliance.
所有商标均为其各自所有者的财产。
11.7 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
11.8 Export Control Notice
Recipient agrees to not knowingly export or re-export, directly or indirectly, any product or technical data (as
defined by the U.S., EU, and other Export Administration Regulations) including software, or any controlled
product restricted by other applicable national regulations, received from disclosing party under nondisclosure
obligations (if any), or any direct product of such technology, to any destination to which such export or re-export
is restricted or prohibited by U.S. or other applicable laws, without obtaining prior authorization from U.S.
Department of Commerce and other competent Government authorities to the extent required by those laws.
11.9 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
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12 Mechanical, Packaging, and Orderable Information
12.1 Packaging Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OUTLINE
RGZ0048N
VQFN - 1 mm max height
S
C
A
L
E
1
.
9
0
0
PLASTIC QUAD FLATPACK - NO LEAD
7.1
6.9
A
B
0.5
0.3
0.3
0.2
PIN 1 INDEX AREA
DETAIL
OPTIONAL TERMINAL
TYPICAL
7.1
6.9
0.1 MIN
(0.05)
A
-
A
2
5
.
0
0
0
SECTION A-A
TYPICAL
1 MAX
C
SEATING PLANE
0.08 C
0.05
0.00
2X 5.5
5.15 0.1
(0.2) TYP
13
24
44X 0.5
12
25
EXPOSED
THERMAL PAD
2X
49
SYMM
5.5
A
A
SEE TERMINAL
DETAIL
1
36
0.3
48X
0.2
37
48
PIN 1 ID
(OPTIONAL)
SYMM
0.1
C B A
0.5
0.3
48X
0.05
4223598/A 03/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
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EXAMPLE BOARD LAYOUT
RGZ0048N
VQFN - 1 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
(
5.15)
SYMM
48
37
48X (0.6)
1
36
48X (0.25)
6X
(1.065)
44X (0.5)
SYMM
10X
(1.26)
49
(6.8)
(R0.05)
TYP
(
0.2) TYP
VIA
25
12
13
24
6X
10X (1.26)
(1.065)
(6.8)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:12X
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
SOLDER MASK
OPENING
METAL
EXPOSED METAL
EXPOSED METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4223598/A 03/2017
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
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EXAMPLE STENCIL DESIGN
RGZ0048N
VQFN - 1 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
(0.63 TYP)
(1.26) TYP
16X
1.06)
(
37
48
48X (0.6)
49
36
1
48X (0.25)
44X (0.5)
(1.26)
TYP
(0.63)
TYP
SYMM
(6.8)
(R0.05) TYP
25
12
METAL
TYP
13
24
SYMM
(6.8)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
EXPOSED PAD 49
68% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE
SCALE:15X
4223598/A 03/2017
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
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PACKAGE OPTION ADDENDUM
www.ti.com
7-Nov-2022
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
CC2640R2FTWRGZRQ1
CC2640R2FTWRGZTQ1
ACTIVE
VQFN
VQFN
RGZ
48
48
2500 RoHS & Green
250 RoHS & Green
SN
Level-3-260C-168 HR
Level-3-260C-168 HR
-40 to 105
-40 to 105
CC2640Q1
R2F
Samples
Samples
ACTIVE
RGZ
SN
CC2640Q1
R2F
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
7-Nov-2022
OTHER QUALIFIED VERSIONS OF CC2640R2F-Q1 :
Catalog : CC2640R2F
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
29-Mar-2023
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
CC2640R2FTWRGZRQ1 VQFN
CC2640R2FTWRGZTQ1 VQFN
RGZ
RGZ
48
48
2500
250
330.0
180.0
16.4
16.4
7.3
7.3
7.3
7.3
1.1
1.1
12.0
12.0
16.0
16.0
Q2
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
29-Mar-2023
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
CC2640R2FTWRGZRQ1
CC2640R2FTWRGZTQ1
VQFN
VQFN
RGZ
RGZ
48
48
2500
250
336.6
210.0
336.6
185.0
31.8
35.0
Pack Materials-Page 2
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