CC3120 [TI]
适用于 MCU 应用的 SimpleLink™ Wi-Fi® 网络处理器、物联网解决方案;型号: | CC3120 |
厂家: | TEXAS INSTRUMENTS |
描述: | 适用于 MCU 应用的 SimpleLink™ Wi-Fi® 网络处理器、物联网解决方案 |
文件: | 总63页 (文件大小:2519K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
CC3120
ZHCSOK6A –FEBRUARY 2017 –REVISED MAY 2021
CC3120 SimpleLink™ Wi-Fi® 网络处理器,
适用于MCU 应用的物联网解决方案
• Wi-Fi TX 功率:
1 特性
– 1 DSSS 时为18.0dBm
– 54 OFDM 时为14.5dBm
• Wi-Fi RX 灵敏度:
– 1 DSSS 时为-96.0dBm
– 54 OFDM 时为-74.5dBm
• 应用吞吐量:
– UDP:16Mbps
– TCP:13Mbps
• 电源管理子系统
• CC3120R SimpleLink™ Wi-Fi® 包含无线网络处理
器(NWP) 和电源管理子系统
• 采用专用Wi-Fi Internet-on-a chip™ Wi-Fi NWP,
可充分减轻应用微控制器单元(MCU) 承担的Wi-Fi
和互联网协议压力
• Wi-Fi 模式:
– 802.11b/g/n 基站
– 802.11b/g/n 接入点(AP) 支持多达4 个基站
– Wi-Fi Direct® 客户端/组所有者
• WPA2 个人版和企业版安全性:WEP、WPA™/
WPA2™ PSK、WPA2 企业版(802.1x)、WPA3™ 个
人版、WPA3™ 企业版
– 集成式直流/直流转换器支持宽电源电压范围:
• VBAT 宽电压模式:2.1 V 至3.6 V
• VIO 始终与VBAT 关联
• 预稳压1.85V 模式
• IPv4 和IPv6 TCP/IP 堆栈
– 高级低功耗模式
– 行业标准BSD 套接字应用编程接口(API):
• 关断:1µA
• 休眠:4.5µA
• 16 个同步TCP 或UDP 套接字
• 6 个同步TLS 和SSL 套接字
• IP 寻址:具有重复地址检测(DAD) 的静态IP、
LLA、DHCPv4 和DHCPv6
• 适用于自主和快速Wi-Fi 连接的SimpleLink 连接管
理器
• 低功耗深度睡眠(LPDS):115µA
• RX 流量:54 OFDM 时为59mA
• TX 流量:54 OFDM 时为229mA ,最大功
率
• 空闲连接(MCU 处于LPDS 状态):DTIM
= 1 时为690µA
• 可通过SmartConfig™ 技术、AP 模式和WPS2 选
项灵活配置Wi-Fi:
• 时钟源
• RESTful API 支持(使用内部HTTP 服务器)
• 广泛的安全功能:
– 具有内部振荡器的40.0MHz 晶体
– 32.768kHz 晶体或外部RTC
• RGK 封装
– 硬件特性:
• 独立执行环境
• 器件标识
– 64 引脚9mm × 9mm 极薄四方扁平无引线
(VQFN) 封装,0.5mm 间距
• 工作温度
– 网络安全性:
– 环境温度范围:–40°C 至+85°C
• 器件支持SimpleLink MCU 平台开发人员生态系统
• 个人和企业Wi-Fi 安全性
• 安全套接字(SSLv3、TLS1.0/1.1/TLS1.2)
• HTTPS 服务器
• 受信任的根证书目录
• TI 信任根公钥
2 应用
• 用于物联网应用(IoT),例如:
– 云连接
– 软件知识产权保护:
– 互联网网关
– 家庭和楼宇自动化
– 电器
• 安全密钥存储
• 文件系统安全
• 软件篡改检测
– 访问控制
• 克隆保护
• 在专用NWP 上运行的嵌入式网络应用:
– 具有动态用户回调的HTTP/HTTPS Web 服务器
– mDNS、DNS-SD、DHCP 服务器
– Ping
• 恢复机制—可恢复为出厂默认设置或恢复为完整出
厂映像
本文档旨在为方便起见,提供有关TI 产品中文版本的信息,以确认产品的概要。有关适用的官方英文版本的最新信息,请访问
www.ti.com,其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前,请务必参考最新版本的英文版本。
English Data Sheet: SWAS034
CC3120
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ZHCSOK6A –FEBRUARY 2017 –REVISED MAY 2021
– 安防系统
– 智能能源
– 工业控制
– 智能插座和仪表计量
– 无线音频
– IP 网络传感器节点
– 资产跟踪
– 医疗设备
3 说明
CC3120R 器件是SimpleLink™ 微控制器(MCU) 平台的一部分,包含Wi-Fi®、低功耗Bluetooth®、Sub-1GHz 器
件和主机 MCU。它们均共用一个通用、简单易用的开发环境,其中包含单核软件开发套件 (SDK) 和丰富的工具
集。借助一次性集成的 SimpleLink™ 平台,可以将产品组合中的任何器件组合添加至您的设计中,从而在设计要
求变更时实现100% 代码重用。有关更多信息,请访问www.ti.com/simplelink。
通过来自德州仪器 (TI)™ 的 CC3120R 器件将任何微控制器 (MCU) 连接到物联网 (IoT)。经过 Wi-Fi Alliance® 认
证的CC3120R 器件属于第二代SimpleLink™ Wi-Fi® 系列解决方案,极大地简化了低功耗互联网连接的实施。
CC3120R 支持 ROM 中实施的所有 Wi-Fi 和互联网协议,在专用的片上 Arm® 网络处理器上运行,极大地减轻了
主机MCU 的压力并简化了系统集成。
CC3120R Wi-Fi® Internet-on-a chip™ 器件包含一个专用的 Arm® MCU,可减少主机 MCU 的很多联网活动。此
子系统包含 802.11b/g/n 无线电、基带和具有强大加密引擎的 MAC,采用 256 位加密,可实现快速、安全的互联
网连接。CC3120R 器件支持基站、接入点和Wi-Fi Direct 模式。此器件还支持WPA2™ 个人版和企业版安全性以
及 WPA3™ 个人版和企业版。此器件包含嵌入式 TCP/IP 和 TLS/SSL 堆栈、HTTP 服务器和多种互联网协议。
CC3120R 器件支持各种Wi-Fi 配置方法,包括基于接入点模式的HTTP、SmartConfig™ 技术和WPS2.0。
作为TI 第二代SimpleLink™ Wi-Fi® 系列的一部分,CC3120R 器件推出了全新特性和增强功能,例如:
• IPv6
• 增强的Wi-Fi 配置
• 优化的低功耗管理
• Wi-Fi AP 可连接多达4 个基站
• 可同时打开更多的BSD 套接字;最多16 个BSD 套接字,其中6 个支持安全型
• HTTPS)
• 支持RESTful API
• 非对称密钥加密库
CC3120R 器件随附一个纤薄的用户友好型主机驱动器,可简化网络应用的集成和开发。主机驱动程序可轻松移植
到大多数平台和操作系统 (OS)。此驱动程序采用严格的 ANSI-C (C99) 编程语言编写,只需极小的平台适配层
(移植层)。此驱动程序占用的内存非常小,可在具有任何时钟速度的 8 位、16 位或 32 位 MCU 上运行(无需
使用高性能时钟或实时时钟)。
CC3120R 器件提供易于布局的 VQFN 封装,作为完整的平台解决方案提供,其中包括各种工具和软件、示例应
用、用户和编程指南、参考设计以及 TI E2E™ 支持社区。CC3120R 器件是 SimpleLink MCU 生态系统的一部
分。
器件信息
器件型号(1)
CC3120RNMARGKT/R
封装尺寸(标称值)
封装
VQFN (64)
9.00mm x 9.00mm
(1) 如需了解所有可用封装,请参阅数据表末尾的可订购产品附录。
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4 功能方框图
图4-1 显示了CC3120R SimpleLink Wi-Fi 解决方案的功能方框图。
VCC
SPI
flash
40-MHz
crystal
32-MHz
crystal
32 kHz
CC3120R
Network Processor
MCU
MCU
nHIB
HOST_INTR
SPI/UART
图4-1. 功能模块图
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图4-2 概要显示了CC3120R 的硬件。
External MCU
Wi-Fi® Network Processor
Host Interface
Hardware
1× SPI
1× UART
Power Management
Network Processor
Application
Protocols
Wi-Fi® Driver
TCP/IP Stack
Oscillators
DC/DC
RTC
RAM
ROM
Arm® Cortex®
Synthesizer
图4-2. CC3120R 硬件概述
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图4-3 概要显示了CC3120R 的嵌入式软件。
User Application
SimpleLink™ Driver
SPI or UART Driver
External Microcontroller
Internet Protocols
TLS/SSL
TCP/IP
Embedded Internet
Supplicant
Wi-Fi® Driver
Wi-Fi® MAC
Wi-Fi® Baseband
Wi-Fi® Radio
Embedded Wi-Fi®
Arm® Processor (Wi-Fi® Network Processor)
图4-3. CC3120R 软件概述
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Table of Contents
8.13 Reset Requirement.................................................21
8.14 Timing and Switching Characteristics..................... 22
8.15 External Interfaces..................................................30
9 Detailed Description......................................................34
9.1 Device Features........................................................34
9.2 Power-Management Subsystem...............................37
9.3 Low-Power Operating Modes................................... 38
9.4 Memory.....................................................................39
9.5 Restoring Factory Default Configuration...................40
10 Applications, Implementation, and Layout............... 41
10.1 Application Information........................................... 41
10.2 PCB Layout Guidelines...........................................45
11 Device and Documentation Support..........................48
11.1 Development Tools and Software........................... 48
11.2 Firmware Updates...................................................49
11.3 Device Nomenclature..............................................49
11.4 Documentation Support.......................................... 50
11.5 支持资源..................................................................52
11.6 Trademarks............................................................. 52
11.7 Electrostatic Discharge Caution..............................52
11.8 Export Control Notice..............................................52
11.9 术语表..................................................................... 52
12 Mechanical, Packaging, and Orderable
1 特性................................................................................... 1
2 应用................................................................................... 1
3 说明................................................................................... 2
4 功能方框图.........................................................................3
5 Revision History.............................................................. 6
6 Device Comparison.........................................................8
6.1 Related Products........................................................ 9
7 Terminal Configuration and Functions........................10
7.1 Pin Diagram.............................................................. 10
7.2 Pin Attributes.............................................................11
7.3 Connections for Unused Pins................................... 13
8 Specifications................................................................ 14
8.1 Absolute Maximum Ratings...................................... 14
8.2 ESD Ratings............................................................. 14
8.3 Power-On Hours (POH)............................................14
8.4 Recommended Operating Conditions.......................15
8.5 Current Consumption Summary .............................. 15
8.6 TX Power and IBAT versus TX Power Level
Settings....................................................................... 16
8.7 Brownout and Blackout Conditions...........................18
8.8 Electrical Characteristics (3.3 V, 25°C)..................... 19
8.9 WLAN Receiver Characteristics................................20
8.10 WLAN Transmitter Characteristics..........................20
8.11 WLAN Filter Requirements..................................... 21
8.12 Thermal Resistance Characteristics....................... 21
Information.................................................................... 53
12.1 Packaging Information............................................ 53
5 Revision History
注:以前版本的页码可能与当前版本的页码不同
Changes from February 7, 2018 to May 13, 2021 (from Revision * (Feb 2017) to Revision A
(May 2021))
Page
• 更新和格式和组织,以反映最新TI 标准.........................................................................................................0
• 节1 新增了WPA3 个人版和WPA3 企业版........................................................................................................ 1
• 更改了特性部分..................................................................................................................................................1
• 节3 新增了WPA3 个人版和WPA3 企业版........................................................................................................ 2
• 更改了说明部分..................................................................................................................................................2
• 在功能方框图部分添加了功能方框图................................................................................................................ 3
• 添加了CC3120R 硬件概览方框图.....................................................................................................................3
• Added Device Comparison section.....................................................................................................................8
• Changed Device Features Comparison table.....................................................................................................8
• Changed CC3120 SDK Plug-In link....................................................................................................................9
• Added NC = No internal connection note to the pinout diagram ......................................................................10
• Changed Pin Attributes table............................................................................................................................ 11
• Deleted the pin number for GND_TAB .............................................................................................................11
• Changed Connections for Unused Pins table...................................................................................................13
• Changed the typical value for Hibernate from "4 µA" to "4.5 µA"..................................................................... 15
• Deleted the + sign from the typical values in the WLAN Transmitter Characteristics table.............................. 20
• Added the table note "Power of 802.11b rates are reduced to meet ETSI requirements" to the WLAN
Transmitter Characteristics table...................................................................................................................... 20
• Added Reset Requirement table ......................................................................................................................21
• Changed from "200-mS" to 200-ms" in the Device Reset section ...................................................................22
• Changed from "pin 32" to "pin 52" in the second list item of the Device Reset section ...................................22
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• Changed the Host SPI Interface Timing diagram............................................................................................. 28
• Changed the parameter numbers in the Host SPI Interface Timing Parameters table ....................................28
• Changed Flash SPI Interface Timing diagram..................................................................................................29
• Changed the parameter numbers in the Flash SPI Interface Timing Parameters table .................................. 29
• Added WPA3 Personal and WPA3 Enterprise to 节9 ..................................................................................... 34
• Added WPA3 Personal and WPA3 Enterprise to 节9.1.1 ............................................................................... 34
• Added WPA3 personal and enterprise to 表9-1 ..............................................................................................34
• Added "The typical battery drain in this mode is 4.5 µA" to the Hibernate section...........................................38
• Added "The typical battery drain in this mode is 1 µA" to the Shutdown section..............................................38
• Changed the table title from "Title" to "Recommended Flash Size" .................................................................39
• Changed the CC3120R Wide-Voltage Mode Application Circuit diagram........................................................ 41
• Added R14 information to the Bill of Materials for CC3120R in Wide-Voltage Mode table...............................41
• Changed the CC3120R Preregulated 1.85-V Mode Application Circuit diagram ............................................ 43
• Added R13 information to the Bill of Materials for CC3120R in Preregulated, 1.85-V Mode table...................43
• Changed from "XTALM" to "XTAL_N" in the Clock Interfaces section..............................................................46
• Changed Tools and Software section............................................................................................................... 48
• Changed CC3120R Device Nomenclaturefigure..............................................................................................49
• Changed Documentation Support section........................................................................................................50
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6 Device Comparison
表6-1 shows the features supported across different CC3220 devices.
表6-1. Device Features Comparison
DEVICE
FEATURE
CC3220R
CC3220S
On-Chip Application Memory
256KB
CC3220SF
RAM
256KB
256KB
1MB
Flash
–
–
Security Features
File system security
File system security
Secure key storage
Software tamper detection
Cloning protection
Secure key storage
Software tamper detection
Cloning protection
Enhanced Application Level
Security
–
Initial secure programming
Initial secure programming
Hardware Acceleration
Additional Networking Security
Secure Boot
Hardware Crypto Engines
Unique Device Identity
Trusted Root-Certificate Catalog Trusted Root-Certificate Catalog Trusted Root-Certificate Catalog
TI Root-of-Trust Public key
Hardware Crypto Engines
Unique Device Identity
Hardware Crypto Engines
Unique Device Identity
TI Root-of-Trust Public key
TI Root-of-Trust Public key
No
Yes
Yes
Additional Features
802.11 b/g/n
Standard
TCP/IP Stack
Package
IPv4, IPv6
9 mm × 9 mm VQFN
16
Sockets
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6.1 Related Products
For information about other devices in this family of products or related products, see the following links:
SimpleLink™ MCU
Portfolio
This portfolio offers a single development environment that delivers flexible hardware,
software and tool options for customers developing wired and wireless applications. With
100 percent code reuse across host MCUs, Wi-Fi™, Bluetooth® low energy, Sub-1 GHz
devices and more, choose the MCU or connectivity standard that fits your design. A one-
time investment with the SimpleLink software development kit (SDK) allows you to reuse
often, opening the door to create unlimited applications.
SimpleLink™ Wi-Fi® This device platform offers several Internet-on-a chip™ solutions, which address the
Family
need of battery operated, security enabled products. Texas instruments offers a single
chip wireless microcontroller and a wireless network processor which can be paired with
any MCU, to allow developers to design new wi-fi products, or upgrade existing products
with wi-fi capabilities.
MSP432™ Host
MCU
These MCUs feature the Arm® Cortex®-M4 processor that offers ample processing
capability with floating point unit and memory footprint for advanced processing
algorithm, communication protocols and application needs, while incorporating a 14-bit
1-msps ADC14 that provides a flexible and low-power analog with best-in-class
performance to enable developers to add differentiated sensing and measurement
capabilities to their Wi-Fi applications.
Reference Designs
for CC3100 and
CC3120 Devices
TI Designs Reference Design Library is a robust reference design library spanning
analog, embedded processor and connectivity. Created by TI experts to help you jump
start your system design, all TI Designs include schematic or block diagrams, BOMs and
design files to speed your time to market. Search and download designs at ti.com/
tidesigns.
SimpleLink™ Wi-Fi® This SDK plug-in contains drivers, sample applications for Wi-Fi features and internet,
CC3120 SDK Plug-in and documentation required to use the CC3120 solution.
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7 Terminal Configuration and Functions
7.1 Pin Diagram
图7-1 shows pin assignments for the 64-pin VQFN package.
48
47
46 45 44 43
42
41
40
39
38
37
36
35 34 33
VDD_RAM
UART1_nRTS
RTC_XTAL_P
RTC_XTAL_N
NC
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
nRESET
RF_BG
RESERVED
RESERVED
NC
VIN_IO2
NC
UART1_TX
VDD_DIG2
UART1_RX
TEST_58
TEST_59
TEST_60
UART1_nCTS
TEST_62
NC
NC
LDO_IN2
VDD_PLL
WLAN_XTAL_P
WLAN_XTAL_N
SOP2/TCXO_EN
NC
RESERVED
NC
NC
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14 15 16
NC = No internal connection
图7-1. VQFN 64-Pin Assignments Top View
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7.2 Pin Attributes
表7-1 describes the CC3120R pins.
Note
If an external device drives a positive voltage to signal pads when the CC3120R device is not
powered, DC current is drawn from the other device. If the drive strength of the external device is
adequate, an unintentional wakeup and boot of the CC3120R device can occur. To prevent current
draw, TI recommends one of the following:
• All devices interfaced to the CC3120R device must be powered from the same power rail as the
CC3120R device.
• Use level shifters between the CC3120R device and any external devices fed from other
independent rails.
• The nRESET pin of the CC3120R device must be held low until the VBAT supply to the device is
driven and stable.
表7-1. Pin Attributes
STATE AT RESET
AND HIBERNATE
PIN
DEFAULT FUNCTION
I/O TYPE(1)
DESCRIPTION
Hibernate signal input to the NWP subsystem
(active low). This is connected to the MCU
GPIO. If the GPIO from the MCU can float while
the MCU enters low power, consider adding a
pullup resistor on the board to avoid floating.
2
nHIB
Hi-Z
I
3
5
Reserved
HOST_SPI_CLK
HOST_SPI_MOSI
HOST_SPI_MISO
HOST_SPI_nCS
VDD_DIG1
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Reserved for future use
—
I
Host interface SPI clock
6
I
Host interface SPI data input
Host interface SPI data output
Host interface SPI chip select (active low)
Digital core supply (1.2 V)
7
O
8
I
9
Power
10
11
12
13
VIN_IO1
Power
I/O supply
FLASH_SPI_CLK
FLASH_SPI_MOSI
FLASH _SPI_MISO
O
O
I
Serial Flash interface: SPI clock
Serial Flash interface: SPI data out
Serial Flash interface: SPI data in (active high)
Serial Flash interface: SPI chip select
(active low)
14
FLASH _SPI_CS
Hi-Z
O
15
19
HOST_INTR
Reserved
Hi-Z
Hi-Z
O
Interrupt output (active high)
Connect a 100-kΩpulldown resistor to ground.
—
Controls restore to default mode. Enable signal
for external TCXO. Add a 10-kΩpulldown
resistor to ground.
21
SOP2/TCXO_EN
Hi-Z
O
22
23
24
25
29
30
31
WLAN_XTAL_N
WLAN_XTAL_P
VDD_PLL
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Analog
Analog
Power
Power
Connect the WLAN 40-MHz crystal here.
Connect the WLAN 40-MHz crystal here.
Internal PLL power supply (1.4-V nominal)
Input to internal LDO
LDO_IN2
Reserved
RF_BG
Hi-Z
Hi-Z
O
Reserved for future use
RF
2.4-GHz RF TX, RX
RESET input for the device. Active low input.
Use RC circuit (100 k || 0.1 µF) for power on
reset (POR).
32
nRESET
Hi-Z
I
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表7-1. Pin Attributes (continued)
STATE AT RESET
I/O TYPE(1)
PIN
33
DEFAULT FUNCTION
VDD_PA_IN
DESCRIPTION
AND HIBERNATE
Hi-Z
Hi-Z
Power
Power supply for the RF power amplifier (PA)
SOP[2:0] used for factory restore. Add 100-kΩ
pulldown to ground. See .
34
SOP1
—
SOP[2:0] used for factory restore. Add 100-kΩ
pulldown to ground. See .
35
36
37
SOP0
LDO_IN1
Hi-Z
Hi-Z
Hi-Z
—
Power
Power
Input to internal LDO
Power supply for the DC/DC converter for
analog section
VIN_DCDC_ANA
38
39
40
41
DCDC_ANA_SW
VIN_DCDC_PA
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Power
Power
Power
Power
Analog DC/DC converter switch output
PA DC/DC converter input supply
DCDC_PA_SW_P
DCDC_PA_SW_N
PA DC/DC converter switch output +ve
PA DC/DC converter switch output –ve
PA DC/DC converter output. Connect the output
capacitor for DC/DC here.
42
43
44
DCDC_PA_OUT
DCDC_DIG_SW
VIN_DCDC_DIG
Hi-Z
Hi-Z
Hi-Z
Power
Power
Power
Digital DC/DC converter switch output
Power supply input for the digital DC/DC
converter
45
46
47
48
49
50
DCDC_ANA2_SW_P
DCDC_ANA2_SW_N
VDD_ANA2
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Power
Power
Power
Power
Power
O
Analog2 DC/DC converter switch output +ve
Analog2 DC/DC converter switch output –ve
Analog2 power supply input
VDD_ANA1
Analog1 power supply input
VDD_RAM
Power supply for the internal RAM
UART host interface (active low)
UART1_nRTS
32.768-kHz XTAL_P or external CMOS level
clock input
51
RTC_XTAL_P
Hi-Z
Analog
32.768-kHz XTAL_N or 100-kΩexternal pullup
for external clock
52
54
55
56
57
RTC_XTAL_N
VIN_IO2
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Analog
Power
O
I/O power supply. Same as battery voltage.
UART host interface. Connect to test point on
prototype for Flash programming.
UART1_TX
VDD_DIG2
UART1_RX
Power
I
Digital power supply (1.2 V)
UART host interface; connect to test point on
prototype for Flash programming.
60
61
62
TEST_60
UART1_nCTS
TEST_62
Hi-Z
Hi-Z
Hi-Z
O
I
Test signal; connect to an external test point.
UART host interface (active low)
O
Test signal; connect to an external test point.
Ground tab used as thermal and electrical
ground
GND
Power
—
—
(1) I = Input
O = Output
RF = radio frequency
I/O = bidirectional
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7.3 Connections for Unused Pins
All unused pins must be left as no connect (NC) pins. 表7-2 provides a list of NC pins.
表7-2. Connections for Unused Pins
STATE AT RESET
PIN
DEFAULT FUNCTION
I/O TYPE
DESCRIPTION
AND HIBERNATE
WLAN analog
WLAN analog
WLAN analog
WLAN analog
WLAN analog
WLAN analog
WLAN analog
WLAN analog
WLAN analog
WLAN analog
1
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
Unused; leave unconnected.
Unused; leave unconnected.
Unused; leave unconnected.
Unused; leave unconnected.
Unused; leave unconnected.
Unused; leave unconnected.
Unused; leave unconnected.
Unused; leave unconnected.
Unused; leave unconnected.
Unused; leave unconnected.
—
—
—
—
—
—
—
—
—
—
4
16
17
18
20
26
27
28
53
TEST_58 Unused; leave
unconnected.
58
59
NC
NC
WLAN analog
WLAN analog
—
—
TEST_59 Unused; leave
unconnected.
TEST_60 Unused; leave
unconnected.
63
64
NC
NC
WLAN analog
WLAN analog
—
—
Unused; leave unconnected.
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8 Specifications
All measurements are referenced at the device pins, unless otherwise indicated. All specifications are over
process and voltage, unless otherwise indicated.
8.1 Absolute Maximum Ratings
These specifications indicate levels where permanent damage to the device can occur. Functional operation is not ensured
under these conditions. Operation at absolute maximum conditions for extended periods can adversely affect long-term
reliability of the device. (1) (2)
MIN
MAX
UNIT
VBAT and VIO
Pins: 37, 39, 44
Pins: 10, 54
3.8
V
–0.5
0.0
V
VIO –VBAT (differential)
Digital inputs
VIO + 0.5
2.1
V
–0.5
–0.5
–0.5
–40
–55
RF pins
V
Analog pins, crystal
Operating temperature, TA
Storage temperature, Tstg
Pins: 22, 23, 51, 52
2.1
V
85
°C
°C
125
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to VSS, unless otherwise noted.
8.2 ESD Ratings
VALUE
±2000
±500
UNIT
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
VESD
Electrostatic discharge
V
Charged device model (CDM), per JEDEC specification JESD22-C101(2)
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
8.3 Power-On Hours (POH)
This information is provided solely for your convenience and does not extend or modify the warranty provided under TI's
standard terms and conditions for TI semiconductor products.
POWER-ON HOURS [POH]
OPERATING CONDITION
(hours)
TA up to 85°C(1)
87,600
(1) The TX duty cycle (power amplifier ON time) is assumed to be 10% of the device POH. Of the remaining 90% of the time, the device
can be in any other state.
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8.4 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)(1) (2)
MIN
TYP
MAX
UNIT
Direct battery connection(3)
2.1(6)
3.3
3.6
VBAT, VIO
(shorted to VBAT
Pins: 10, 37, 39,
44, 54
V
Preregulated 1.85 V(4) (5)
)
Ambient thermal slew
20 °C/minute
–20
(1) Operating temperature is limited by crystal frequency variation.
(2) When operating at an ambient temperature of over 75°C, the transmit duty cycle must remain below 50% to avoid the auto-protect
feature of the power amplifier. If the auto-protect feature triggers, the device takes a maximum of 60 seconds to restart the
transmission.
(3) To ensure WLAN performance, ripple on the 2.1- to 3.3-V supply must be less than ±300 mV.
(4) To ensure WLAN performance, ripple on the 1.85-V supply must be less than 2% (±40 mV).
(5) TI recommends keeping VBAT above 1.85 V. For lower voltages, use a boost converter.
(6) The minimum voltage specified includes the ripple on the supply voltage and all other transient dips. The brownout condition is also 2.1
V, and care must be taken when operating at the minimum specified voltage.
8.5 Current Consumption Summary
TA = 25°C, VBAT = 3.6 V
PARAMETER
TEST CONDITIONS(1) (4)
TX power level = 0
TX power level = 4
TX power level = 0
TX power level = 4
TX power level = 0
TX power level = 4
MIN
TYP
272
188
248
179
223
160
53
MAX UNIT
1 DSSS
6 OFDM
54 OFDM
TX
mA
1 DSSS
RX(6)
mA
54 OFDM
53
Idle connected(2)
LPDS
690
115
4.5
µA
µA
µA
µA
Hibernate(5)
Shutdown
1
VBAT = 3.6 V
VBAT = 3.3 V
VBAT = 2.1 V
VBAT = 1.85 V
420
450
670
700
Peak calibration current(3) (6)
mA
(1) TX power level = 0 implies maximum power (see 图8-1, 图8-2, and 图8-3). TX power level = 4 implies output power backed off
approximately 4 dB.
(2) DTIM = 1
(3) The complete calibration can take up to 17 mJ of energy from the battery over a time of 24 ms. In default mode, calibration is
performed sparingly, and typically occurs when re-enabling the NWP and when the temperature has changed by more than 20°C.
There are two additional calibration modes that may be used to reduced or completely eliminate the calibration event. For further
details, see CC3120, CC3220 SimpleLink™ Wi-Fi® and IoT Network Processor Programmer's Guide.
(4) The CC3120R system is a constant power-source system. The active current numbers scale based on the VBAT voltage supplied.
(5) For the 1.85-V mode, the hibernate current is higher by 50 µA across all operating modes because of leakage into the PA and analog
power inputs.
(6) The RX current is measured with a 1-Mbps throughput rate.
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8.6 TX Power and IBAT versus TX Power Level Settings
图 8-1, 图 8-2, and 图 8-3 show TX Power and IBAT versus TX power level settings for modulations of 1 DSSS,
6 OFDM, and 54 OFDM, respectively.
In 图 8-1, the area enclosed in the circle represents a significant reduction in current during transition from TX
power level 3 to level 4. In the case of lower range requirements (14-dBm output power), TI recommends using
TX power level 4 to reduce the current.
1 DSSS
19.00
17.00
280.00
264.40
249.00
233.30
218.00
202.00
186.70
171.00
Color by
TX Power (dBm)
15.00
13.00
IBAT (VBAT @ 3.6 V)
11.00
9.00
7.00
5.00
3.00
1.00
155.60
140.00
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
TX power level setting
图8-1. TX Power and IBAT vs TX Power Level Settings (1 DSSS)
6 OFDM
19.00
17.00
280.00
264.40
249.00
233.30
218.00
202.00
186.70
171.00
Color by
TX Power (dBm)
15.00
13.00
IBAT (VBAT @ 3.6 V)
11.00
9.00
7.00
5.00
3.00
1.00
155.60
140.00
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
TX power level setting
图8-2. TX Power and IBAT vs TX Power Level Settings (6 OFDM)
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54 OFDM
19.00
17.00
280.00
Color by
264.40
249.00
233.30
218.00
202.00
186.70
171.00
TX Power (dBm)
15.00
13.00
IBAT (VBAT @ 3.6 V)
11.00
9.00
7.00
5.00
3.00
1.00
155.60
140.00
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
TX power level setting
图8-3. TX Power and IBAT vs TX Power Level Settings (54 OFDM)
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8.7 Brownout and Blackout Conditions
The device enters a brownout condition when the input voltage drops below Vbrownout (see 图 8-4 and 图 8-5).
This condition must be considered during design of the power supply routing, especially when operating from a
battery. High-current operations, such as a TX packet or any external activity (not necessarily related directly to
networking) can cause a drop in the supply voltage, potentially triggering a brownout condition. The resistance
includes the internal resistance of the battery, the contact resistance of the battery holder (four contacts for 2×
AA batteries), and the wiring and PCB routing resistance.
Note
When the device is in HIBERNATE state, brownout is not detected. Only blackout is in effect during
HIBERNATE state.
图8-4. Brownout and Blackout Levels (1 of 2)
图8-5. Brownout and Blackout Levels (2 of 2)
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In the brownout condition, all sections of the device (including the 32-kHz RTC) shut down except for the
Hibernate module, which remains on. The current in this state can reach approximately 400 µA. The blackout
condition is equivalent to a hardware reset event in which all states within the device are lost.
表8-1 lists the brownout and blackout voltage levels.
表8-1. Brownout and Blackout Voltage Levels
CONDITION
VOLTAGE LEVEL
UNIT
V
Vbrownout
Vblackout
2.1
1.67
V
8.8 Electrical Characteristics (3.3 V, 25°C)
GPIO Pins Except 29, 30, 50, 52, and 53 (25°C)(1)
PARAMETER
Pin capacitance
TEST CONDITIONS
MIN
NOM
MAX
UNIT
pF
V
CIN
VIH
VIL
IIH
4
High-level input voltage
Low-level input voltage
High-level input current
Low-level input current
0.65 × VDD
VDD + 0.5 V
0.35 × VDD
V
–0.5
5
5
nA
nA
IIL
IL = 2 mA; configured I/O drive
strength = 2 mA;
2.4 V ≤VDD < 3.6 V
VDD × 0.8
VDD × 0.7
VDD × 0.7
VDD × 0.75
VDD × 0.7
IL = 4 mA; configured I/O drive
strength = 4 mA;
2.4 V ≤VDD < 3.6 V
IL = 8 mA; configured I/O drive
strength = 8 mA;
2.4 V ≤VDD < 3.6 V
VOH
High-level output voltage
V
IL = 2 mA; configured I/O drive
strength = 2 mA;
2.1 V ≤VDD < 2.4 V
IL = 2 mA; configured I/O drive
strength = 2 mA;
VDD = 1.85 V
IL = 2 mA; configured I/O drive
strength = 2 mA;
2.4 V ≤VDD < 3.6 V
VDD × 0.2
VDD × 0.2
VDD × 0.2
VDD × 0.25
VDD × 0.35
IL = 4 mA; configured I/O drive
strength = 4 mA;
2.4 V ≤VDD < 3.6 V
IL = 8 mA; configured I/O drive
strength = 8 mA;
2.4 V ≤VDD < 3.6 V
VOL
Low-level output voltage
V
IL = 2 mA; configured I/O drive
strength = 2 mA;
2.1 V ≤VDD < 2.4 V
IL = 2 mA; configured I/O drive
strength = 2 mA;
VDD = 1.85 V
2-mA drive
2
4
6
High-level
source current
IOH
4-mA drive
6-mA drive
mA
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GPIO Pins Except 29, 30, 50, 52, and 53 (25°C)(1)
PARAMETER
2-mA drive
TEST CONDITIONS
MIN
2
NOM
MAX
UNIT
mA
V
Low-level
sink current
IOL
4-mA drive
6-mA drive
4
6
VIL
nRESET(2)
0.6
(1) TI recommends using the lowest possible drive strength that is adequate for the applications. This recommendation minimizes the risk
of interference to the WLAN radio and reduces any potential degradation of RF sensitivity and performance. The default drive strength
setting is 6 mA.
(2) The nRESET pin must be held below 0.6 V for the device to register a reset.
8.9 WLAN Receiver Characteristics
TA = 25°C, VBAT = 2.1 V to 3.6 V. Parameters are measured at the SoC pin on channel 6 (2437 MHz).
PARAMETER
TEST CONDITIONS (Mbps)
MIN
TYP(1)
–96.0
–94.0
–88.0
–90.5
–90.0
–86.5
–80.5
–74.5
–71.5
–70.5
–4.0
MAX
UNIT
1 DSSS
2 DSSS
11 CCK
6 OFDM
Sensitivity
9 OFDM
(8% PER for 11b rates, 10% PER for 11g/11n
dBm
rates) (10% PER)(3)
18 OFDM
36 OFDM
54 OFDM
MCS7 (GF)(2)
MCS7 (MM)(2)
802.11b
Maximum input level
(10% PER)
dBm
802.11g
–10.0
(1) In preregulated 1.85-V mode, RX sensitivity is 0.25- to 1-dB lower.
(2) Sensitivity for mixed mode is 1-dB worse.
(3) Sensitivity is 1-dB worse on channel 13 (2472 MHz).
8.10 WLAN Transmitter Characteristics
TA = 25°C, VBAT = 2.1 V to 3.6 V. Parameters measured at SoC pin on channel 7 (2442 MHz).(1) (2) (3)
PARAMETER
TEST CONDITIONS(3)
MIN
TYP
18.0
18.0
18.3
17.3
17.3
17.0
16.0
14.5
13.0
MAX
UNIT
dBm
ppm
1 DSSS
2 DSSS
11 CCK
6 OFDM
Maximum RMS output power measured at 1
dB from IEEE spectral mask or EVM
9 OFDM
18 OFDM
36 OFDM
54 OFDM
MCS7 (MM)
Transmit center frequency accuracy
25
–25
(1) The edge channels (2412 and 2472 MHz) have reduced TX power to meet FCC emission limits.
(2) Power of 802.11b rates are reduced to meet ETSI requirements.
(3) In preregulated 1.85-V mode, maximum TX power is 0.25- to 0.75-dB lower for modulations higher than 18 OFDM.
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8.11 WLAN Filter Requirements
The device requires an external band-pass filter to meet the various emission standards, including FCC. 节
8.11.1 presents the attenuation requirements for the band-pass filter. TI recommends using the same filter used
in the reference design to ease the process of certification.
8.11.1 WLAN Filter Requirements
PARAMETER
FREQUENCY (MHz)
2412 to 2484
2412 to 2484
800 to 830
MIN
TYP
MAX
UNIT
dB
Return loss
Insertion loss(1)
10
1
45
25
48
50
25
25
35
45
25
50
1.5
dB
30
20
30
45
20
20
20
35
20
1600 to 1670
3200 to 3300
4000 to 4150
4800 to 5000
5600 to 5800
6400 to 6600
7200 to 7500
7500 to 10000
2412 to 2484
Bandpass
Attenuation
dB
Reference impendence
Filter type
Ω
(1) Insertion loss directly impacts output power and sensitivity. At customer discretion, insertion loss can be relaxed to meet attenuation
requirements.
8.12 Thermal Resistance Characteristics
8.12.1 Thermal Resistance Characteristics for RGK Package
AIR FLOW
PARAMETER
0 lfm (C/W)
150 lfm (C/W)
250 lfm (C/W)
500 lfm (C/W)
23
0.2
2.3
6.3
2.4
14.6
0.2
12.4
0.3
10.8
0.1
θja
Ψjt
2.3
2.2
2.4
Ψjb
θjc
θjb
8.13 Reset Requirement
PARAMETER
Operation mode level
Shutdown mode level(1)
MIN
TYP
0.65 × VBAT
0.6
MAX UNIT
VIH
VIL
V
V
0
5
Minimum time for nReset low for resetting the module
Rise and fall times
ms
µs
Tr and Tf
20
(1) The nRESET pin must be held below 0.6 V for the module to register a reset.
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8.14 Timing and Switching Characteristics
8.14.1 Power Supply Sequencing
For proper operation of the CC3120R device, perform the recommended power-up sequencing as follows:
1. Tie VBAT (pins 37, 39, 44) and VIO (pins 54 and 10) together on the board.
2. Hold the RESET pin low while the supplies are ramping up. TI recommends using a simple RC circuit (100 K
||, 1 µF, RC = 100 ms).
3. For an external RTC, ensure that the clock is stable before RESET is deasserted (high).
For timing diagrams, see 节8.14.3.
8.14.2 Device Reset
When a device restart is required, the user may either issue a negative pulse on the nHIB pin (pin 2) or on the
nRESET pin (pin 32), keeping the other pulled high, depending on the configuration of the platform. In case the
nRESET pin is used, the user must follow one of the two alternatives to ensure the reset is properly applied:
• A high-to-low reset pulse (on pin 32) of at least 200-ms duration
• If the above cannot be ensured, a pulldown resistor of 2 MΩ should be connected to pin 52 (RTC_XTAL_N).
If implemented, a shorter pulse of at least 100 µs can be used.
To ensure a proper reset sequence, the user has to call the sl_stop function prior to toggling the reset.
8.14.3 Reset Timing
8.14.3.1 nRESET (32-kHz Crystal)
图8-6 shows the reset timing diagram for the 32-kHz crystal first-time power-up and reset removal.
T2
T1
T3
VBAT
VIO
nRESET
nHIB
Device Ready to
serve API calls
POWER
OFF
RESET
HW INIT
FW INIT
STATE
32-kHz
XTAL
图8-6. First-Time Power-Up and Reset Removal Timing Diagram (32-kHz Crystal)
节8.14.3.2 describes the timing requirements for the crystal first-time power-up and reset removal.
8.14.3.2 First-Time Power-Up and Reset Removal Timing Requirements (32-kHz Crystal)
ITEM
NAME
DESCRIPTION
MIN
TYP
MAX
UNIT
ms
ms
s
Depends on application board
power supply, decoupling capacitor,
and so on
T1
T2
T3
Supply settling time
Hardware wake-up time
Initialization time
3
25
32-kHz crystal settling plus
firmware initialization time plus
radio calibration
1.35
8.14.3.3 nRESET (External 32-kHz)
图8-7 shows the reset timing diagram for the external 32-kHz first-time power-up and reset removal.
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T1
T2
T3
VBAT
VIO
nRESET
nHIB
POWER
OFF
Device Ready to
serve API calls
STATE
RESET
HW INIT
FW INIT
32-kHz
RTC CLK
图8-7. First-Time Power-Up and Reset Removal Timing Diagram (External 32-kHz)
节8.14.3.3.1 describes the timing requirements for the external first-time power-up and reset removal.
8.14.3.3.1 First-Time Power-Up and Reset Removal Timing Requirements (External 32-kHz)
ITEM
NAME
DESCRIPTION
MIN
TYP
MAX
UNIT
Depends on application board power
supply, decoupling capacitor, and so
on
T1
Supply settling time
3
ms
T2
T3
Hardware wake-up time
Initialization time
25
ms
ms
Firmware initialization time plus radio
calibration
250
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8.14.4 Wakeup From HIBERNATE Mode
图8-8 shows the timing diagram for wakeup from HIBERNATE mode.
T
T
wake_from_hib
hib_min
VBAT
VIO
nRESET
nHIB
ACTIVE
HIBERNATE
HW WAKEUP+FW INIT
ACTIVE
HIBERNATE
32-kHz
XTAL/CXO
图8-8. nHIB Timing Diagram
Note
The 32.768-kHz crystal is kept enabled by default when the chip goes into HIBERNATE mode in
response to nHIB being pulled low.
节8.14.4.1 节8.14.4.1 describes the timing requirements for nHIB.
8.14.4.1 nHIB Timing Requirements
ITEM
Thib_min
NAME
DESCRIPTION
MIN
TYP MAX
UNIT
Minimum hibernate time
Minimum pulse width of nHIB being low(2)
10
ms
Hardware wakeup time plus
firmware initialization time
Twake_from_hib
See(1)
50
ms
(1) If temperature changes by more than 20°C, initialization time from HIB can increase by 200 ms due to radio calibration.
(2) Ensure that the nHIB pulse width is kept above the minimum requirement under all conditions (such as power up, MCU reset, and so
on).
8.14.5 Clock Specifications
The CC3120R device requires two separate clocks for its operation:
• A slow clock running at 32.768 kHz is used for the RTC.
• A fast clock running at 40 MHz is used by the device for the internal processor and the WLAN subsystem.
The device features internal oscillators that enable the use of less-expensive crystals rather than dedicated
TCXOs for these clocks. The RTC can also be fed externally to provide reuse of an existing clock on the system
and to reduce overall cost.
8.14.5.1 Slow Clock Using Internal Oscillator
The RTC crystal connected on the device supplies the free-running slow clock. The accuracy of the slow clock
frequency must be 32.768 kHz ±150 ppm. In this mode of operation, the crystal is tied between RTC_XTAL_P
(pin 51) and RTC_XTAL_N (pin 52) with a suitable load capacitance to meet the ppm requirement.
图8-9 shows the crystal connections for the slow clock.
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51
RTC_XTAL_P
10 pF
GND
32.768 kHz
52
RTC_XTAL_N
10 pF
GND
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图8-9. RTC Crystal Connections
节8.14.5.1.1 lists the RTC crystal requirements.
8.14.5.1.1 RTC Crystal Requirements
CHARACTERISTICS
Frequency
TEST CONDITIONS
MIN
TYP
MAX
UNIT
kHz
ppm
kΩ
32.768
Frequency accuracy
Crystal ESR
Initial plus temperature plus aging
32.768 kHz
±150
70
8.14.5.2 Slow Clock Using an External Clock
When an RTC oscillator is present in the system, the CC3120R device can accept this clock directly as an input.
The clock is fed on the RTC_XTAL_P line, and the RTC_XTAL_N line is held to VIO. The clock must be a CMOS-
level clock compatible with VIO fed to the device.
图8-10 shows the external RTC input connection.
32.768 kHz
RTC_XTAL_P
Host system
VIO
100 KΩ
RTC_XTAL_N
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图8-10. External RTC Input
节8.14.5.2.1 lists the external RTC digital clock requirements.
8.14.5.2.1 External RTC Digital Clock Requirements
CHARACTERISTICS
Frequency
TEST CONDITIONS
MIN
TYP
MAX
UNIT
32768
Hz
Frequency accuracy
(Initial plus temperature plus aging)
±150
ppm
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CHARACTERISTICS
TEST CONDITIONS
MIN
TYP
MAX
UNIT
tr, tf
Input transition time tr, tf (10% to 90%)
Frequency input duty cycle
100
80%
ns
20%
50%
Vih
Vil
0.65 × VIO
VIO
V
Slow clock input voltage limits
Input impedance
Square wave, DC coupled
0
1
0.35 × VIO
Vpeak
MΩ
pF
5
8.14.5.3 Fast Clock (Fref) Using an External Crystal
The CC3120R device also incorporates an internal crystal oscillator to support a crystal-based fast clock. The
crystal is fed directly between WLAN_XTAL_P (pin 23) and WLAN_XTAL_N (pin 22) with suitable loading
capacitors.
图8-11 shows the crystal connections for the fast clock.
23
WLAN_XTAL_P
6.2 pF
GND
40 MHz
22
WLAN_XTAL_N
6.2 pF
GND
SWAS031-030
A. The crystal capacitance must be tuned to ensure that the PPM requirement is met. See CC31xx & CC32xx Frequency Tuning for
information on frequency tuning.
图8-11. Fast Clock Crystal Connections
节8.14.5.3.1 lists the WLAN fast-clock crystal requirements.
8.14.5.3.1 WLAN Fast-Clock Crystal Requirements
CHARACTERISTICS
TEST CONDITIONS
MIN
TYP
MAX
UNIT
MHz
ppm
Ω
Frequency
40
Frequency accuracy
Crystal ESR
Initial plus temperature plus aging
40 MHz
±25
60
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8.14.5.4 Fast Clock (Fref) Using an External Oscillator
The CC3120R device can accept an external TCXO/XO for the 40-MHz clock. In this mode of operation, the
clock is connected to WLAN_XTAL_P (pin 23). WLAN_XTAL_N (pin 22) is connected to GND. The external
TCXO/XO can be enabled by TCXO_EN (pin 21) from the device to optimize the power consumption of the
system.
If the TCXO does not have an enable input, an external LDO with an enable function can be used. Using the
LDO improves noise on the TCXO power supply.
图8-12 shows the connection.
Vcc
XO (40 MHz)
EN
CC3120R
TCXO_EN
82 pF
WLAN_XTAL_P
OUT
WLAN_XTAL_N
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图8-12. External TCXO Input
节8.14.5.4.1 lists the external Fref clock requirements.
8.14.5.4.1 External Fref Clock Requirements (–40°C to +85°C)
CHARACTERISTICS
Frequency
TEST CONDITIONS
MIN
TYP
MAX UNIT
40.00
MHz
Frequency accuracy (Initial plus temperature plus
aging)
±25 ppm
55%
Frequency input duty cycle
Clock voltage limits
45%
0.7
50%
Sine or clipped sine wave, AC
coupled
Vpp
1.2
Vpp
at 1 kHz
–125
–138.5
–143
Phase noise at 40 MHz
at 10 kHz
at 100 kHz
dBc/Hz
Resistance
Input impedance
12
kΩ
Capacitance
7
pF
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8.14.6 Interfaces
This section describes the interfaces that are supported by the CC3120R device:
• Host SPI
• Flash SPI
8.14.6.1 Host SPI Interface Timing
图8-13 shows the Host SPI interface timing diagram.
T2
CLK
T6
T7
MISO
MOSI
T9
T8
图8-13. Host SPI Interface Timing
节8.14.6.1.1 lists the Host SPI interface timing parameters.
8.14.6.1.1 Host SPI Interface Timing Parameters
PARAMETER
NUMBER
MIN
MAX
UNIT
Clock frequency at VBAT = 3.3 V
20
12
T1
F(1)
MHz
Clock frequency at VBAT ≤2.1 V
Clock period
(1) (2)
(1)
T2
T3
T4
T5
T6
T7
T8
T9
tclk
tLP
tHT
50
ns
ns
ns
Clock low period
25
25
(1)
Clock high period
Duty cycle
D(1)
45%
55%
(1)
tIS
tIH
RX data setup time
RX data hold time
TX data output delay
TX data hold time
4
4
ns
ns
ns
ns
(1)
(1)
(1)
tOD
tOH
20
24
(1) The timing parameter has a maximum load of 20 pF at 3.3 V.
(2) Ensure that nCS (active-low signal) is asserted 10 ns before the clock is toggled. The nCS can be deasserted 10 ns after the clock
edge.
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8.14.6.2 Flash SPI Interface Timing
图8-14 shows the Flash SPI interface timing diagram.
T2
CLK
T6
T7
MISO
MOSI
T9
T8
图8-14. Flash SPI Interface Timing
节8.14.6.2.1 lists the Flash SPI interface timing parameters.
8.14.6.2.1 Flash SPI Interface Timing Parameters
PARAMETER
NUMBER
MIN
MAX
UNIT
T1
T2
T3
T4
T5
T6
T7
T8
T9
F
Clock frequency
Clock period
20
MHz
ns
tclk
tLP
tHT
D
50
Clock low period
Clock high period
Duty cycle
25
25
ns
ns
45%
55%
tIS
RX data setup time
RX data hold time
TX data output delay
TX data hold time
1
2
ns
ns
ns
ns
tIH
tOD
tOH
8.5
8
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8.15 External Interfaces
8.15.1 SPI Flash Interface
The external serial Flash stores the user profiles and firmware patch updates. The CC3120R device acts as a
master in this case; the SPI serial Flash acts as the slave device. This interface can work up to a speed of 20
MHz.
图8-15 shows the SPI Flash interface.
CC3120R (master)
Serial Flash
FLASH_SPI_CLK
SPI_CLK
SPI_CS
FLASH_SPI_CS
FLASH_SPI_MISO
FLASH_SPI_MOSI
SPI_MISO
SPI_MOSI
图8-15. SPI Flash Interface
节8.15.1.1 lists the SPI Flash interface pins.
8.15.1.1 SPI Flash Interface
PIN NAME
FLASH_SPI_CLK
DESCRIPTION
Clock (up to 20 MHz) CC3120R device to serial Flash
CS signal from CC3120R device to serial Flash
Data from serial Flash to CC3120R device
FLASH_SPI_CS
FLASH_SPI_MISO
FLASH_SPI_MOSI
Data from CC3120R device to serial Flash
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8.15.2 SPI Host Interface
The device interfaces to an external host using the SPI interface. The CC3120R device can interrupt the host
using the HOST_INTR line to initiate the data transfer over the interface. The SPI host interface can work up to a
speed of 20 MHz.
图8-16 shows the SPI host interface.
CC3120R (slave)
MCU
HOST_SPI_CLK
SPI_CLK
SPI_nCS
SPI_MISO
SPI_MOSI
INTR
HOST_SPI_nCS
HOST_SPI_MISO
HOST_SPI_MOSI
HOST_INTR
nHIB
GPIO
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图8-16. SPI Host Interface
节8.15.2.1 lists the SPI host interface pins.
8.15.2.1 SPI Host Interface
PIN NAME
HOST_SPI_CLK
DESCRIPTION
Clock (up to 20 MHz) from MCU host to CC3120R device
CS (active low) signal from MCU host to CC3120R device
Data from MCU host to CC3120R device
HOST_SPI_nCS
HOST_SPI_MOSI
HOST_INTR
Interrupt from CC3120R device to MCU host
HOST_SPI_MISO
Data from CC3120R device to MCU host
Active-low signal that commands the CC3120R device to enter hibernate mode (lowest
power state)
nHIB
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8.15.3 Host UART Interface
The SimpleLink device requires the UART configuration described in 节8.15.3.1.
8.15.3.1 SimpleLink™ UART Configuration
PROPERTY
Baud rate
SUPPORTED CC3120R CONFIGURATION
115200 bps, no auto-baud rate detection, can be changed by the host up to 3 Mbps using a special command
Data bits
8 bits
Flow control
Parity
CTS/RTS
None
Stop bits
1
Bit order
LSBit first
Active high
Rising edge or level 1
Little-endian only(1)
Host interrupt polarity
Host interrupt mode
Endianness
(1) The SimpleLink device does not support automatic detection of the host length while using the UART interface.
8.15.3.2 5-Wire UART Topology
图 8-17 shows the typical 5-wire UART topology comprised of four standard UART lines plus one IRQ line from
the device to the host controller to allow efficient low-power mode.
nRTS
nCTS
TX
nRTS
nCTS
TX
HOST MCU
UART
CC3120R SL
UART
RX
RX
HOST_INTR(IRQ)
HOST_INTR(IRQ)
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图8-17. Typical 5-Wire UART Topology
This topology is recommended because the configuration offers the maximum communication reliability and
flexibility between the host and the SimpleLink device.
8.15.3.3 4-Wire UART Topology
The 4-wire UART topology eliminates the host IRQ line (see 图 8-18). Using this topology requires meeting one
of the following conditions:
• The host is always awake or active.
• The host goes to sleep, but the UART module has receiver start-edge detection for auto wakeup and does
not lose data.
nRTS
nCTS
TX
nRTS
nCTS
TX
HOST MCU
UART
CC3120R SL
UART
RX
RX
H_IRQ
H_IRQ
X
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图8-18. 4-Wire UART Configuration
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8.15.3.4 3-Wire UART Topology
The 3-wire UART topology requires only the following lines (see 图8-19):
• RX
• TX
• CTS
nRTS
nCTS
TX
nRTS
nCTS
X
HOST MCU
UART
CC3120R SL
UART
TX
RX
RX
H_IRQ
H_IRQ
X
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图8-19. 3-Wire UART Topology
Using this topology requires meeting one of the following conditions:
• The host always stays awake or active.
• The host goes to sleep but the UART module has receiver start-edge detection for auto-wake-up and does
not lose data.
• The host can always receive any amount of data transmitted by the SimpleLink device because there is no
flow control in this direction.
Because there is no full flow control, the host cannot stop the SimpleLink device to send its data; thus, the
following parameters must be carefully considered:
• Maximum baud rate
• RX character interrupt latency and low-level driver jitter buffer
• Time consumed by the user's application
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9 Detailed Description
The CC3120R Wi-Fi Internet-on-a-chip contains a dedicated Arm MCU that offloads many of the networking
activities from the host MCU. The device includes an 802.11b/g/n radio, baseband, and MAC with a powerful
crypto engine for a fast, secure WLAN and Internet connections with 256-bit encryption. The CC3120R device
supports station, AP, and Wi-Fi Direct modes. The device also supports WPA2 personal and enterprise security,
WPS 2.0, and WPA3 personal and enterprise security. The Wi-Fi network processor includes an embedded IPv6
and IPv4 TCP/IP stack.
9.1 Device Features
9.1.1 WLAN
The WLAN features are as follows:
• 802.11b/g/n integrated radio, modem, and MAC supporting WLAN communication as a BSS station, AP, Wi-
Fi Direct client and group owner with CCK and OFDM rates in the 2.4-GHz ISM band, channels 1 to 13.
Note
802.11n is supported only in Wi-Fi station, Wi-Fi direct, and P2P client mode
• Autocalibrated radio with a single-ended 50-Ωinterface enables easy connection to the antenna without
requiring expertise in radio circuit design.
• Advanced connection manager with multiple user-configurable profiles stored in serial Flash allows automatic
fast connection to an access point without user or host intervention.
• Supports all common Wi-Fi security modes for personal and enterprise networks with on-chip security
accelerators, including: WEP, WPA/WPA2 PSK, WPA2 Enterprise (802.1x), WPA3 Personal, and WPA3
Enterprise.
• Smart provisioning options deeply integrated within the device providing a comprehensive end-to-end
solution. With elaborate events notification to the host, enabling the application to control the provisioning
decision flow. The wide variety of Wi-Fi provisioning methods include:
– Access Point using HTTPS
– SmartConfig Technology: a 1-step, 1-time process to connect a CC3120R-enabled device to the home
wireless network, removing dependency on the I/O capabilities of the host MCU; thus, it is usable by
deeply embedded applications
• 802.11 transceiver mode allows transmitting and receiving of proprietary data through a socket without
adding MAC or PHY headers. The 802.11 transceiver mode provides the option to select the working
channel, rate, and transmitted power. The receiver mode works with the filtering options.
9.1.2 Network Stack
The Network Stack features are as follows:
• Integrated IPv4, IPv6 TCP/IP stack with BSD (BSD adjacent) socket APIs for simple Internet connectivity with
any MCU, microprocessor, or ASIC
Note
Not all APIs are 100% BSD compliant. Not all BSD APIs are supported.
• Support of 16 simultaneous TCP, UDP, or RAW sockets
• Support of 6 simultaneous SSL\TLS sockets
• Built-in network protocols:
– Static IP, LLA, DHCPv4, DHCPv6 with DAD and stateless autoconfiguration
– ARP, ICMPv4, IGMP, ICMPv6, MLD, ND
– DNS client for easy connection to the local network and the Internet
• Built-in network application and utilities:
– HTTP/HTTPS
• Web page content stored on serial Flash
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• RESTful APIs for setting and configuring application content
• Dynamic user callbacks
– Service discovery: Multicast DNS service discovery lets a client advertise its service without a centralized
server. After connecting to the access point, the CC3120R device provides critical information, such as
device name, IP, vendor, and port number.
– DHCP server
– Ping
表9-1 summarizes the NWP features.
表9-1. NWP Features
Feature
Description
802.11b/g/n station
Wi-Fi standards
802.11b/g AP supporting up to four stations
Wi-Fi Direct client and group owner
Channels 1 to 13
Wi-Fi
Wi-Fi security
Wi-Fi provisioning
IP protocols
IP addressing
Cross layer
WEP, WPA/WPA2 PSK, WPA2 enterprise (802.1x), WPA3 personal and enterprise
SmartConfig technology, Wi-Fi protected setup (WPS2), AP mode with internal HTTP/HTTPS web server
IPv4/IPv6
Static IP, LLA, DHCPv4, DHCPv6 (Stateful) with DAD and stateless auto configuration
ARP, ICMPv4, IGMP, ICMPv6, MLD, NDP
UDP, TCP
Transport
SSLv3.0/TLSv1.0/TLSv1.1/TLSv1.2
RAW IP
Ping
HTTP/HTTPS web server
Network applications and
utilities
mDNS
DNS-SD
DHCP server
Host interface
Security
UART/SPI
Device identity
Trusted root-certificate catalog
TI root-of-trust public key
Power management
Other
Enhanced power policy management uses 802.11 power save and deep sleep power modes
RF Transceiver
Programmable RX Filters with Events trigger mechanism including WoWLAN
Recovery mechanism –Restore to factory default
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9.1.3 Security
The SimpleLink Wi-Fi CC3120R Internet-on-a-chip device enhances the security capabilities available for
development of IoT devices, while completely offloading these activities from the MCU to the networking
subsystem. The security capabilities include the following key features:
Wi-Fi and Internet Security:
• Personal and enterprise Wi-Fi security
– Personal standards
• AES (WPA2-PSK)
• TKIP (WPA-PSK)
• WEP
– Enterprise standards
• EAP Fast
• EAP PEAPv0 MSCHAPv2
• EAP PEAPv0 TLS
• EAP PEAPv1 TLS EAP LS
• EAP TTLS TLS
• EAP TTLS MSCHAPv2
• Secure sockets
– Protocol versions: SSL v3/TLS 1.0/TLS 1.1/TLS 1.2
– On-chip powerful crypto engine for fast, secure Wi-Fi and internet connections with 256-bit AES
encryption for TLS and SSL connections
– Ciphers suites
• SL_SEC_MASK_SSL_RSA_WITH_RC4_128_SHA
• SL_SEC_MASK_SSL_RSA_WITH_RC4_128_MD5
• SL_SEC_MASK_TLS_RSA_WITH_AES_256_CBC_SHA
• SL_SEC_MASK_TLS_DHE_RSA_WITH_AES_256_CBC_SHA
• SL_SEC_MASK_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA
• SL_SEC_MASK_TLS_ECDHE_RSA_WITH_RC4_128_SHA
• SL_SEC_MASK_TLS_RSA_WITH_AES_128_CBC_SHA256
• SL_SEC_MASK_TLS_RSA_WITH_AES_256_CBC_SHA256
• SL_SEC_MASK_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256
• SL_SEC_MASK_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256
• SL_SEC_MASK_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA
• SL_SEC_MASK_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA
• SL_SEC_MASK_TLS_RSA_WITH_AES_128_GCM_SHA256
• SL_SEC_MASK_TLS_RSA_WITH_AES_256_GCM_SHA384
• SL_SEC_MASK_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256
• SL_SEC_MASK_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384
• SL_SEC_MASK_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256
• SL_SEC_MASK_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384
• SL_SEC_MASK_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256
• SL_SEC_MASK_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384
• SL_SEC_MASK_TLS_ECDHE_ECDSA_WITH_CHACHA20_POLY1305_SHA256
• SL_SEC_MASK_TLS_ECDHE_RSA_WITH_CHACHA20_POLY1305_SHA256
• SL_SEC_MASK_TLS_DHE_RSA_WITH_CHACHA20_POLY1305_SHA256
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– Server authentication
– Client authentication
– Domain name verification
– Socket upgrade to secure socket –STARTTLS
• Secure HTTP server (HTTPS)
• The Trusted root-certificate catalog verifies that the CA used by the application is trusted and known secure
content delivery
• The TI root-of-trust public key is a hardware-based mechanism that allows authenticating TI as the genuine
origin of a given content using asymmetric keys
• Secure content delivery allows file transfer to the system in a secure way on any unsecured tunnel
Code and Data Security:
• Secured network information: Network passwords and certificates are encrypted
• Secured and authenticated service pack: SP is signed based on TI certificate
9.1.4 Host Interface and Driver
• Interfaces over a 4-wire serial peripheral interface (SPI) with any MCU or a processor at a clock speed of 20
MHz.
• Interfaces over UART with any MCU with a baud rate up to 3 Mbps. A low footprint driver is provided for TI
MCUs and is easily ported to any processor or ASIC.
• Simple APIs enable easy integration with any single-threaded or multithreaded application.
9.1.5 System
• Works from a single preregulated power supply or connects directly to a battery
• Ultra-low leakage when disabled (hibernate mode) with a current of less than 4 µA with the RTC running
• Integrated clock sources
9.2 Power-Management Subsystem
The CC3120R power-management subsystem contains DC/DC converters to accommodate the different voltage
or current requirements of the system.
• Digital DC/DC (Pin 44)
– Input: VBAT wide voltage (2.1 to 3.6 V) or preregulated 1.85 V
• ANA1 DC/DC (Pin 38)
– Input: VBAT wide voltage (2.1 to 3.6 V)
– In preregulated 1.85-V mode, the ANA1 DC/DC converter is bypassed.
• PA DC/DC (Pin 39)
– Input: VBAT wide voltage (2.1 to 3.6 V)
– In preregulated 1.85-V mode, the PA DC/DC converter is bypassed.
The CC3120R device is a single-chip WLAN radio solution used on an embedded system with a wide-voltage
supply range. The internal power management, including DC/DC converters and LDOs, generates all of the
voltages required for the device to operate from a wide variety of input sources. For maximum flexibility, the
device can operate in the modes described in 节9.2.1 and 节9.2.2.
9.2.1 VBAT Wide-Voltage Connection
In the wide-voltage battery connection, the device is powered directly by the battery or preregulated 3.3-V
supply . All other voltages required to operate the device are generated internally by the DC/DC converters. This
scheme supports wide-voltage operation from 2.1 to 3.6 V and is thus the most common mode for the device.
9.2.2 Preregulated 1.85V
The preregulated 1.85-V mode of operation applies an external regulated 1.85 V directly at pins 10, 25, 33, 36,
37, 39, 44, 48, and 54 of the device. The VBAT and the VIO are also connected to the 1.85-V supply. This mode
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provides the lowest BOM count version in which inductors used for PA DC/DC and ANA1 DC/DC (2.2 and 1 µH)
and a capacitor (22 µF) can be avoided.
In the preregulated 1.85-V mode, the regulator providing the 1.85 V must have the following characteristics:
• Load current capacity ≥900 mA
• Line and load regulation with <2% ripple with 500-mA step current and settling time of < 4 µs with the load
step
Note
The regulator must be placed as close as possible to the device so that the IR drop to the device is
very low.
9.3 Low-Power Operating Modes
This section describes the low-power modes supported by the device to optimize battery life.
9.3.1 Low-Power Deep Sleep
The low-power deep-sleep (LPDS) mode is an energy-efficient and transparent sleep mode that is entered
automatically during periods of inactivity based on internal power optimization algorithms. The device can wake
up in less than 3 ms from the internal timer or from any incoming host command. Typical battery drain in this
mode is 115 µA. During LPDS mode, the device retains the software state and certain configuration information.
The operation is transparent to the external host; thus, no additional handshake is required to enter or exit LPDS
mode.
9.3.2 Hibernate
The hibernate mode is the lowest power mode in which all of the digital logic is power-gated. Only a small
section of the logic powered directly by the main input supply is retained. The RTC is kept running and the
device wakes up once the nHIB line is asserted by the host driver. The wake-up time is longer than LPDS mode
at approximately 50 ms. The typical battery drain in this mode is 4.5 µA.
Note
Wake-up time can be extended depending on the service-pack size.
9.3.3 Shutdown
The shutdown mode is the lowest power-mode system-wise. All device logics are off, including the real-time
clock (RTC). The wake-up time in this mode is longer than hibernate at approximately 1.1 s. The typical battery
drain in this mode is 1 µA.
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9.4 Memory
9.4.1 External Memory Requirements
The CC3120R device maintains a proprietary file system on the serial flash. The CC3120R file system stores the
service pack file, system files, configuration files, certificate files, web page files, and user files. By using a
format command through the API, users can provide the total size allocated for the file system. The starting
address of the file system cannot be set and is always at the beginning of the serial flash. The applications
microcontroller must access the serial flash memory area allocated to the file system directly through the
CC3120R file system. The applications microcontroller must not access the serial flash memory area directly.
The file system manages the allocation of serial flash blocks for stored files according to download order, which
means that the location of a specific file is not fixed in all systems. Files are stored on serial flash using human-
readable filenames rather than file IDs. The file system API works using plain text, and file encryption and
decryption is invisible to the user. Encrypted files can be accessed only through the file system.
All file types can have a maximum of 100 supported files in the file system. All files are stored in 4-KB blocks and
thus use a minimum of 4KB of Flash space. Fail-safe files require twice the original size and use a minimum of
8KB. Encrypted files are counted as fail-safe in terms of space. The maximum file size is 1MB.
表9-2 lists the minimum required memory consumption under the following assumptions:
• System files in use consume 64 blocks (256KB).
• Vendor files are not taken into account.
• Gang image:
– Storage for the gang image is rounded up to 32 blocks (meaning 128KB resolution).
– Gang image size depends on the actual content size of all components. Additionally, the image should be
128KB aligned so unaligned memory is considered lost. Service pack, system files, and the 128KB
aligned memory are assumed to occupy 256KB.
• All calculations consider that the restore-to-default is enabled.
表9-2. Recommended Flash Size
ITEM
File system allocation table
System and configuration files
Service Pack
CC3120 [KB]
20
256
264
Gang image size
256
Total
796
Minimal Flash size
Recommended Flash size
8MBit
16MBit
Note
The maximum supported serial flash size is 32MB (256Mb). See the Using Serial Flash on CC3120/
CC3220 SimpleLink™ Wi-Fi® and Internet-of-Things Devices application report.
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9.5 Restoring Factory Default Configuration
The device has an internal recovery mechanism that allows rolling back the file system to its predefined factory
image or restoring the factory default parameters of the device. The factory image is kept in a separate sector on
the serial flash in a secure manner and cannot be accessed from the host processor. The following restore
modes are supported:
• None—no factory restore settings
• Enable restore of factory default parameters
• Enable restore of factory image and factory default parameters
The restore process is performed by pulling or forcing SOP[2:0] = 110 pins and toggling the nRESET pin from
low to high.
The process is fail-safe and resumes operation if a power failure occurs before the restore is finished. The
restore process typically takes about 8 seconds, depending on the attributes of the serial Flash vendor.
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10 Applications, Implementation, and Layout
Note
以下应用部分中的信息不属于TI 器件规格的范围,TI 不担保其准确性和完整性。TI 的客 户应负责确定
器件是否适用于其应用。客户应验证并测试其设计,以确保系统功能。
10.1 Application Information
10.1.1 Typical Application—CC3120R Wide-Voltage Mode
图 10-1 shows the typical application schematic using the CC3120R device in the wide-voltage mode of
operation. For a full operation reference design, refer to the BoosterPack that uses the CC3120R device (see
CC3120 SimpleLink™ and Internet of Things Hardware Design Files).
表10-1 lists the bill of materials for an application using the CC3120R device in wide-voltage mode.
Antenna match. Pi
network might be
E1
required depending on
type of antenna.
Optional:
Consider adding extra decoupling
capacitors if the battery cannot source
the peak currents.
L1
FL1
IN
VBAT_CC
1
3
OUT
50Ohm
3.3nH
VBA T_CC
2
4
GND
GND
C1
0.5pF
GNDGND
VBAT_CC
#10
#37
#39
#44
#54
GND
GND
U1
C2
100µF
C3
100µF
8
C4
C5
C6
4.7µF
C8
0.1µF
C7
0.1µF
VCC
R1
10k
4.7µF
4.7µF
1
6
5
2
3
7
CS
SCLK
SI/SIO0
C9
0.1µF
VBAT_CC
GND
GND
GND
GND
U2
GND
GND
GND
SO/SIO1
WP/SIO2
RESET/SIO3
R2
100k
4
GND
GND
VDD_FL
VDD_ANA
48
47
33
9
31
11
VBAT_CC
GND
VDD_ANA1
VDD_ANA2
VDD_PA_IN
VDD_DIG1
VDD_DIG2
VDD_PLL
RF_BG
VDD_PA
VDD_DIG_CC
SFL_CLK
C10
10µF
C11
0.1µF
FLASH_SPI_CLK
FLASH _SPI_CS
14 SFL_CS
SFL_MISO
12 SFL_MOSI
56
24
13
FLASH _SPI_MISO
FLASH_SPI_MOSI
VDD_PLL
R3
100k
R4
100k
VDD_RAM 49
VDD_RAM
GND
GND
VBAT_CC
C12
1µF
C13
C14
C15
C16
61
50
55
57
CC_UART1_CTS
CC_UART1_RTS
CC_UART1_TX
CC_UART1_RX
UART1_CTS
UART1_RTS
UART1_TX
UART1_RX
CC_UART1_CTS
CC_UART1_RTS
CC_UART1_TX
CC_UART1_RX
0.1µF
0.1µF
37
0.1µF
0.1µF
Flash Programming
Control
/ Host
VIN_DCDC_ANA
VIN_DCDC_PA
VIN_DCDC_DIG
VIN_IO1
39
44
10
54
GND GND
GND
GND
GND
VIN_IO2
58
59
60
62
L2
TEST_58
TEST_59
TEST_60
TEST_62
R62 is needed only if
UART is used as host
interface.
R5
100k
CC_WL_UART_TX
CC_NWP_UART_TX
TP1
TP2
38
DCDC_ANA_SW
2.2uH
36
25
LDO_IN1
LDO_IN2
GND
L3
PA_SWP
PA_SWN 41
40
4
DCDC_PA_SW_P
DCDC_PA_SW_N
DCDC_PA_OUT
NC
C17
10µF
C19
0.1µF
C18
0.1µF
VDD_PA
42
5
CC_SPI_CLK
CC_SPI_CS
CC_SPI_DOUT
CC_SPI_DIN
CC_IRQ
L4
HOST_SPI_CLK
HOST_SPI_CS
HOST_SPI_MISO
HOST_SPI_MOSI
HOST_INTR
CC_SPI_CLK
8
7
HOST INTERFACE
CC_SPI_CS
CC_SPI_DOUT
CC_SPI_DIN
CC_IRQ
GND
GND
GND
43
C21
22µF
DCDC_DIG_SW
C20
22µF
6
(Ensure the nHIB line does
not float at any time.)
C22
10µF
2.2uH
45
46
15
2
DCDC_ANA2_SW_P
DCDC_ANA2_SW_N
CC_nHIB
HIB
CC_nHIB
R6
GND
GND
GND
C23
RTC_XTAL_N
RTC_XTAL_P
52
51
23
R7
100k
100k
RTC_XTAL_N
RTC_XTAL_P
WLAN_XTAL_P
WLAN_XTAL_N
WLAN_XTAL_P
WLAN_XTAL_N
10pF
C24
Y1
32.768kHz
GND
22
GND
1
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
VBAT_CC
35
34
21
16
17
18
20
26
27
28
53
63
64
GND
SOP0
SOP1
SOP2/TCXO_EN
10pF
R14
1.0k
Y2
40 MHz
J1
C25
6.2pF
2
1
3
5
32
RESET
4
6
C26
6.2pF
3
19
29
30
RESERVED
RESERVED
RESERVED
RESERVED
VBAT_CC
R12
65
PAD
GND
CC3120RNMRGK
GND
R9
100k
R10
100k
R11
2.7K
GND
100k
GND
GND
R13
100k
C27
0.1µF
GND
GND
图10-1. CC3120R Wide-Voltage Mode Application Circuit
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表10-1. Bill of Materials for CC3120R in Wide-Voltage Mode
QUANTI
TY
MANUFACTUR
ER
DESIGNATOR
C1
VALUE
PART NUMBER
DESCRIPTION
GRM1555C1HR50BA01 Capacitor, Ceramic, 0.5 pF, 50 V, ±20%, C0G/NP0,
1
0.5 pF
Murata
D
0402
Capacitor, Ceramic, 100 µF, 10 V, ±20%, X5R,
AEC-Q200 Grade 3, 1210
2
3
C2, C3
100 µF
4.7 µF
Taiyo Yuden
TDK
LMK325ABJ107MMHT
C1005X5R0J475M050B Capacitor, Ceramic, 4.7 µF, 6.3 V, ±20%, X5R,
C4, C5, C6
C
0402
C7, C8, C9, C11,
C13, C14, C15,
C16, C18, C19,
C27
C1005X5R1A104K050B
A
11
0.1 µF
TDK
Capacitor, Ceramic, 0.1 µF, 10 V, ±10%, X5R, 0402
GRM188R60J106ME47
D
3
1
2
2
2
C10, C17, C22
C12
10 µF
1 µF
Murata
TDK
Capacitor, Ceramic, 10 µF, 6.3 V, ±20%, X5R, 0603
Capacitor, Ceramic, 1 µF, 10 V, ±10%, X5R, 0402
Capacitor, Ceramic, 22 µF, 4 V, ±20%, X5R, 0603
C1005X5R1A105K050B
B
C1608X5R0G226M080A
A
C20, C21
C23, C24
C25, C26
22 µF
10 pF
6.2 pF
TDK
Johanson
Technology
Capacitor, Ceramic, 10 pF, 50 V, ±5%, C0G/NP0,
0402
500R07S100JV4T
GRM1555C1H6R2CA01 Capacitor, Ceramic, 6.2 pF, 50 V, ±5%, C0G/NP0,
D
Murata
0402
2.45-
GHz
1
E1
Taiyo Yuden
AH316M245001-T
ANT Bluetooth W-LAN Zigbee® WiMAX™, SMD
Antenna
DEA202450BT-1294C1- Multilayer Chip Band Pass Filter For 2.4GHz W-
1
1
2
1
FL1
L1
1.02 dB TDK
H
LAN/Bluetooth, SMD
Inductor, Multilayer, Air Core, 3.3 nH, 0.3 A, 0.17
ohm, SMD
3.3 nH
2.2 µH
1 µH
Murata
LQG15HS3N3S02D
Inductor, Multilayer, Ferrite, 2.2 µH, 1.3 A, 0.08
ohm, SMD
L2, L4
L3
Murata
Murata
LQM2HPN2R2MG0L
LQM2HPN1R0MG0L
Inductor, Multilayer, Ferrite, 1 µH, 1.6 A, 0.055 ohm,
SMD
1
1
R1
10 k
Vishay-Dale
Vishay-Dale
CRCW040210K0JNED RES, 10 k, 5%, 0.063 W, 0402
CRCW04022K70JNED RES, 2.7 k, 5%, 0.063 W, 0402
R11
2.7 k
R2, R3, R4, R5,
R6, R7, R9, R10,
R12, R13
10
1
100 k
1.0 k
Vishay-Dale
CRCW0402100KJNED RES, 100 k, 5%, 0.063 W, 0402
CRCW04021K00JNED RES, 1.0 k, 5%, 0.063 W, 0402
R14
Vishay-Dale
Macronix
Ultra-Low Power, 16-Mbit [x 1/x 2/x 4] CMOS
MXSMIO
(Serial Multi I/O) Flash Memory, SOP-8
1
U1
MX25R International Co., MX25R1635FM1IL0
LTD
SimpleLink™ Wi-Fi® Network Processor, internet-
of-things Solution for MCU Applications,
RGK0064B
Texas
Instruments
1
U2
CC3120
CC3120RNMRGK
Abracon
Corporation
1
1
Y1
Y2
Crystal
Crystal
ABS07-32.768KHZ-9-T CRYSTAL, 32.768 kHz, 9 pF, SMD
Epson
Q24FA20H0039600
Crystal, 40 MHz, 8 pF, SMD
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10.1.2 Typical Application Schematic—CC3120R Preregulated, 1.85-V Mode
图 10-2 shows the typical application schematic using the CC3120R in preregulated, 1.85-V mode of operation.
For addition information on this mode of operation please contact your TI representative.
Antenna match. Pi
network might be
E1
required depending on
type of antenna.
Optional:
Consider adding extra decoupling
capacitors if the battery cannot source
the peak currents.
L1
FL1
IN
1.85V
1
3
OUT
50Ohm
3.3nH
1.85V
2
4
GND
GND
C1
0.5pF
GNDGND
1.85V
1.85V
#10
#37
#39
#44
#54
GND
GND
U1
C2
100µF
C3
100µF
8
C4
C5
C6
4.7µF
C8
0.1µF
C7
0.1µF
VCC
R1
10k
4.7µF
4.7µF
1
6
5
2
3
7
CS
SCLK
SI/SIO0
C9
0.1µF
C10
GND
GND
GND
GND
U2
GND
GND
GND
SO/SIO1
WP/SIO2
RESET/SIO3
10µF
R2
100k
4
GND
GND
GND
48
47
33
9
31
11
1.85V
GND
VDD_ANA1
VDD_ANA2
VDD_PA_IN
VDD_DIG1
VDD_DIG2
VDD_PLL
RF_BG
SFL_CLK
FLASH_SPI_CLK
FLASH _SPI_CS
14 SFL_CS
SFL_MISO
13
12 SFL_MOSI
56
24
49
FLASH _SPI_MISO
FLASH_SPI_MOSI
R3
100k
R4
100k
VDD_RAM
1.85V
C12
1µF
C11
0.1µF
C14
C15
C13
VBAT_CC
61
50
55
57
CC_UART1_CTS
CC_UART1_RTS
CC_UART1_TX
CC_UART1_RX
UART1_CTS
UART1_RTS
UART1_TX
UART1_RX
CC_UART1_CTS
CC_UART1_RTS
CC_UART1_TX
CC_UART1_RX
0.1µF
22µF
0.1µF
Flash Programming
Control
/ Host
37
39
44
10
54
VIN_DCDC_ANA
VIN_DCDC_PA
VIN_DCDC_DIG
VIN_IO1
GND
GND
GND GND
GND
VIN_IO2
58
59
60
62
TEST_58
TEST_59
TEST_60
TEST_62
R62 is needed only if
UART is used as host
interface.
R5
100k
CC_WL_UART_TX
CC_NWP_UART_TX
TP1
TP1
38
DCDC_ANA_SW
36
25
LDO_IN1
LDO_IN2
GND
40
41
42
4
DCDC_PA_SW_P
DCDC_PA_SW_N
DCDC_PA_OUT
NC
C16
0.1µF
C17
0.1µF
5
CC_SPI_CLK
CC_SPI_CS
CC_SPI_DOUT
CC_SPI_DIN
CC_IRQ
L2
HOST_SPI_CLK
HOST_SPI_CS
HOST_SPI_MISO
HOST_SPI_MOSI
HOST_INTR
CC_SPI_CLK
CC_SPI_CS
CC_SPI_DOUT
CC_SPI_DIN
CC_IRQ
8
7
HOST INTERFACE
GND
GND
43
DCDC_DIG_SW
6
(Ensure the nHIB line does
not float at any time.)
C18
C19
C20
10µF
2.2uH
45
46
15
2
DCDC_ANA2_SW_P
DCDC_ANA2_SW_N
0.1µF
0.1µF
CC_nHIB
C21
HIB
CC_nHIB
R6
10pF
C22
Y1
32.768kHz
GND
GND
GND
52
51
23
22
R7
100k
100k
RTC_XTAL_N
RTC_XTAL_P
WLAN_XTAL_P
WLAN_XTAL_N
GND
GND
10pF
1
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
VBAT_CC
35
34
21
16
17
18
20
26
27
28
53
63
64
GND
SOP0
SOP1
SOP2/TCXO_EN
R13
1.0k
Y2
40 MHz
J1
C23
6.2pF
2
4
6
1
3
5
32
RESET
C24
6.2pF
3
19
29
30
RESERVED
RESERVED
RESERVED
RESERVED
R8
100k
R9
100k
R10
2.7K
1.85V
65
PAD
GND
CC3120RNMARGKR
GND
GND
R11
100k
GND
R12
100k
GND
C25
0.1µF
GND
GND
图10-2. CC3120R Preregulated 1.85-V Mode Application Circuit
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表10-2 lists the bill of materials for an application using the CC3120R device in preregulated 1.85-V mode.
表10-2. Bill of Materials for CC3120R in Preregulated, 1.85-V Mode
QUANTI
TY
MANUFACTURE
R
DESIGNATOR
VALUE
PART NUMBER
DESCRIPTION
GRM1555C1HR50BA Capacitor, Ceramic, 0.5 pF, 50 V, ±20%, C0G/NP0,
1
C1
0.5 pF
MuRata
Taiyo Yuden
TDK
01D
0402
Capacitor, Ceramic, 100 µF, 10 V, ±20%, X5R, AEC-
Q200 Grade 3, 1210
2
3
C2, C3
100 µF
4.7 µF
LMK325ABJ107MMHT
C1005X5R0J475M050 Capacitor, Ceramic, 4.7 µF, 6.3 V, ±20%, X5R, 0402
BC
C4, C5, C6
C7, C8, C9, C11,
C14, C15, C16,
C17, C18, C19, C25
Capacitor, Ceramic, 0.1 µF, 10 V, ±10%, X5R, 0402
C1005X5R1A104K050
BA
11
0.1 µF
TDK
GRM188R60J106ME4 Capacitor, Ceramic, 10 µF, 6.3 V, ±20%, X5R, 0603
7D
2
1
1
2
2
C10, C20
C12
10 µF
1 µF
MuRata
TDK
C1005X5R1A105K050 Capacitor, Ceramic, 1 µF, 10 V, ±10%, X5R, 0402
BB
C1608X5R0G226M08 Capacitor, Ceramic, 22 µF, 4 V, ±20%, X5R, 0603
0AA
C13
22 µF
10 pF
6.2 pF
TDK
Johanson
Technology
Capacitor, Ceramic, 10 pF, 50 V, ±5%, C0G/NP0,
C21, C22
C23, C24
500R07S100JV4T
0402
GRM1555C1H6R2CA Capacitor, Ceramic, 6.2 pF, 50 V, ±5%, C0G/NP0,
MuRata
01D
0402
2.45-
ANT Bluetooth W-LAN Zigbee® WiMAX™, SMD
1
E1
GHz
Taiyo Yuden
AH316M245001-T
Antenna
DEA202450BT-1294C Multilayer Chip Band Pass Filter For 2.4-GHz W-
1
1
1
1
FL1
L1
1.02 dB TDK
1-H
LAN/Bluetooth, SMD
Inductor, Multilayer, Air Core, 3.3 nH, 0.3 A, 0.17
ohm, SMD
3.3 nH
2.2 µH
10 k
MuRata
LQG15HS3N3S02D
Inductor, Multilayer, Ferrite, 2.2 µH, 1.3 A, 0.08 ohm,
SMD
L2
MuRata
LQM2HPN2R2MG0L
CRCW040210K0JNE Resistor, 10 k, 5%, 0.063 W, 0402
D
R1
Vishay-Dale
R2, R3, R4, R5, R6,
R7, R8, R9, R11,
R12
Resistor, 100 k, 5%, 0.063 W, 0402
CRCW0402100KJNE
D
10
100 k
Vishay-Dale
Vishay-Dale
CRCW04022K70JNE Resistor, 2.7 k, 5%, 0.063 W, 0402
D
1
1
R10
R13
2.7 k
1.0 k
CRCW04021K00JNE
Vishay-Dale
Macronix
Resistor, 1.0 k, 5%, 0.063 W, 0402
D
Ultra-Low Power, 16M-BIT [x 1/x 2/x 4] CMOS
1
1
U1
U2
MX25R International Co., MX25R1635FM1IL0
LTD
MXSMIO
(Serial Multi I/O) Flash Memory, SOP-8
Texas
SimpleLink™ Wi-Fi®Network Processor, internet-of-
things Solution for MCU Applications, RGK0064B
CC3120
CC3120RNMRGK
Instruments
Abracon
Corportation
ABS07-32.768KHZ-9- Crystal, 32.768 kHz, 9 pF, SMD
T
1
1
Y1
Y2
Crystal
Crystal
Epson
Q24FA20H0039600
Crystal, 40 MHz, 8 pF, SMD
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10.2 PCB Layout Guidelines
This section details the PCB guidelines to speed up the PCB design using the CC3120R VQFN device. Follow
these guidelines ensures that the design will minimize the risk with regulatory certifications including FCC, ETSI,
and CE. For more information, see CC3120 and CC3220 SimpleLink™ Wi-Fi® and IoT Solution Layout
Guidelines.
10.2.1 General PCB Guidelines
Use the following PCB guidelines:
• Verify the recommended PCB stackup in the PCB design guidelines, as well as the recommended layers for
signals and ground.
• Ensure that the PCB footprint of the VQFN follows the information in .
• Ensure that the GND and solder paste of the VQFN PCB follow the recommendations provided in CC3120
and CC3220 SimpleLink™ Wi-Fi® and IoT Solution Layout Guidelines.
• Decoupling capacitors must be as close as possible to the VQFN device.
10.2.2 Power Layout and Routing
Three critical DC/DC converters must be considered for the CC3120R device.
• Analog DC/DC converter
• PA DC/DC converter
• Digital DC/DC converter
Each converter requires an external inductor and capacitor that must be laid out with care. DC current loops are
formed when laying out the power components.
10.2.2.1 Design Considerations
The following design guidelines must be followed when laying out the CC3120R device:
• Route all of the input decoupling capacitors (C11, C13, and C18) on L2 using thick traces, to isolate the RF
ground from the noisy supply ground. This step is also required to meet the IEEE spectral mask
specifications.
• Maintain the thickness of power traces to be greater than 12 mils. Take special consideration for power
amplifier supply lines (pins 33, 40, 41, and 42), and all input supply pins (pins 37, 39, and 44).
• Ensure the shortest grounding loop for the PLL supply decoupling capacitor (pin 24).
• Place all decoupling capacitors as close to the respective pins as possible.
• Power budget: The CC3120R device can consume up to 450 mA for 3.3 V, 670 mA for 2.1 V, and 700 mA for
1.85 V, for 24 ms during the calibration cycle.
• Ensure the power supply is designed to source this current without any issues. The complete calibration (TX
and RX) can take up to 17 mJ of energy from the battery over a time of 24 ms.
• The CC3120R device contains many high-current input pins. Ensure the trace feeding these pins is capable
of handling the following currents:
– VIN_DCDC_PA input (pin 39) maximum is 1 A
– VIN_DCDC_ANA input (pin 37) maximum is 600 mA
– VIN_DCDC_DIG input (pin 44) maximum is 500 mA
– DCDC_PA_SW_P (pin 40) and DCDC_PA_SW_N (pin 41) switching nodes maximum is 1 A
– DCDC_PA_OUT output node (pin 42) maximum 1 A
– DCDC_ANA_SW switching node (pin 38) maximum is 600 mA
– DCDC_DIG_SW switching node (pin 43) maximum is 500 mA
– VDD_PA_IN supply (pin 33) maximum is 500 mA
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图10-3 shows the ground routing for the input decoupling capacitors.
图10-3. Ground Routing for the Input Decoupling Capacitors
The ground return for the input capacitors are routed on L2 to reduce the EMI and improve the spectral mask.
This routing must be strictly followed because it is critical for the overall performance of the device.
10.2.3 Clock Interfaces
The following guidelines are for the slow clock.
• The 32.768-kHz crystal must be placed close to the VQFN package.
• Ensure that the load capacitance is tuned according to the board parasitics to the frequency tolerance is
within ±150 ppm.
• The ground plane on layer two is solid below the trace lanes and there is ground around these traces on the
top layer.
The following guidelines are for the fast clock.
• The 40-MHz crystal must be placed close to the VQFN package.
• Ensure that he load capacitance is tuned according to the board parasitics to the frequency tolerance is
within ±100 ppm at room temperature. The total frequency across parts, temperature, and with aging, must
be ±25 ppm to meet the WLAN specification.
• Ensure that no high-frequency lines are routed close to the crystal routing to avoid noise degradation.
• Ensure that crystal tuning capacitors are close to the crystal pads.
• Make both traces (XTAL_N and XTAL_P) as close to parallel as possible and approximately the same length.
• The ground plane on layer two is solid below the trace lines and that there is ground around these traces on
the top layer.
• See CC31xx & CC32xx Frequency Tuning for frequency tuning.
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10.2.4 Digital Input and Output
The following guidelines are for the digital I/O.
• Route SPI and UART lines away from any RF traces.
• Keep the length of the high-speed lines as short as possible to avoid transmission line effects.
• Keep the line lower than 1/10 of the rise time of the signal to ignore transmission line effects. This is required
if the traces cannot be kept short. Place the resistor at the source end, closer to the device that is driving the
signal.
• Add a series-terminating resistor for each high-speed line (such as SPI_CLK or SPI_DATA) to match the
driver impedance to the line. Typical terminating-resistor values range from 27 to 36 Ωfor a 50-Ωline
impedance.
• Route high-speed lines with a ground reference plane continuously below it to offer good impedance
throughout. This routing also helps shield the trace against EMI.
• Avoid stubs on high-speed lines to minimize the reflections. If the line must be routed to multiple locations,
use a separate line driver for each line.
• If the lines are longer compared to the rise time, add series-terminating resistors near the driver for each
high-speed line to match the driver impedance to the line. Typical terminating-resistor values range from 27 to
36 Ωfor a 50-Ωline impedance.
10.2.5 RF Interface
The following guidelines are for the RF interface. Follow guidelines specified in the vendor-specific antenna
design guides (including placement of the antenna). Also see CC3120 and CC3220 SimpleLink™ Wi-Fi® and IoT
Solution Layout Guidelines for general antenna guidelines.
• Ensure that the antenna is matched for 50-Ω. TI recommends using a Pi-matching network.
• Ensure that the area underneath the BPF pads is grounded on layer one and layer two, and ensure that the
minimum filter requirements are met.
• Verify that the Wi-Fi RF trace is a 50-Ω, impedance-controlled trace with a reference to solid ground.
• The RF trace bends must be made with gradual curves. Avoid using 90-degree bends.
• The RF traces must not have sharp corners.
• Do not place traces or ground under the antenna section.
• The RF traces must have via stitching on the ground plane beside the RF trace on both sides.
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11 Device and Documentation Support
TI offers an extensive line of development tools. Tools and software to evaluate the performance of the device,
generate code, and develop solutions are listed in this section.
11.1 Development Tools and Software
For the most up-to-date list of development tools and software, see the CC3120 Tools & Software product page.
Users can also click the "Alert Me" button on the top right corner of the CC3120 Tools & Software page to stay
informed about updates related to the CC3120MOD device.
Development Tools
SimpleLink™ Wi-Fi® The supported devices are: CC3100, CC3200, CC3120R, and CC3220x.
Starter Pro
The SimpleLink™ Wi-Fi® Starter Pro mobile App is a new mobile application for
SimpleLink provisioning. The app goes along with the embedded provisioning library and
example that runs on the device side (see SimpleLink™ Wi-Fi® CC3120 SDK plugin and
TI SimpleLink ™ Wi-Fi® CC3220 Software Development Kit (SDK)). The new
provisioning release is a TI recommendation for Wi-Fi provisioning using SimpleLink Wi-
Fi products. The provisioning release implements advanced AP mode and SmartConfig™
technology provisioning with feedback and fallback options to ensure successful process
has been accomplished. Customers can use both embedded library and the mobile
library for integration to their end products.
SimpleLink™ Wi-Fi® The CC3120R device is supported.
CC3120 SDK plugin
The CC3120 SDK contains drivers, many sample applications for Wi-Fi features and
internet, and documentation needed to use the CC3120 Internet-on-a chip™ solution.
This SDK can be used with TI’s MSP432P401R LaunchPad, or SimpleLink Studio, a
PC tool that allows MCU development with CC3120. You can also use the SDK as
example code for any platform. All sample applications in the SDK are supported on TI’
s MSP432P401R ultra-low power MCUs with Code Composer Studio IDE and TI RTOS.
In addition, many of the applications support IAR.
SimpleLink™ Studio The CC3120R device is supported.
for CC31xx
SimpleLink Studio for CC31xx is a Windows®-based software tool used to aid in the
development of embedded networking applications and software for microcontrollers.
Using SimpleLink Studio for CC31xx, embedded software developers can develop and
test applications using any desktop IDE, such as Visual Studio or Eclipse, and connect
their applications to the cloud using the CC31xx BoosterPack™ Plug-in Module. The
application can then be easily ported to any microcontroller. With the SimpleLink Wi-Fi
CC31xx solution, customers now have the flexibility to add Wi-Fi to any microcontroller
(MCU). This Internet-on-a-chip solution contains all you need to easily create IoT
solutions: security, quick connection, cloud support, and more. For more information on
CC31xx, visit SimpleLink™ Wi-Fi® Solutions.
SimpleLink™ Wi-Fi® The supported devices are: CC3100, CC3200, and CC3220x.
Radio Testing Tool
The SimpleLink™ Wi-Fi® Radio Testing Tool is a Windows-based software tool for RF
evaluation and testing of SimpleLink Wi-Fi CC3120 and CC3220 designs during
development and certification. The tool enables low-level radio testing capabilities by
manually setting the radio into transmit or receive modes. Using the tool requires
familiarity and knowledge of radio circuit theory and radio test methods.
Created for the Internet of Things (IoT), the SimpleLink Wi-Fi CC31xx and CC32xx
family of devices include on-chip Wi-Fi, Internet, and robust security protocols with no
prior Wi-Fi experience needed for faster development. For more information on these
devices, visit SimpleLink™ Wi-Fi® family, Internet-on-a chip™ solutions.
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CC3220 Software
Development Kit
(SDK)
The CC3120R device is supported.
The SimpleLink Wi-Fi CC3220 SDK contains drivers for the CC3220 programmable
MCU, 30+ sample applications, and documentation needed to use the solution. The SDK
also contains the Flash programmer, a command line tool for flashing software,
configuring network and software parameters (SSID, access point channel, network
profile, and so on), system files, and user files (certificates, web pages, and so on). This
SDK can be used with TI’s SimpleLInk Wi-Fi CC3220 LaunchPad™ development kit.
The SDK has a variety of support offerings. All sample applications in the SDK are
supported on the integrated Cortex-M4 processor with CCS IDE and no RTOS. In
addition, a few of the applications support IAR, Free RTOS, and TI-RTOS.
Uniflash Standalone
Flash Tool for TI
Microcontrollers
(MCU), Sitara
CCS Uniflash is a standalone tool used to program on-chip flash memory on TI MCUs
and on-board flash memory for Sitara processors. Uniflash has a GUI, command line,
and scripting interface. CCS Uniflash is available free of charge.
Processors &
SimpleLink Devices
TI Designs and Reference Designs
The TI Designs Reference Design Library is a robust reference design library spanning analog, embedded
processor, and connectivity. Created by TI experts to help you jumpstart your system design, all TI Designs
include schematic or block diagrams, BOMs, and design files to speed your time to market.
11.2 Firmware Updates
TI updates features in the service pack for this module with no published schedule. Due to the ongoing changes,
TI recommends that the user has the latest service pack in their module for production.
To stay informed, click the SDK “Alert me” button the top right corner of the product page, or visit SimpleLink
™ Wi-Fi® CC3120 SDK plugin.
11.3 Device Nomenclature
To designate the stages in the product development cycle, TI assigns prefixes to the part numbers of the
CC3120R device and support tools (see 图11-1).
CC
3120
R
NM
A
RGK R/T
PACKAGING
R = tape/reel
T = small reel
PREFIX
X = perproduction device
no prefix = production device
DEVICE FAMILY
CC = wireless connectivity
PACKAGE
RGK = 9-mm x 9-mm VQFN
SERIES NUMBER
3 = Wi-Fi Centric
REVISION
A = Revision A
R = ROM
NM = No Memory
图11-1. CC3120R Device Nomenclature
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11.4 Documentation Support
To receive notification of documentation updates—including silicon errata—go to the product folder for your
device on ti.com (CC3120). In the upper right corner, click the "Alert me" button. This registers you to receive a
weekly digest of product information that has changed (if any). For change details, check the revision history of
any revised document. The current documentation that describes the processor, related peripherals, and other
technical collateral follows.
The following documents provide support for the CC3120 device.
Application Reports
CC3120 and CC3220 SimpleLink™ CC3120 and CC3220 SimpleLink™ Wi-Fi® Embedded Programming
Wi-Fi® Embedded Programming
SimpleLink™ CC3120, CC3220 Wi- This application report describes the best practices for power
Fi® Internet-on-a chip™ Networking management and extended battery life for embedded low-power Wi-Fi
Sub-System Power Management
devices such as the SimpleLink™ Wi-Fi® Internet-on-a chip™ solution
from Texas Instruments™.
SimpleLink™ CC3120, CC3220 Wi- The SimpleLink™ Wi-Fi® CC3120 and CC3220 Internet-on-a chip™
Fi® Internet-on-a chip ™ Solution family of devices from Texas Instruments™ offer a wide range of built-in
Built-In Security Features
security features to help developers address a variety of security needs,
which is achieved without any processing burden on the main
microcontroller (MCU). This document describes these security-related
features and provides recommendations for leveraging each in the
context of practical system implementation.
SimpleLink™ CC3120, CC3220 Wi- This document describes the OTA library for the SimpleLink™ Wi-Fi®
Fi® and Internet of Things Over-the- CC3x20 family of devices from Texas Instruments™ and explains how to
Air Update
prepare a new cloud-ready update to be downloaded by the OTA library.
SimpleLink™ CC3120, CC3220 Wi- This guide describes the provisioning process, which provides the
Fi® Internet-on-a chip ™ Solution SimpleLink ™ Wi-Fi® device with the information (network name,
Device Provisioning
password, and so forth) needed to connect to a wireless network.
Transfer of TI's Wi-Fi® Alliance This document explains how to employ the Wi-Fi® Alliance (WFA)
Certifications to Products Based on derivative certification transfer policy to transfer a WFA certification,
SimpleLink™
already obtained by Texas Instruments, to a system you have developed.
Using Serial Flash on SimpleLink™ This application note is divided into two parts. The first part provides
CC3120 and CC3220 Wi-Fi® and important guidelines and best- practice design techniques to consider
Internet-of-Things Devices
when choosing and embedding a serial Flash paired with the CC3120
and CC3220 (CC3x20) devices. The second part describes the file
system, along with guidelines and considerations for system designers
working with the CC3x20 devices.
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User's Guides
SimpleLink™ Wi-Fi® and Internet This document provides software (SW) programmers with all of the required
of Things CC3120 and CC3220 knowledge for working with the networking subsystem of the SimpleLink™
Network Processor
Wi-Fi® devices. This guide provides basic guidelines for writing robust,
optimized networking host applications, and describes the capabilities of the
networking subsystem. The guide contains some example code snapshots,
to give users an idea of how to work with the host driver. More
comprehensive code examples can be found in the formal software
development kit (SDK). This guide does not provide a detailed description of
the host driver APIs.
SimpleLink ™ Wi-Fi® CC3120 The SimpleLink™ Wi-Fi® CC3120 wireless network processor from Texas
BoosterPack ™ Plug-In Module Instruments™ provides users the flexibility to add Wi-Fi to any MCU. This
and IoT Solution
user's guide explains the various configurations of the CC3120 BoosterPack
™ Plug-In Module.
SimpleLink ™ Wi-Fi® CC3120 This document provides the design guidelines of the 4-layer PCB used for
and CC3220 and IoT Solution the CC3120 and CC3220 SimpleLink™ Wi-Fi® family of devices from Texas
Layout Guidelines
Instruments™. The CC3120 and CC3220 devices are easy to lay out and are
available in quad flat no-leads (QFNS) packages. When designing the board,
follow the suggestions in this document to optimize performance of the
board.
SimpleLink ™ Wi-Fi® CC3120 This guide is intended to help users in the initial setup and demonstration of
Internet-on-a-chip ™
SDK
Solution the different demos in the CC3120 SDK. The guide lists the software and
hardware components required to get started, and explains how to install the
supported integrated development environment (IDE), SimpleLink CC3120
SDK, and the various other tools required.
SimpleLink ™
Wi-Fi®
and The Radio Tool serves as a control panel for direct access to the radio, and
Internet-on-a-chip™ CC3120 and can be used for both the radio frequency (RF) evaluation and for certification
CC3220 Solution Radio Tool
purposes. This guide describes how to have the tool work seamlessly on
Texas Instruments™ evaluation platforms such as the BoosterPack™ plus
FTDI emulation board for CC3120 devices, and the LaunchPad™ for
CC3220 devices.
SimpleLink ™ Wi-Fi® CC3120
and CC3220 Provisioning for
Mobile Applications
This guide describes TI’s SimpleLink™ Wi-Fi® provisioning solution for
mobile applications, specifically on the usage of the Android™ and iOS®
building blocks for UI requirements, networking, and provisioning APIs
required for building the mobile application.
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UniFlash CC3120 and CC3220 This document describes the installation, operation, and usage of the
SimpleLink ™ and SimpleLink ImageCreator tool as part of the UniFlash.
Wi-Fi®
Internet-on-a chip ™ Solution
ImageCreator and Programming
Tool
More Literature
RemoTI Manifest
CC3120 SimpleLink™ WI-Fi® and Internet of Things
CC3120, CC3220 SimpleLink™ Wi-Fi® and Internet of Things Design Checklist
CC3120 hardware design files.
11.5 支持资源
TI E2E™ 支持论坛是工程师的重要参考资料,可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解
答或提出自己的问题可获得所需的快速设计帮助。
链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范,并且不一定反映 TI 的观点;请参阅
TI 的《使用条款》。
11.6 Trademarks
SimpleLink™, Internet-on-a chip™, SmartConfig™, 德州仪器(TI)™, BoosterPack™, LaunchPad™, and TI E2E™
are trademarks of Texas Instruments.
WPA™, WPA2™, WPA3™, and are trademarks of Wi-Fi Alliance.
E2E™ is a trademark of TI.
WiMAX™ are trademarks of WiMAX Forum.
Wi-Fi® and Wi-Fi Direct® are registered trademarks of Wi-Fi Alliance.
Bluetooth® is a registered trademark of Bluetooth SIG, Inc.
Zigbee® are registered trademarks of Zigbee Alliance.
Windows® is a registered trademark of Microsoft Inc.
所有商标均为其各自所有者的财产。
11.7 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
11.8 Export Control Notice
Recipient agrees to not knowingly export or re-export, directly or indirectly, any product or technical data (as
defined by the U.S., EU, and other Export Administration Regulations) including software, or any controlled
product restricted by other applicable national regulations, received from disclosing party under nondisclosure
obligations (if any), or any direct product of such technology, to any destination to which such export or re-export
is restricted or prohibited by U.S. or other applicable laws, without obtaining prior authorization from U.S.
Department of Commerce and other competent Government authorities to the extent required by those laws.
11.9 术语表
TI 术语表
本术语表列出并解释了术语、首字母缩略词和定义。
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12 Mechanical, Packaging, and Orderable Information
12.1 Packaging Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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重要声明和免责声明
TI 提供技术和可靠性数据(包括数据表)、设计资源(包括参考设计)、应用或其他设计建议、网络工具、安全信息和其他资源,不保证没
有瑕疵且不做出任何明示或暗示的担保,包括但不限于对适销性、某特定用途方面的适用性或不侵犯任何第三方知识产权的暗示担保。
这些资源可供使用TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任:(1) 针对您的应用选择合适的TI 产品,(2) 设计、验
证并测试您的应用,(3) 确保您的应用满足相应标准以及任何其他安全、安保或其他要求。这些资源如有变更,恕不另行通知。TI 授权您仅可
将这些资源用于研发本资源所述的TI 产品的应用。严禁对这些资源进行其他复制或展示。您无权使用任何其他TI 知识产权或任何第三方知
识产权。您应全额赔偿因在这些资源的使用中对TI 及其代表造成的任何索赔、损害、成本、损失和债务,TI 对此概不负责。
TI 提供的产品受TI 的销售条款(https:www.ti.com/legal/termsofsale.html) 或ti.com 上其他适用条款/TI 产品随附的其他适用条款的约束。TI
提供这些资源并不会扩展或以其他方式更改TI 针对TI 产品发布的适用的担保或担保免责声明。重要声明
邮寄地址:Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2021,德州仪器(TI) 公司
PACKAGE OPTION ADDENDUM
www.ti.com
27-Jul-2021
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
CC3120RNMARGKR
CC3120RNMARGKT
ACTIVE
VQFN
VQFN
RGK
64
64
2500 RoHS & Green NIPDAU | NIPDAUAG Level-3-260C-168 HR
-40 to 85
-40 to 85
CC3120R
NMA
ACTIVE
RGK
250 RoHS & Green NIPDAU | NIPDAUAG Level-3-260C-168 HR
CC3120R
NMA
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
27-Jul-2021
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
9-Aug-2022
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
CC3120RNMARGKR
CC3120RNMARGKT
VQFN
VQFN
RGK
RGK
64
64
2500
250
330.0
180.0
16.4
16.4
9.3
9.3
9.3
9.3
1.1
1.1
12.0
12.0
16.0
16.0
Q2
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
9-Aug-2022
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
CC3120RNMARGKR
CC3120RNMARGKT
VQFN
VQFN
RGK
RGK
64
64
2500
250
367.0
210.0
367.0
185.0
38.0
35.0
Pack Materials-Page 2
PACKAGE OUTLINE
RGK0064B
VQFN - 1 mm max height
S
C
A
L
E
1
.
5
0
0
PLASTIC QUAD FLATPACK - NO LEAD
9.1
8.9
A
B
PIN 1 INDEX AREA
9.1
8.9
1.0
0.8
C
SEATING PLANE
0.08 C
0.05
0.00
2X 7.5
6.3 0.1
SYMM
(0.2) TYP
17
32
16
33
EXPOSED
THERMAL PAD
SYMM
65
2X 7.5
0.30
64X
1
48
60X 0.5
PIN 1 ID
0.18
64
49
0.1
C A B
0.5
0.3
0.05
64X
4222201/B 03/2018
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
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EXAMPLE BOARD LAYOUT
RGK0064B
VQFN - 1 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
(
6.3)
SEE SOLDER MASK
DETAIL
SYMM
64X (0.6)
64
49
64X (0.24)
1
48
60X (0.5)
8X (1.1)
(R0.05) TYP
18X (1.2)
(0.6) TYP
SYMM
65
(8.8)
(
0.2) TYP
VIA
16
33
17
32
(0.6) TYP
18X (1.2)
8X
(1.1)
(8.8)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 10X
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
METAL UNDER
SOLDER MASK
METAL EDGE
EXPOSED METAL
SOLDER MASK
OPENING
EXPOSED
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
SOLDER MASK DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4222201/B 03/2018
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
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EXAMPLE STENCIL DESIGN
RGK0064B
VQFN - 1 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
25X ( 1)
64
(1.2) TYP
49
64X (0.6)
64X (0.24)
1
48
60X (0.5)
(R0.05) TYP
(1.2) TYP
65
SYMM
(8.8)
16
33
METAL
TYP
17
32
SYMM
(8.8)
SOLDER PASTE EXAMPLE
BASED ON 0.1 MM THICK STENCIL
SCALE: 10X
EXPOSED PAD 65
63% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE
4222201/B 03/2018
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
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