CSD22206WT [TI]
采用 1.5mm x 1.5mm WLP 封装、具有栅极 ESD 保护的单路、5.7mΩ、-8V、P 沟道 NexFET™ 功率 MOSFET | YZF | 9 | -55 to 150;型号: | CSD22206WT |
厂家: | TEXAS INSTRUMENTS |
描述: | 采用 1.5mm x 1.5mm WLP 封装、具有栅极 ESD 保护的单路、5.7mΩ、-8V、P 沟道 NexFET™ 功率 MOSFET | YZF | 9 | -55 to 150 栅 开关 脉冲 晶体管 栅极 |
文件: | 总15页 (文件大小:809K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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CSD22206W
ZHCSGA1 –MAY 2017
CSD22206W -8V P 通道 NexFET™功率金属氧化物半导体场效应晶体管
(MOSFET)
1 特性
产品概要
1
•
•
•
•
•
•
•
超低电阻
TA = 25°C
VDS
典型值
-8
单位
V
小尺寸封装 1.5mm x 1.5mm
无铅
漏源电压
Qg
栅极电荷总量 (-4.5V)
栅极电荷(栅极到漏极)
11.2
1.8
nC
nC
栅极静电放电 (ESD) 保护
符合 RoHS 环保标准
无卤素
Qgd
VGS = -2.5V
VGS = -4.5V
-0.7
6.8
4.7
RDS(on)
VGS(th)
漏源导通电阻
阈值电压
mΩ
V
栅 - 源电压钳位
器件信息
包装介质
2 应用范围
器件
数量
封装
运输
•
•
•
负载开关 应用范围
电池管理
CSD22206W
3000
1.50mm × 1.50mm
晶圆级球状引脚栅格
阵列 (BGA) 封装
卷带封
装
7 英寸卷带
CSD22206WT
250
电池保护
绝对最大额定值
3 说明
TA = 25°C
值
-8
单位
V
这款 –8V、4.7mΩ、1.5mm × 1.5mm 器件设计用于在
超薄且具有出色散热特性的超小外形尺寸封装内提供最
低的导通电阻和栅极电荷。低导通电阻与小型封装尺寸
和低高度结合在一起,使得此器件非常适合于电池供电
运行的空间受限 应用。
VDS
VGS
漏源电压
栅源电压
-6
V
持续漏极电流(1)
脉冲漏极电流(2)
功率耗散
-5
A
ID
–108
1.7
A
PD
W
TJ,
Tstg
工作结温,
储存温度
-55 至 150
°C
顶视图和电路配置
(1) 器件在 105ºC 温度下运行.
{ource
(2) 典型 RθJA = 75°C/W(安装于具有最大铜安装区域的 FR4 材
料),脉宽 ≤ 100μs,占空比 ≤ 1%。
D
{
{
{
{
{
Date
5
5
5
5rain
RDS(on) 与 VGS 对比
栅极电荷
30
25
20
15
10
5
4.5
TC = 25°C, I D = -2 A
TC = 125°C, I D = -2 A
ID = -2 A
VDS = -4 V
4
3.5
3
2.5
2
1.5
1
0.5
0
0
0
1
2
3
4
5
6
0
2
4
6
8
10
12
-VGS - Gate-to-Source Voltage (V)
Qg - Gate Charge (nC)
D007
D004
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
English Data Sheet: SLPS689
CSD22206W
ZHCSGA1 –MAY 2017
www.ti.com.cn
目录
1
2
3
4
5
特性.......................................................................... 1
6
7
器件和文档支持........................................................ 7
6.1 接收文档更新通知 ..................................................... 7
6.2 社区资源.................................................................... 7
6.3 商标........................................................................... 7
6.4 静电放电警告............................................................. 7
6.5 Glossary.................................................................... 7
机械、封装和可订购信息 ......................................... 8
7.1 CSD22206W 封装尺寸.............................................. 8
7.2 建议的焊盘图案 ......................................................... 9
应用范围................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Specifications......................................................... 3
5.1 Electrical Characteristics........................................... 3
5.2 Thermal Information.................................................. 3
5.3 Typical MOSFET Characteristics.............................. 4
4 修订历史记录
日期
修订版本
注释
2017 年 5 月
*
初始发行版。
2
Copyright © 2017, Texas Instruments Incorporated
CSD22206W
www.ti.com.cn
ZHCSGA1 –MAY 2017
5 Specifications
5.1 Electrical Characteristics
TA = 25°C (unless otherwise stated)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
STATIC CHARACTERISTICS
BVDSS
BVGSS
IDSS
Drain-to-source voltage
VGS = 0 V, IDS = –250 μA
–8
–6
V
V
Gate-to-source voltage
VDS = 0 V, IG = –250 μA
VGS = 0 V, VDS = –6.4 V
VDS = 0 V, VGS = –6 V
VDS = VGS, IDS = –250 μA
VGS = –2.5 V, IDS = –2 A
VGS = –4.5 V, IDS = –2 A
VDS = –0.8 V, IDS = –2 A
Drain-to-source leakage current
Gate-to-source leakage current
Gate-to-source threshold voltage
–1
–100
μA
nA
V
IGSS
VGS(th)
–0.4
–0.7 –1.05
6.8
4.7
20
9.1
5.7
RDS(on)
gfs
Drain-to-source on resistance
Transconductance
mΩ
S
DYNAMIC CHARACTERISTICS
CISS
COSS
CRSS
RG
Input capacitance
1750
960
340
30
2275
1250
440
pF
pF
pF
Ω
VGS = 0 V, VDS = –4 V,
ƒ = 1 MHz
Output capacitance
Reverse transfer capacitance
Series gate resistance
Gate charge total (–4.5 V)
Gate charge gate-to-drain
Gate charge gate-to-source
Gate charge at Vth
Output charge
Qg
11.2
1.8
2.1
1.3
7.2
37
14.6
nC
nC
nC
nC
nC
ns
ns
ns
ns
Qgd
Qgs
Qg(th)
QOSS
td(on)
tr
VDS = –4 V,
ID = –2 A
VDS = –4 V, VGS = 0 V
Turnon delay time
Rise time
17
VDS = –4 V, VGS = –4.5 V,
IDS = –2 A, RG = 0 Ω
td(off)
tf
Turnoff delay time
Fall time
118
45
DIODE CHARACTERISTICS
VSD
Qrr
trr
Diode forward voltage
Reverse recovery charge
Reverse recovery time
IDS = –2 A, VGS = 0 V
–0.69
24
–1.0
nC
ns
VDS= –4 V, IF = –1 A,
di/dt = 200 A/μs
59
5.2 Thermal Information
TA = 25°C (unless otherwise stated)
THERMAL METRIC
Junction-to-ambient thermal resistance(1)
Junction-to-ambient thermal resistance(2)
TYPICAL VALUES
UNIT
75
RθJA
°C/W
230
(1) Device mounted on FR4 material with 1-in2 (6.45-cm2), 2-oz (0.071-mm) thick Cu.
(2) Device mounted on FR4 material with minimum Cu mounting area.
Copyright © 2017, Texas Instruments Incorporated
3
CSD22206W
ZHCSGA1 –MAY 2017
www.ti.com.cn
Typ RθJA = 230°C/W
Typ RθJA = 75°C/W
when mounted on 1 in2
of 2-oz Cu.
when mounted on
minimum pad area of
2-oz Cu.
M0149-01
M0150-01
5.3 Typical MOSFET Characteristics
TA = 25°C (unless otherwise stated)
Figure 1. Transient Thermal Impedance
4
Copyright © 2017, Texas Instruments Incorporated
CSD22206W
www.ti.com.cn
ZHCSGA1 –MAY 2017
Typical MOSFET Characteristics (continued)
TA = 25°C (unless otherwise stated)
45
50
45
40
35
30
25
20
15
10
5
TC = 125°C
TC = 25°C
TC = -55°C
40
35
30
25
20
15
10
VGS = -2.5 V
VGS = -4.5 V
5
0
0
0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50
-VDS - Drain-to-Source Voltage (V)
0
0.5
1
1.5
2
2.5
3
-VGS - Gate-to-Source Voltage (V)
D002
D003
VDS = –4 V
Figure 2. Saturation Characteristics
Figure 3. Transfer Characteristics
10000
1000
100
4.5
4
Ciss = Cgd + Cgs
Coss = Cds + Cgd
Crss = Cgd
3.5
3
2.5
2
1.5
1
0.5
0
0
2
4
6
8
10
12
0
1
2
3
4
5
6
7
8
Qg - Gate Charge (nC)
-VDS -Drain-to-Source Voltage (V)
D004
D005
VDS = –4 V
ID = –2 A
Figure 4. Gate Charge
Figure 5. Capacitance
30
25
20
15
10
5
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
TC = 25°C, I D = -2 A
TC = 125°C, I D = -2 A
0
0
-75 -50 -25
0
25
50
75 100 125 150 175
1
2
3
4
5
6
TC - Case Temperature (°C)
-VGS - Gate-to-Source Voltage (V)
D006
D007
ID = –250 µA
Figure 6. Threshold Voltage vs Temperature
Figure 7. On-State Resistance vs Gate-to-Source Voltage
Copyright © 2017, Texas Instruments Incorporated
5
CSD22206W
ZHCSGA1 –MAY 2017
www.ti.com.cn
Typical MOSFET Characteristics (continued)
TA = 25°C (unless otherwise stated)
10
1
1.4
TC = -55èC
TC = -40èC
TC = 25èC
TC = 125èC
TC = 150èC
VGS = -4.5 V
1.3
1.2
1.1
1
0.1
0.01
0.001
0.0001
0.9
0.8
0.7
-75 -50 -25
0
25
50
75 100 125 150 175
0
0.2
0.4
0.6
0.8
1
TA - Ambient Temperature (èC)
-VSD - Source-to-Drain Voltage (V)
D008
D009
ID = –2 A
Figure 8. Normalized On-State Resistance vs Temperature
Figure 9. Typical Diode Forward Voltage
6
5
4
3
2
1
200
100
10
1
100 ms
10 ms
1 ms
0.1
0.1
0
-50
1
10
20
-25
0
25
50
75
100 125 150 175
-VDS - Drain-to-Source Voltage (V)
TA - Ambient Temperature (°C)
D010
D011
Single pulse, max RθJA = 75°C/W
Figure 10. Maximum Safe Operating Area
Figure 11. Maximum Drain Current vs Temperature
6
版权 © 2017, Texas Instruments Incorporated
CSD22206W
www.ti.com.cn
ZHCSGA1 –MAY 2017
6 器件和文档支持
6.1 接收文档更新通知
要接收文档更新通知,请导航至 ti.com 上的器件产品文件夹。请单击右上角的通知我 进行注册,即可收到任意产
品信息更改每周摘要。有关更改的详细信息,请查看任意已修订文档中包含的修订历史记录。
6.2 社区资源
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
6.3 商标
NexFET, E2E are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
6.4 静电放电警告
这些装置包含有限的内置 ESD 保护。 存储或装卸时,应将导线一起截短或将装置放置于导电泡棉中,以防止 MOS 门极遭受静电损
伤。
6.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
版权 © 2017, Texas Instruments Incorporated
7
CSD22206W
ZHCSGA1 –MAY 2017
www.ti.com.cn
7 机械、封装和可订购信息
以下页面包括机械、封装和可订购信息。这些信息是指定器件的最新可用数据。这些数据发生变化时,我们可能不
会另行通知或修订此文档。如欲获取此产品说明书的浏览器版本,请参见左侧的导航栏。
7.1 CSD22206W 封装尺寸
Pin 1
Mark
Solder Ball
Ø 0.31 0.075
2
3
3
2
1
1
A
B
C
A
B
C
+0.00
–0.08
1.50
0.62 Max
0.50
Bottom View
Top View
Side View
Seating Plate
Front View
M0171-01
NOTE: 全部尺寸单位为 mm(除非另外注明)。
表 1. 引脚分配
位置
A1
名称
栅极
源极
漏极
A2,A3,B1,B2,B3
C1,C2,C3
8
版权 © 2017, Texas Instruments Incorporated
CSD22206W
www.ti.com.cn
ZHCSGA1 –MAY 2017
7.2 建议的焊盘图案
Ø 0.25
1
2
3
A
B
C
0.50
M0172-01
NOTE: 全部尺寸单位为 mm(除非另外注明)。
版权 © 2017, Texas Instruments Incorporated
9
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
CSD22206W
ACTIVE
ACTIVE
DSBGA
DSBGA
YZF
YZF
9
9
3000 RoHS & Green SAC396 | SNAGCU
250 RoHS & Green SAC396 | SNAGCU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-55 to 150
-55 to 150
22206
22206
CSD22206WT
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
Addendum-Page 2
PACKAGE OUTLINE
YZF0009
DSBGA - 0.625 mm max height
SCALE 8.000
DIE SIZE BALL GRID ARRAY
A
B
E
BALL A1
CORNER
D
C
0.625 MAX
SEATING PLANE
0.05 C
BALL TYP
0.35
0.15
1 TYP
SYMM
C
1
TYP
SYMM
B
A
D: Max = 1.49 mm, Min = 1.43 mm
E: Max = 1.49 mm, Min = 1.43 mm
0.5
TYP
3
1
2
0.35
0.25
9X
0.015
0.5 TYP
C A B
4219558/A 10/2018
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
www.ti.com
EXAMPLE BOARD LAYOUT
YZF0009
DSBGA - 0.625 mm max height
DIE SIZE BALL GRID ARRAY
(0.5) TYP
9X ( 0.245)
(0.5) TYP
1
2
3
A
SYMM
B
C
SYMM
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 40X
0.05 MIN
0.05 MAX
METAL UNDER
SOLDER MASK
(
0.245)
METAL
(
0.245)
EXPOSED
METAL
SOLDER MASK
OPENING
EXPOSED
METAL
SOLDER MASK
OPENING
SOLDER MASK
DEFINED
NON-SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
NOT TO SCALE
4219558/A 10/2018
NOTES: (continued)
3. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints.
See Texas Instruments Literature No. SNVA009 (www.ti.com/lit/snva009).
www.ti.com
EXAMPLE STENCIL DESIGN
YZF0009
DSBGA - 0.625 mm max height
DIE SIZE BALL GRID ARRAY
(0.5) TYP
(R0.05) TYP
3
9X ( 0.25)
1
2
A
B
(0.5) TYP
SYMM
METAL
TYP
C
SYMM
SOLDER PASTE EXAMPLE
BASED ON 0.1 mm THICK STENCIL
SCALE: 40X
4219558/A 10/2018
NOTES: (continued)
4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.
www.ti.com
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