DRV10964FFDSNT [TI]
具有自动调优功能的 5V 标称电压、1.8A 峰值无传感器正弦控制三相 BLDC 电机驱动器 | DSN | 10 | -40 to 125;型号: | DRV10964FFDSNT |
厂家: | TEXAS INSTRUMENTS |
描述: | 具有自动调优功能的 5V 标称电压、1.8A 峰值无传感器正弦控制三相 BLDC 电机驱动器 | DSN | 10 | -40 to 125 PC 电动机控制 电机 驱动 光电二极管 传感器 驱动器 |
文件: | 总27页 (文件大小:2402K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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DRV10964
ZHCSEQ8 –MARCH 2016
DRV10964 5V、三相正弦无传感器 BLDC 电机驱动器
1 特性
3 说明
1
•
专有的无传感器无窗口
180° 正弦控制方案
DRV10964 是一款带有集成功率金属氧化物半导体场
效应晶体管 (MOSFET) 的三相无传感器电机驱动器。
该器件专门针对高效、低噪声和低外部组件数的电机驱
动应用而 设计。专有的无传感器无窗口 180° 正弦控制
方案可提供超静音的电机驱动性能。DRV10964 具备
智能锁定检测功能,与其他内部保护电路搭配使用以确
保器件安全运行。DRV10964 采用带有外露散热焊盘
的高效散热型 10 引脚超小外形尺寸无引线 (USON) 封
装。
•
•
•
•
输入电压范围:2.1V 至 5.5V
500mA 输出电流
休眠模式下的静态电流低至 15µA(典型值)
驱动器高侧和低侧 (H+L) 总导通电阻 (Rdson) 小于
1.5Ω
•
•
•
•
•
电流限制和短路电流保护
锁定检测
电压浪涌保护 (AVS)
欠压闭锁 (UVLO)
热关断
器件信息 (1)
部件号
DRV10964
封装
USON (10)
封装尺寸(标称值)
3.00mm x 3.00mm
2 应用范围
(1) 要了解所有可用封装,请见数据表末尾的可订购产品附录。
•
•
•
笔记本 CPU 风扇
游戏站 CPU 风扇
ASIC 冷却风扇
简化电路原理图
VCC
100k
VCC
1
2
3
4
5
FG
PWM 10
FG
PWMIN
FGS
VCC
W
CONFIG
9
8
7
6
FG Status
VCC
FR
U
Direction
2.2 µF
GND
V
M
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
English Data Sheet: SLDS227
DRV10964
ZHCSEQ8 –MARCH 2016
www.ti.com.cn
目录
7.3 Feature Description................................................... 7
7.4 Device Functional Modes........................................ 14
Application and Implementation ........................ 17
8.1 Application Information............................................ 17
8.2 Typical Application .................................................. 17
Power Supply Recommendations...................... 19
1
2
3
4
5
6
特性.......................................................................... 1
应用范围................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Pin Configuration and Functions......................... 3
Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information.................................................. 4
6.5 Electrical Characteristics........................................... 5
6.6 Typical Characteristics.............................................. 6
Detailed Description .............................................. 7
7.1 Overview ................................................................... 7
7.2 Functional Block Diagram ......................................... 7
8
9
10 Layout................................................................... 19
10.1 Layout Guidelines ................................................. 19
10.2 Layout Example .................................................... 19
11 器件和文档支持 ..................................................... 20
11.1 社区资源................................................................ 20
11.2 商标....................................................................... 20
11.3 静电放电警告......................................................... 20
11.4 Glossary................................................................ 20
12 机械、封装和可订购信息....................................... 20
7
4 修订历史记录
日期
修订版本
注释
2016 年 2016
*
最初发布。
2
Copyright © 2016, Texas Instruments Incorporated
DRV10964
www.ti.com.cn
ZHCSEQ8 –MARCH 2016
5 Pin Configuration and Functions
DSN Package
10-Pin USON
Top View
1
10
9
PWM
FG
2
CONFIG
FGS
3
8
FR
U
VCC
4
7
W
5
6
V
GND
Pin Functions
PIN
NAME
I/O
DESCRIPTION
NO.
1
FG
Output Motor speed indicator output (open drain).
Motor speed indicator selector. The state of this pin is latched on power up and can not be changed
dynamically.
2
FGS
Input
3
4
5
6
7
8
VCC
W
Power
IO
Input voltage for motor and chip supply.
Motor Phase W
GND
V
Ground Ground
IO
Motor Phase V
U
IO
Motor Phase U
FR
Input
Motor direction selector. This pin can be dynamically changed after power up.
Resistor setting for configuring the handoff threshold. The state of this pin is latched on power up and can
not be changed dynamically.
9
CONFIG
Input
10 PWM
Thermal Pad
Input
—
Motor speed control input.
—
Connect to Ground for maximum thermal efficiency. Thermal pad is on the bottom of the package.
Copyright © 2016, Texas Instruments Incorporated
3
DRV10964
ZHCSEQ8 –MARCH 2016
www.ti.com.cn
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1) (2)
MIN
–0.3
–1
MAX
6
UNIT
V
VCC pin supply voltage
Motor phase pins (U, V, W)
7.7
6
V
Direction, speed indicator input, and speed input (FR, FGS, PWM, CONFIG)
Speed output (FG)
–0.3
–0.3
–40
V
7.7
150
260
150
V
TJ
Junction temperature
°C
°C
°C
TSDR
Tstg
Maximum lead soldering temperature, 10 seconds
Storage temperature
–55
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to ground.
6.2 ESD Ratings
VALUE
±2500
±1000
UNIT
(1)
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001
Charged-device model (CDM), per JEDEC specification JESD22-C101
V(ESD)
Electrostatic discharge
V
(2)
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
MAX UNIT
VCC
VCC pin supply voltage
Motor phase pins
2.1
–0.7
–0.1
–0.1
–40
5.5
7
V
V
U, V, W
FR, FGS, PWM, CONFIG
Direction, speed indicator input, and speed input
Speed output
5.5
7.5
125
V
FG
TJ
V
Junction temperature
°C
6.4 Thermal Information
DRV10964
DSN (USON)
10 PINS
40.9
(1)
THERMAL METRIC
UNIT
Rθ JA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
Junction-to-top characterization parameter
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
Rθ JC(top)
Rθ JB
46.6
15.8
ψJT
0.5
ψJB
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
16
Rθ JC(bot)
2.9
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
4
Copyright © 2016, Texas Instruments Incorporated
DRV10964
www.ti.com.cn
ZHCSEQ8 –MARCH 2016
6.5 Electrical Characteristics
(VCC = 5 V, TA = 25°C unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY CURRENT
IVCC
Operating current
Sleep current
PWM = VCC, no motor connected
PWM = 0 V
6.5
15
mA
µA
IVCC_SLEEP
UVLO
20
2.1
VUVLO_H
VUVLO_L
VUVLO_HYS
Undervoltage threshold high
Undervoltage threshold low
Undervoltage threshold hysteresis
2
1.8
V
V
1.7
100
200
300
1.5
mV
INTEGRATED MOSFET
RDSON
PWM
Series resistance (H+L)
VCC = 5 V; IOUT = 0.5 A
1
Ω
VIH_PWM
VIL_PWM
FPWM
Input high threshold
Input low threshold
PWM input frequency
0.45 × VCC
15
V
V
0.15 × VCC
100
Duty cycle >0% and <100%
Active mode
kHz
kΩ
MΩ
40
RPU_PWM_VCC
tSLEEP
PWM pin pullup resistor
Sleep entry time
Standby mode
1.5
PWM = 0 V and the motor speed
less than 10 Hz
1
ms
FG
IOL_FG
FG sink current
VFG = 0.3 V
VFG = 5 V
5
mA
mA
ISC_FG
FG short circuit current
13
25
FGS and FR
VIH_FGS
VIL_FGS
VIH_FR
VIL_FR
Input high threshold
Input low threshold
Input high threshold
Input low threshold
0.45 × VCC
0.45 × VCC
V
V
0.15 × VCC
0.15 × VCC
V
V
Active Mode
40
1.5
kΩ
MΩ
kΩ
RPU_FGS_VCC
FGS pin pullup resistor
Standby Mode
RPU_FR_VCC
FR pin pullup resistor
425
BEMF COMPARATOR
Voffset
Input offset
-10
14
10
28
mV
mV
μs
μs
V
VHYS
Input hysteresis
21
Tdelay_r
Output delay rising
Output delay falling
Common mode voltage
25-mV step
25-mV step
1.5
Tdelay_f
1.5
Vcom
0.3
VCC – 0.7
RATE LIMITING
Ramp time for align (from 0 to
50% duty cycle)
tARamp
300
ms
Copyright © 2016, Texas Instruments Incorporated
5
DRV10964
ZHCSEQ8 –MARCH 2016
www.ti.com.cn
Electrical Characteristics (continued)
(VCC = 5 V, TA = 25°C unless otherwise noted)
PARAMETER
CONFIG
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Handoff speed threshold 87.5 Hz
Handoff speed threshold 12.5 Hz
Handoff speed threshold 25 Hz
Handoff speed threshold 37.5 Hz
Handoff speed threshold 50 Hz
Handoff speed threshold 62.5 Hz
Handoff speed threshold 75 Hz
Handoff speed threshold 87.5 Hz
Handoff speed threshold 100 Hz
Handoff speed threshold 112.5 Hz
Handoff speed threshold 125 Hz
Handoff speed threshold 137.5 Hz
Handoff speed threshold 150 Hz
Handoff speed threshold 162.5 Hz
Handoff speed threshold 175 Hz
Handoff speed threshold 187.5 Hz
0
7.3
3.1
9.4
5.4 % VCC
11.7 % VCC
17.9 % VCC
24.1 % VCC
30.4 % VCC
36.6 % VCC
42.9 % VCC
48.9 % VCC
55.1 % VCC
61.3 % VCC
67.6 % VCC
73.8 % VCC
80.1 % VCC
86.3 % VCC
92.6 % VCC
100 % VCC
MΩ
13.5
19.8
26.0
32.2
38.5
44.7
50.7
57.0
63.2
69.5
75.6
81.9
88.2
94.5
15.6
21.8
28.1
34.4
40.6
46.8
53.1
59.3
65.6
71.9
78.1
84.4
90.6
96.9
10
CONFIGtrip
CONFIG pin trip points
ri
CONFIG pin input impedance
LOCK PROTECTION
tON_LOCK Lock detect time
tOFF_LOCK Lock release time
SHORT CIRCUIT CURRENT PROTECTION
ISHT Short circuit current protection
THERMAL SHUTDOWN
Abnormal Kt lock
0.3
5
0.33
5.9
s
s
1.8
A
TSD
Thermal shutdown temperature
Thermal shutdown hysteresis
160
10
°C
°C
TSD_HYS
6.6 Typical Characteristics
1.8
1.6
1.4
1.2
1.0
0.8
0.6
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
Power Supply at 25°C
C001
图 1. RDS(ON) vs Power Supply at 25°C
6
版权 © 2016, Texas Instruments Incorporated
DRV10964
www.ti.com.cn
ZHCSEQ8 –MARCH 2016
7 Detailed Description
7.1 Overview
The DRV10964 device is a three phase sensorless motor driver with integrated power MOSFETs. It is
specifically designed for high efficiency, low noise and low external component count motor drive applications.
The proprietary sensorless windowless 180° sinusoidal control scheme provides ultra-quiet motor operation by
keeping electrically induced torque ripple small.
Upon start-up, the DRV10964 device will spin the motor in the direction indicated by the FR input pin. The
DRV10964 device will operate a three phase BLDC motor using a sinusoidal control scheme. The magnitude of
the applied sinusoidal phase voltages is determined by the duty cycle of the PWM pin. As the motor spins, the
DRV10964 device provides the speed information at the FG pin.
The DRV10964 device contains an intelligent lock detect function. In the case where the motor is stalled by an
external force, the system will detect the lock condition and will take steps to protect itself as well as the motor.
The operation of the lock detect circuit is described in detail in Lock Detection .
The DRV10964 device also contains several internal protection circuits such as overcurrent protection,
overvoltage protection, undervoltage protection, and overtemperature protection.
7.2 Functional Block Diagram
FG
U
CONFIG
Decode
V
ADC
V/I Sensor
W
GND
V
CC
DRV10964
VCC
PWM and
WakeUp
PWM
FR
FGS
Logic
Core
Lock
U
V
Over Current
Thermal
W
UVLO
GND
DRV10964
7.3 Feature Description
7.3.1 Sleep Mode
When the PWM commanded duty cycle input is lower than 0.38%, but not 0%, the phase outputs will be put into
a high impedance state. The device will stop driving the motor. The device logic is still active during standby
mode and the DRV10964 device will consume current as specified by IVCC
.
版权 © 2016, Texas Instruments Incorporated
7
DRV10964
ZHCSEQ8 –MARCH 2016
www.ti.com.cn
Feature Description (接下页)
When the PWM commanded duty cycle input is driven to 0% (less than VIL_PWM for at least tSLEEP time), the
DRV10964 device will enter a low power sleep mode. In sleep mode, most of the circuitry in the device will be
disabled to minimize the system current. The current consumption in this state is specified by IVCC_SLEEP
.
The device will remain in sleep mode until either the PWM commanded duty cycle input is driven to a logic high
(higher than VIH_PWM) or the PWM input pin is allowed to float. If the input is allowed to float an internal pullup
resistor will raise the voltage to a logic high level.
Recovering from sleep mode is treated the same as power on condition as illustrated in 图 14.
As part of the device initialization the motor resistance value and the motor Kt value are measured during the
initial motor spin up as shown in 图 14.
7.3.2 Speed Input and Control
The DRV10964 provides three-phase 25-kHz PWM outputs which have an average value of sinusoidal
waveforms from phase to phase. When any phase is measured with reference to ground, the waveform observed
will be a PWM encoded sinusoid coupled with third order harmonics as shown in 图 2. This encoding scheme
simplifies the driver requirements because there will always be one phase output that is equal to zero.
U-V
V-W
W-U
U
V
W
Sinusoidal Voltage from Phase to Phase Sinusoidal Voltage from Phase to GND
With Third Order Harmonics
PWM Output
Average Value
PWM Encoded Phase Output and the Average Value
图 2. Sinusoidal Phase Encoding Used in DRV10964
The output amplitude is determined by the supply voltage (VCC) and the commanded PWM duty cycle (PWM) as
described in 公式 1 and illustrated in 图 3. The maximum amplitude is applied when the commanded PWM duty
cycle is 100%.
Vphpk = PWMdc × VCC
(1)
VCC
100% output
Vphpk
VCC*PWMdc
图 3. Output Voltage Amplitude Adjustment
The motor speed is controlled indirectly by using the PWM command to control the amplitude of the phase
voltages which are applied to the motor.
8
版权 © 2016, Texas Instruments Incorporated
DRV10964
www.ti.com.cn
ZHCSEQ8 –MARCH 2016
Feature Description (接下页)
The duty cycle of PWM input is converted into a 9-bit digital number (from 0 to 511). The control resolution is
1/512 ≈ 0.2%. The duty cycle analyzer implements a first order transfer function between the input duty cycle and
the 9-bit digital number. This is illustrated in 图 4 and 图 5.
9-bit Digital
Number
Amplitude of Output
Sin-wave
PWM In
PWM Output
Duty Cycle Analyzer
AVS
图 4. PWM Command Input Controls the Output Peak Amplitude
VCC/2
255
255
No AVS or Software
(511 is the Maximum)
50%
Output at Peak
Current Limit Occurs
50%
图 5. Example of PWM Command Input Controlling the Output
The transfer function between the PWM commanded duty cycle and the output peak amplitude is adjustable in
the DRV10964 device. The output peak amplitude is described by 公式 1 when PWMdc > minimum operation
duty cycle. The minimum operation duty cycle is 10%. When the PWM commanded duty cycle is lower than
minimum operation duty cycle and higher than 0.38%, the output will be controlled at the minimum operation duty
cycle. When the input duty cycle is lower than 0.38%, the DRV10964 device will not drive the output, and enters
the standby mode. This is illustrated in 图 6.
Output Duty
10%
0
10%
Input Duty
Minimum Duty Cycle = 10%
图 6. Speed Control Transfer Function
7.3.3 Motor Direction Change
The DRV10964 can be easily configured to drive the motor in either direction by setting the input on the FR
(Forward Reverse) pin to a logic 1 or logic 0 state. The direction of commutation as described by the
commutation sequence is illustrated in 表 1.
表 1. Motor Direction Phase Sequencing
FR = 0
FR = 1
Motor direction
U->V->W
U->W->V
版权 © 2016, Texas Instruments Incorporated
9
DRV10964
ZHCSEQ8 –MARCH 2016
www.ti.com.cn
7.3.4 Motor Frequency Feedback (FG)
During operation of the DRV10964 device, the FG pin provides an indication of the speed of the motor. The
output provided on this pin is configured by applying a logic signal to the FGS pin.
The formula to determine the speed of the motor is:
IF FGS = 0, RPM = (FREQFG × 60)/number of pole pairs
IF FGS = 1, RPM = (FREQFG × 60 × 3)/number of pole pairs
(2)
(3)
During Open Loop Acceleration the FG pin will provide an indication of the frequency of the signal which is
driving the motor. The lock condition of the motor is not known during Open Loop Acceleration so it is possible
that the FG could be toggling during this time even though the motor is not moving.
The FG pin has built in short circuit protection, which limits the current in the event that the pin is shorted to VCC.
The current will be limited to ISC_FG
.
7.3.4.1 Tach Feedback During Spin Down
The DRV10964 will provide feedback on the FG pin during spin down of the motor. 图 7 illustrates the behavior
of the FG output. When DRV10964 PWM input is at 0% DRV10964 will provide the output of the U phase
comparator on the FG pin until the motor speed drops below 10 Hz. When the motor speed is below 10 Hz the
device will enter into the Sleep state and the FG output will be held at a constant value based on the last BEMF
zero cross detection.
Closed Loop
FG = defined by FGS
Operation
Command PWM = 0%
Wait for Motor to Stop FG = U to CT BEMF comparator
Speed < 10 Hz
Sleep
FG = 0 or 1 (will not toggle)
图 7. TACH Feedback on Spin Down
7.3.5 Lock Detection
When the motor is locked by some external condition the DRV10964 will detect the lock condition and will take
action to protect the motor and the device. The lock condition must be properly detected whether it occurs as a
result of a slowly increasing load or a sudden shock.
The DRV10964 reacts to lock conditions by stopping the motor drive. To stop driving the motor the phase
outputs are placed into a high impedance state. To prevent the current which is flowing in the motor from being
returned to the power supply (VCC) the DRV10964 uses an Ant-Voltage Surge feature. For more information on
this feature, see Anti-Voltage Surge (AVS). After successfully transitioning into a high impedance state as the
result of a lock condition the DRV10964 will attempt to restart the motor after tOFF_LOCK seconds.
The DRV10964 has a comprehensive lock detect function which includes 5 different lock detect schemes. Each
of these schemes detects a particular condition of lock as illustrated in 图 8.
10
版权 © 2016, Texas Instruments Incorporated
DRV10964
www.ti.com.cn
ZHCSEQ8 –MARCH 2016
No motor
Frequency Overflow
BEMF abnormal
Accelerate abnormal
Speed abnormal
Tri-state
and Restart
Logic
图 8. Lock Detect
The behavior of each lock detect scheme is described in the following sections.
7.3.5.1 Lock0: No Motor
The Phase U current is checked after transitioning from open loop to closed loop. If Phase U current is not
greater than 50mA then the motor is not connected. This is reported as a locked condition.
7.3.5.2 Lock1: Frequency Overflow
For most applications the maximum electrical frequency of the motor will be less than 3 kHz. If the motor is
stopped then the BEMF voltage will be zero. Under this condition, when the DRV10964 device is in the closed
loop mode, the sensor less control algorithm will continue to accelerate the electrical commutation rate even
though the motor is not spinning. A lock condition is triggered if the electrical frequency exceeds 3 kHz.
7.3.5.3 Lock2: BEMF Abnormal
For any specific motor, the integrated value of BEMF during half of an electrical cycle will be a constant as
illustrated by the shaded green area in 图 9. This is true regardless of whether the motor runs fast or slow. The
DRV10964 monitors this value and uses it as a criterion to determine if the motor is in a lock condition.
The DRV10964 uses the integrated BEMF to determine the Kt value of the motor during the initial motor start.
Based on this measurement a range of acceptable Kt values is established. This range is between 1/2 x Kt and 4
x Kt During closed loop motor operation the Ktc value is continuously updated. If the calculated Ktc goes beyond
the acceptable range a lock condition is triggered. This is illustrated in 图 10.
图 9. BEMF Integration
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11
DRV10964
ZHCSEQ8 –MARCH 2016
www.ti.com.cn
4 x Kt
Kt
Ktc
0.5 x Kt
Lock detect
图 10. Abnormal Kt Lock Detect
7.3.5.3.1 Lock 3: Accelerate Abnormal
This lock condition is active when the DRV10964 device is operating in the closed loop mode. When the closed
loop commutation rate becomes lower than 1/2 of the previous commutation period then this is an indication that
the motor is not moving. Under this condition the accelerate abnormal condition will be triggered.
7.3.5.4 Lock4: Speed Abnormal
If the motor is in normal operation the motor BEMF will always be less than the voltage applied to the phase. The
DRV10964 sensorless control algorithm is continuously updating the value of the motor BEMF based on the
speed of the motor and the motor Kt as shown in 图 11. If the calculated value for motor BEMF is higher than the
applied voltage (U) for a certain period of time (tON_LOCK) then there is an error in the system. The calculated
value for motor BEMF is wrong or the motor is out of phase with the commutation logic. When this condition is
detected a lock detect is triggered.
Rm
M
BEMF = kt * speed
U
If speed > U / kt
Lock is triggered.
图 11. BEMF Monitoring
7.3.6 Short Circuit Current Protection
The short circuit current protection function shuts off drive to the motor by placing the motor phases into a high
impedance state if the current in any motor phase exceeds the short circuit protection limit ISHT. The DRV10964
device will go through the initialization sequence and will attempt to restart the motor after the short circuit
condition is removed. This function is intended to protect the device and the motor from catastrophic failure when
subjected to a short circuit condition.
7.3.7 Anti-Voltage Surge (AVS)
Under normal operation the DRV10964 acts to transfer energy from the power supply to the motor to generate
torque, which results in angular rotation of the motor. Under certain conditions, however, energy which is stored
in the motor in the form of inductive energy or angular momentum (mechanical energy) can be returned to the
power supply. This can happen whenever the output voltage is quickly interrupted or whenever the voltage
applied to the motor becomes less than the BEMF voltage generated by the motor. The energy which is returned
to the supply can cause the supply voltage to increase. This condition is referred to as voltage surge.
12
版权 © 2016, Texas Instruments Incorporated
DRV10964
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ZHCSEQ8 –MARCH 2016
The DRV10964 includes an anti-voltage-surge (AVS) feature which prevents energy from being transferred from
the motor to the power supply. This feature helps to protect the DRV10964 as well as any other components that
are connected to the power supply (VCC).
7.3.7.1 Protecting Against the Return of Mechanical Energy
Mechanical energy is typically returned to the power supply when the speed command is abruptly decreased. If
the voltage applied to the phase becomes less than the BEMF voltage then the motor will work as a generator
and current will flow from the motor back to VCC. This is illustrated in 图 12. To prevent this from happening, the
DRV10964 buffers the speed command value and limits the rate at which it is able to change. The AVS function
acts to ensure that the effective output amplitude (U) is maintained to be larger than the BEMF voltage. This
prevents current from becoming less than zero. The value of BEMF used to perform this function is calculated by
the motor Kt and the motor speed.
Rm
I
M
U = BEMF + I * Rm
BEMF = kt * speed
AVS: UMIN = BEMF
If U < BEMF, I<0.
If U > BEMF, I>0.
图 12. Mechanical AVS
7.3.7.2 Protecting Against the Return of Inductive Energy
When the DRV10964 suddenly stops driving the motor, the current which is flowing in the motor’s inductance will
continue to flow. It flows through the intrinsic body diodes in the mosfets and charges VCC. An example of this
behavior is illustrated by the two pictures in the top half of 图 13. When the driver is active, the current flows from
S1 to the motor and then to S6 and is returned to ground. When the driver is placed into a high impedance (tri-
state) mode, the current goes flows from ground through the body diode of S2 to the motor and then through the
body diode of S5 to VCC. The current will continue to flow through the motor’s inductance in this direction until
the inductive energy is dissipated.
图 13. Inductive AVS
The lower two pictures in 图 13 illustrate how the AVS circuit in the DRV10964 device prevents this energy from
being returned to the supply. When the AVS condition is detected the DRV10964 device will act to turn on the
low side device designated as S6. This allows the current flowing in the motor inductance to be returned to
ground instead of being directed to the VCC supply voltage.
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DRV10964
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7.3.8 Overtemperature Protection
The DRV10964 contains a thermal shut down function which disables motor operation when the device junction
temperature has exceeded TSD. Motor operation will resume when the junction temperature becomes lower than
TSD - TSD_HYS
.
7.3.9 Undervoltage Protection
The DRV10964 contains an undervoltage lockout feature, which prevents motor operation whenever the supply
voltage (VCC) becomes too low. Upon power up, the DRV10964 will operate once VCC rises above VUVLO_H
.
The DRV10964 will continue to operate until VCC falls below VUVLO_L
.
7.3.10 CONFIG Configuration
The CONFIG pin provides an option for selecting the open loop to closed loop threshold. This is accomplished
with the selection of a resistor divider between VCC and GND which is connected to the CONFIG pin. See
Electrical Characteristics.
7.4 Device Functional Modes
7.4.1 Spin up Settings
7.4.1.1 Motor Kt and Rm
DRV10964 utilizes information about the motor's torque constant and resistance to control motor timing. These
parameters are measured during the initial motor spin up as shown in 图 14.
7.4.1.2 Motor Start
DRV10964 will start the motor using a procedure which is illustrated in 图 14.
Power On
Calibration
Align
40 ms
Resistance
Measurement
Open Loop
Accelerate
Coasting
Kt
Wait TOFF_LOCK
Measurement
Close Loop
Closed Loop
Lock Detected
图 14. DRV10964 Initialization and Motor Start-up Sequence
7.4.1.3 Initial Speed Detect (ISD)
The ISD function is used to identify the initial condition of the motor.
Phase-to-phase comparators are used to detect the zero crossings of the motor’s BEMF voltage while it is
coasting (motor phase outputs are in high-impedance state). 图 15 shows the configuration of the comparators.
14
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DRV10964
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ZHCSEQ8 –MARCH 2016
Device Functional Modes (接下页)
degrees
60
V
+
+
U
W
图 15. Initial Speed Detect Function
The motor speed is determined by measuring the time between two rising edges of either of the comparators.
If neither of the comparator outputs toggle for a given amount of time (80 ms), the condition is defined as
stationary and the Align state will begin. If the comparators are toggling at a speed that is greater than this
threshold then the DRV10964 will wait for the motor to slow down until the toggling is less than the threshold and
it can be treated as stationary.
7.4.1.4 Align
To align the rotor to the commutation logic the DRV10964 applies a 50% duty cycle on phases V and W while
holding phase U at GND. This condition is maintained for 0.64 seconds. In order to avoid a sudden change in
current that could result in undesirable acoustics the 50% duty cycle is applied gradually to the motor over 0.3
seconds.
7.4.1.5 Handoff and Closed Loop
When the motor accelerates to the velocity defined by the voltage applied to the CONFIG pin, commutation
control transitions from open loop mode to closed loop mode. The commutation drive sequence and timing is
determined by the internal control algorithm and the applied voltage is determined by the PWM commanded duty
cycle input.
The selection of handoff threshold can be determined by experimental testing. The goal is to choose a handoff
threshold that is as low as possible and allows the motor to smoothly and reliably transition between the open
loop acceleration and the closed loop acceleration. Normally higher speed motors (maximum speed) require a
higher handoff threshold because higher speed motors have lower Kt and as a result lower BEMF. 表 2 shows
the configurable settings for the handoff threshold. Maximum speed in electrical hertz are shown as a guide to
assist in identifying the appropriate handoff speed for a particular application.
表 2. Motor Handoff Speed Threshold Options
MAXIMUM SPEED (Hz)
350 to approximately 400
<100
Hand Off Frequency (Hz)
CONFIG[3:0]
0x0
87.5
12.5
25
0x1
100 to approximately 150
150 to approximately 200
200 to approximately 250
250 to approximately 300
300 to approximately 350
350 to approximately 400
400 to approximately 450
450 to approximately 500
0x2
37.5
50
0x3
0x4
62.5
75
0x5
0x6
87.5
100
112.5
0x7
0x8
0x9
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DRV10964
ZHCSEQ8 –MARCH 2016
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Device Functional Modes (接下页)
表 2. Motor Handoff Speed Threshold Options (接下页)
MAXIMUM SPEED (Hz)
500 to approximately 560
560 to approximately 620
620 to approximately 700
700 to approximately 800
800 to approximately 900
>900
Hand Off Frequency (Hz)
CONFIG[3:0]
125
137.5
150
0xA
0xB
0xC
0xD
0xE
0xF
162.5
175
187.5
16
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DRV10964
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ZHCSEQ8 –MARCH 2016
8 Application and Implementation
注
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
DRV10964 is used in sensorless three-phase BLDC motor control. The driver provides a high performance, high
reliability, flexible and simple solution for compute fan applications. The following design shows a common
application of the DRV10964.
8.2 Typical Application
VCC
100k
VCC
1
2
3
4
5
FG
PWM 10
FG
PWMIN
FGS
VCC
W
CONFIG
9
8
7
6
FG Status
VCC
FR
U
Direction
2.2 µF
GND
V
M
图 16. Typical Application Schematic
8.2.1 Design Requirements
表 3 lists several key motor characteristics and recommended ranges which the DRV10964 is capable of driving.
However, that does not necessarily mean motors outside these boundaries cannot be driven by DRV10964.
Recommended ranges listed in 表 3 can serve as a general guideline to quickly decide whether DRV10964 is a
good fit for an application. Motor performance is not ensured for all uses.
表 3. Key Motor Characteristics and Recommended Ranges
Rm (Ω)
Lm (µH)
Kt (mV/Hz)
fFG_max (Hz)
Recommended Value
2.5 ~ 10
50 ~ 1000
1 ~ 100
1300
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Rm - Motor phase resistance between phase to phase;
Lm - Motor phase to phase inductance between phase to phase;
Kt - Motor BEMF constant from phase to center tape;
fFG_max - Maximum electrical frequency. Maximum motor speed can be calculated from:
•
•
If FGS = 1, RPM = (fFG_max × 3 x 60)/ number of pole pairs
If FGS = 0, RPM = (fFG_max × 120)/ number of pole pairs
8.2.2 Detailed Design Procedure
1. Refer to Design Requirements and make sure your system meets the recommended application range.
2. Refer to the DRV10964 Tuning Guide and measure the motor parameters.
3. Refer to the DRV10964 Tuning Guide. Configure the parameters using DRV10964 GUI, and optimize the
motor operation. The Tuning Guide takes the user through all the configurations step by step, including: start-up
operation, closed-loop operation, current control, initial positioning, lock detection, and anti-voltage surge.
4. Build your hardware based on Layout Guidelines.
5. Connect the device into system and validate your system solution
8.2.3 Application Curves
NOTE: FG_OUT Signal Being Held HIGH During Locked Rotor
Condition (Stall)
图 18. Reference PCB Start-Up (Align-Acceleration) Profile
图 17. Reference PCB Sinusoidal Current Profile
图 19. Reference PCB Open Loop and Close Loop
图 20. Reference PCB Closed Loop
18
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DRV10964
www.ti.com.cn
ZHCSEQ8 –MARCH 2016
9 Power Supply Recommendations
The DRV10964 is designed to operate from an input voltage supply, V(VCC), range from 2.1 and 5.5 V. The user
must place a 2.2-μF ceramic capacitor rated for VCC as close as possible to the VCC and GND pin.
10 Layout
10.1 Layout Guidelines
The package uses an exposed pad to remove heat from the device. For proper operation, this pad must be
thermally connected to copper on the PCB to dissipate heat. On a multi-layer PCB with a ground plane, this can
be accomplished by adding a number of vias to connect the thermal pad to the ground plane. On PCBs without
internal planes, copper area can be added on either side of the PCB to dissipate heat. If the copper area is on
the opposite side of the PCB from the device, thermal vias are used to transfer the heat between top and bottom
layers.
For details about how to design the PCB, refer to TI application report, PowerPAD™ Thermally Enhanced
Package (SLMA002), and TI application brief, PowerPAD™ Made Easy (SLMA004), available at www.ti.com. In
general, the more copper area that can be provided, the more power can be dissipated.
10.2 Layout Example
2.2 uF
GND
100k
10 PWM
FG 1
100k
FGS 2
9 CONFIG
8 FR
GND
(PPAD)
VCC 3
W 4
7 U
6 V
GND 5
图 21. DRV10964 Layout Example
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11 器件和文档支持
11.1 社区资源
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.2 商标
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.3 静电放电警告
这些装置包含有限的内置 ESD 保护。 存储或装卸时,应将导线一起截短或将装置放置于导电泡棉中,以防止 MOS 门极遭受静电损
伤。
11.4 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 机械、封装和可订购信息
以下页中包括机械、封装和可订购信息。这些信息是针对指定器件可提供的最新数据。这些数据会在无通知且不对
本文档进行修订的情况下发生改变。欲获得该数据表的浏览器版本,请查阅左侧的导航栏。
20
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IMPORTANT NOTICE
邮寄地址: 上海市浦东新区世纪大道1568 号,中建大厦32 楼邮政编码: 200122
Copyright © 2016, 德州仪器半导体技术(上海)有限公司
PACKAGE OPTION ADDENDUM
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10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
DRV10964FFDSNR
DRV10964FFDSNT
ACTIVE
ACTIVE
SON
SON
DSN
DSN
10
10
3000 RoHS & Green
250 RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
-40 to 125
-40 to 125
964FF1
964FF1
NIPDAU
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
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Addendum-Page 2
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