LM74502HQDDFRQ1 [TI]
汽车类反极性保护控制器，过压保护，栅极驱动强度 11mA | DDF | 8 | -40 to 125;
| 型号： | LM74502HQDDFRQ1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 汽车类反极性保护控制器，过压保护，栅极驱动强度 11mA | DDF | 8 | -40 to 125 栅极驱动 控制器 |
| 文件： | 总28页 (文件大小：1901K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LM74502-Q1, LM74502H-Q1
ZHCSNL2A –FEBRUARY 2022 –REVISED MAY 2022
LM74502-Q1、LM74502H-Q1 具有过压保护功能的汽车类低IQ 反极性保护控制
器
1 特性
3 说明
• 具有符合AEC-Q100 标准的下列特性
LM74502-Q1、LM74502H-Q1 是符合汽车 AEC-Q100
标准的控制器，与外部背对背连接的 N 沟道 MOSFET
配合工作，可实现低损耗反极性保护和负载断开解决方
案。3.2V 至 65V 的宽电源输入范围可实现对众多常用
直流总线电压（例如：12V、24V 和 48V 汽车电池系
统）的控制。3.2V 输入电压支持适用于汽车系统中严
苛的冷启动要求。该器件可以承受并保护负载免受低至
–65V 的负电源电压的影响。LM74502-Q1 、
LM74502H-Q1 没有反向电流阻断功能，适用于对有可
能将能量传输回输入电源的负载（如汽车车身控制模块
电机负载）提供输入反极性保护。
– 器件温度等级1：
–40°C 至+125°C 环境工作温度范围
– 器件HBM ESD 分类等级2
– 器件CDM ESD 分类等级C4B
• 3.2V 至65V 输入范围（3.9V 启动）
• -65V 输入反向电压额定值
• 集成电荷泵用于驱动
– 外部背对背N 沟道MOSFET
– 外部高侧开关MOSFET
– 外部反极性保护MOSFET
• 栅极驱动器型号
LM74502-Q1 控制器可提供适用于外部 N 沟道
MOSFET 的电荷泵栅极驱动器。LM74502-Q1 的高电
压额定值有助于简化满足 ISO7637 汽车保护测试标准
的系统设计。当使能引脚处于低电平时，控制器关闭，
消耗大约 1µA 的电流，从而在进入睡眠模式时提供低
系统电流。LM74502-Q1 具有可编程的过压和欠压保
护功能，可在发生这些故障时将负载从输入源切断。
– LM74502-Q1：60μA 峰值栅极驱动拉电流能力
– LM74502H-Q1：11mA 峰值栅极驱动拉电流能
力
• 2A 峰值栅极灌电流能力
• 1µA 关断电流（EN/UVLO = 低电平）
• 45µA 典型工作静态电流（EN/UVLO = 高电平）
• 可调节过压和欠压保护
• 采用额外的TVS 二极管，符合汽车ISO7637 脉冲
1 瞬态要求
器件信息(1)
封装尺寸（标称值）
器件型号
封装
LM74502-Q1
LM74502H-Q1
• 采用8 引脚SOT-23 封装2.90mm × 1.60mm
SOT-23 (8)
2.90mm × 1.60mm
2 应用
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附
录。
• 车身电子装置和照明
• 汽车信息娱乐系统- 数字仪表组、音响主机
• 汽车USB 集线器
Q1
VBATT
VOUT
VIN
VOUT
CIN
CIN
COUT
COUT
SRC
SRC
GATE
VS
VS
GATE
CVCAP
CVCAP
R1
R1
VCAP
OV
VCAP
OV
LM74502-Q1
GND
LM74502-Q1
GND
EN / UVLO
EN/UVLO
OFF
ON
OFF
ON
R2
R2
LM74502-Q1 具有过压保护功能的负载开关控制器
LM74502-Q1 典型应用原理图
本文档旨在为方便起见，提供有关TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问
www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SNOSDE0
LM74502-Q1, LM74502H-Q1
ZHCSNL2A –FEBRUARY 2022 –REVISED MAY 2022
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Table of Contents
10 Application and Implementation................................15
10.1 Application Information........................................... 15
10.2 Typical Application.................................................. 15
10.3 Surge Stopper Using LM74502-Q1,
LM74502H-Q1.............................................................20
10.4 Fast Turn-On and Turn-Off High Side Switch
Driver Using LM74502H-Q1........................................21
11 Power Supply Recommendations..............................23
12 Layout...........................................................................23
12.1 Layout Guidelines................................................... 23
12.2 Layout Example...................................................... 23
13 Device and Documentation Support..........................24
13.1 接收文档更新通知................................................... 24
13.2 支持资源..................................................................24
13.3 Trademarks.............................................................24
13.4 Electrostatic Discharge Caution..............................24
13.5 术语表..................................................................... 24
14 Mechanical, Packaging, and Orderable
1 特性................................................................................... 1
2 应用................................................................................... 1
3 说明................................................................................... 1
4 Revision History.............................................................. 2
5 Device Comparison Table...............................................3
6 Pin Configuration and Functions...................................4
7 Specifications.................................................................. 5
7.1 Absolute Maximum Ratings........................................ 5
7.2 ESD Ratings............................................................... 5
7.3 Recommended Operating Conditions.........................5
7.4 Thermal Information....................................................6
7.5 Electrical Characteristics.............................................6
7.6 Switching Characteristics............................................7
7.7 Typical Characteristics................................................8
8 Parameter Measurement Information..........................10
9 Detailed Description......................................................11
9.1 Overview................................................................... 11
9.2 Functional Block Diagram......................................... 11
9.3 Feature Description...................................................12
9.4 Device Functional Modes..........................................14
Information.................................................................... 25
4 Revision History
注：以前版本的页码可能与当前版本的页码不同
Changes from Revision * (February 2022) to Revision A (May 2022)
Page
• 将状态从“预告信息”更改为“量产数据”....................................................................................................... 1
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5 Device Comparison Table
Parameter
LM74502-Q1
LM74502H-Q1
Gate drive strength
11 mA
60 μA
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6 Pin Configuration and Functions
EN/UVLO
SRC
OV
8
1
2
GND
7
6
GATE
VS
N.C
3
4
5
VCAP
图6-1. DDF Package 8-Pin SOT-23 LM74502-Q1, LM74502H-Q1 Top View
表6-1. LM74502-Q1, LM74502H-Q1 Pin Functions
PIN
I/O(1)
DESCRIPTION
NO.
NAME
EN/UVLO input. Connect to VS pin for always ON operation. Can be driven externally from a
micro controller I/O. Pulling this pin low below V(ENF) makes the device enter into low Iq
shutdown mode. For UVLO, connect an external resistor ladder from input supply to EN/
UVLO to GND.
1
EN/UVLO
I
2
3
4
GND
N.C
G
Ground pin
No connection
—
VCAP
O
Charge pump output. Connect to external charge pump capacitor.
Input power supply pin to the controller. Connect a 100-nF capacitor across VS and GND
pins.
5
6
VS
I
GATE
O
Gate drive output. Connect to gate of the external N-channel MOSFET.
Adjustable overvoltage threshold input. Connect a resistor ladder across input and output.
When the voltage at OV pin exceeds the overvoltage cutoff threshold, then the GATE is
pulled low. GATE turns ON when the OV pin voltage goes below the OV protection falling
threshold.
7
8
OV
I
I
Connect OV pin to GND if OV feature is not used.
Source pin. Connect to common source point of external back-to-back connected N-channel
MOSFETs or the source pin of the high side switch MOSFET.
SRC
(1) I = Input, O = Output, G = GND
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7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
–65
–0.3
V(VS)
MAX
65
UNIT
V
VS to GND
EN/UVLO, OV to GND, V(VS) > 0 V
Input Pins
65
V
(65 + V(VS)
)
EN/UVLO, OV, V(VS) ≤0 V
(V(VS) + 0.3)
V
V
SRC to GND, V(VS) ≤0 V
Input Pins
SRC to GND, V(VS) > 0 V
GATE to SRC
V(VS)
15
–(70 –V(VS)
)
0
–0.3
–40
–40
V
Output Pins
VCAP to VS
15
V
Operating junction temperature(2)
Storage temperature, Tstg
150
150
°C
°C
(1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply
functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If
used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully
functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
(2) High junction temperatures degrade operating lifetimes. Operating lifetime is de-rated for junction temperatures greater than 125°C.
7.2 ESD Ratings
VALUE
UNIT
Human body model (HBM), per AEC Q100-002(1)
±2000
Corner pins (EN, VCAP, SRC,
VS)
V(ESD)
Electrostatic discharge
±750
±500
V
Charged device model (CDM),
per AEC Q100-011
Other pins
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)(1)
MIN
–60
–60
22
NOM
MAX
60
UNIT
VS to GND
Input Pins
V
EN/UVLO, OV, SRC to GND
60
VS
nF
µF
External
capacitance
VCAP to VS
0.1
External
MOSFET max GATE to SRC
VGS rating
15
V
TJ
Operating junction temperature range(2)
150
°C
–40
(1) Recommended Operating Conditions are conditions under which the device is intended to be functional. For specifications and test
conditions, see electrical characteristics
(2) High junction temperatures degrade operating lifetimes. Operating lifetime is de-rated for junction temperatures greater than 125°C.
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7.4 Thermal Information
LM74502-Q1
LM74502H-Q1
THERMAL METRIC(1)
UNIT
DDF (SOT)
8 PINS
133.8
72.6
RθJA
RθJC(top)
RθJB
ΨJT
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
54.5
Junction-to-top characterization parameter
Junction-to-board characterization parameter
4.6
54.2
ΨJB
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
7.5 Electrical Characteristics
TJ = –40°C to +125°C; typical values at TJ = 25°C, V(VS) = 12 V, C(VCAP) = 0.1 µF, V(EN/UVLO) = 3.3 V, over operating free-air
temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
VS SUPPLY VOLTAGE
V(VS)
Operating input voltage
VS POR Rising threshold
VS POR Falling threshold
VS POR Hysteresis
4
60
3.9
3.1
0.67
1.5
65
V
V
V (VS_POR)
2.2
2.8
V
V(VS POR(Hys))
I(SHDN)
0.44
V
Shutdown Supply Current
Operating Quiescent Current
V(EN/UVLO) = 0 V
0.9
45
µA
µA
I(Q)
IGND
I(S) leakage current during input
reverse polarity
I(REV)
100
150
µA
0 V ≤V(VS) ≤–65 V
ENABLE INPUT
V(EN_UVLOF)
Enable/UVLO falling threshold
Enable/UVLO rising threshold
1.027
1.16
1.14
1.24
1.235
1.32
V
V
V(EN_UVLOR)
Enable threshold voltage for low IQ
shutdown
V(ENF)
0.32
38
0.64
0.94
V(EN_Hys)
I(EN)
Enable Hysteresis
Enable sink current
90
3
132
5
mV
µA
V(EN/UVLO) = 12 V
GATE DRIVE
I(GATE)
Peak source current
Peak source current
40
3
60
11
77
µA
V
V
(GATE) –V(SRC) = 5 V
mA
(GATE) –V(SRC) = 5 V, LM74502H-Q1
I(GATE)
EN/UVLO= High to Low
(GATE) –V(SRC) = 5 V
Peak sink current
2370
mA
V
EN/UVLO = High to Low
RDSON
discharge switch RDSON
0.4
2
Ω
V
(GATE) –V(SRC) = 100 mV
CHARGE PUMP
Charge Pump source current (Charge
pump on)
162
300
5
600
10
µA
µA
V
V
(VCAP) –V(S) = 7 V
(VCAP) –V(S) = 14 V
I(VCAP)
Charge Pump sink current (Charge
pump off)
Charge pump voltage at V(S) = 3.2 V
Charge pump turn-on voltage
Charge pump turn-off voltage
8
10.3
11
V
V
V
V(VCAP) –V(VS)
V(VCAP) –V(VS)
V(VCAP) –V(VS)
I(VCAP) ≤30 µA
11.6
12.4
13
13.9
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7.5 Electrical Characteristics (continued)
TJ = –40°C to +125°C; typical values at TJ = 25°C, V(VS) = 12 V, C(VCAP) = 0.1 µF, V(EN/UVLO) = 3.3 V, over operating free-air
temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
Charge Pump Enable comparator
Hysteresis
0.45
0.8
1.25
7.5
V
V
V
V
(VCAP) –V(VS)
V(VCAP UVLO)
V(VCAP UVLO)
V
(VCAP) –V(VS) UV release at rising
5.7
6.5
5.4
edge
V
(VCAP) –V(VS) UV threshold at falling
5.05
6.2
edge
OVERVOLTAGE PROTECTION
V(OVR)
V(OVF)
V(OV_Hys)
I(OV)
Overvoltage threshold input, rising
1.165
1.063
1.25
1.143
100
1.333
1.222
V
V
Overvoltage threshold input, falling
OV Hysteresis
mV
nA
OV Input leakage current
0 V < V(OV) < 5 V
12
50
110
7.6 Switching Characteristics
TJ = –40°C to +125°C; typical values at TJ = 25°C, V(VS) = 12 V, CIN = C(VCAP) = COUT = 0.1 µF, V(EN/UVLO) = 3.3 V, over
operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
V(VCAP) > V(VCAP UVLOR), V(EN/UVLO) step
from (0 V to > V(EN_UVLOR) ) , V(GATE-
SRC) > 5 V, C(GATE-SRC) = 4.7
nF, LM74502H-Q1
ENTDLY
EN high to Gate Turn-on delay
75
110
µs
tEN_OFF(deg)_G
V
(EN/UVLO) ↓to V(GATE-SRC) < 1 V,
GATE Turn-off delay during EN/UVLO
GATE Turn-off delay during OV
2
µs
µs
C(GATE-SRC) = 4.7 nF
ATE
tOVP_OFF(deg)_
V
(OV) ↑to V(GATE-SRC) < 1 V, C(GATE-
0.6
1
SRC) = 4.7 nF
GATE
V
(OV) ↓to V(GATE-SRC) > 5 V, C(GATE-
tOVP_ON(deg)_G
GATE Turn-on delay during OV
5
10
µs
SRC) = 4.7 nF
LM74502H-Q1,
ATE
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7.7 Typical Characteristics
7
420
390
360
330
300
270
240
210
180
150
120
90
–40C
25C
85C
125C
150C
5.6
4.2
2.8
1.4
0
–40C
25C
85C
125C
150C
60
30
0
0
5
10 15 20 25 30 35 40 45 50 55 60 65
VS (V)
0
5
10 15 20 25 30 35 40 45 50 55 60 65
VS (V)
图7-2. Operating Quiescent Current vs Supply Voltage
图7-1. Shutdown Supply Current vs Supply Voltage
390
360
330
300
270
240
210
550
–40C
500
450
400
350
300
250
200
150
100
25C
85C
125C
150C
–40C
25C
180
150
120
90
85C
125C
150C
60
3
4
5
6
7
8
9
10
11
12
0
2
4
6
8
10
12
VS (V)
VCAP (V)
图7-3. Charge Pump Current vs Supply Voltage at VCAP = 6 V
图7-4. Charge Pump V-I Characteristics at VS > = 12 V
240
1.35
Enable/UVLO rising
Enable/UVLO falling
–40C
220
25C
85C
125C
150C
200
180
160
140
120
100
80
1.28
1.21
1.14
1.07
1
60
40
20
-40
0
40
80
120
160
0
1
2
3
4
5
6
7
8
9
Free-Air Temperature (C)
VCAP (V)
图7-6. EN/UVLO Rising and Falling threshold vs Temperature
图7-5. Charge Pump V-I Characteristics at VS = 3.2 V
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7.7 Typical Characteristics (continued)
85
14
13.4
12.8
12.2
11.6
11
VCAP ON
VCAP OFF
80
75
70
65
60
-40
0
40
80
120
160
-40
0
40
80
120
160
Free-Air Temperature (C)
Free-Air Temperature (C)
图7-8. Charge Pump ON and OFF Threshold vs Temperature
图7-7. Enable to Gate Delay vs Temperature
(LM74502H-Q1)
7.4
3.2
VCAP UVLOR
VCAP UVLOF
VS PORR
VS PORF
7
6.6
6.2
5.8
5.4
5
3
2.8
2.6
2.4
2.2
-40
0
40
80
120
160
-40
0
40
80
120
160
Free-Air Temperature (C)
Free-Air Temperature (C)
图7-9. Charge Pump UVLO Threshold vs Temperature
图7-10. VS POR Threshold vs Temperature
1.4
6
5
4
3
2
1
0
OV Rising
OV Falling
1.32
1.24
1.16
1.08
1
GATE OFF
GATE ON
-40
0
40
80
120
160
-40
0
40
80
120
160
Free-Air Temperature (C)
Free-Air Temperature (C)
图7-11. OV Comparator Threshold vs Temperature
图7-12. OV to GATE Delay vs Temperature (LM74502H-Q1)
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8 Parameter Measurement Information
3.3 V
VEN/UVLOF
–
0.1 V
VENF
0 V
0 V
12.4 V
12.4 V
90%
1 V
0 V
0 V
ttUVLO_OFF(deg)GATE
t
tENTDLY
t
0.1 V
–
VOVF
0.1 V
+
VOVR
0 V
0 V
12.4 V
12.4 V
5 V
1 V
0 V
0 V
ttOVP_OFF(deg)GATE
t
ttOVP_ON(deg)GATEt
图8-1. Timing Waveforms
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9 Detailed Description
9.1 Overview
The LM74502-Q1, LM74502H-Q1 controller has all the features necessary to implement an efficient and fast
reverse polarity protection circuit with load disconnect function. This easy to use reverse polarity protection
controller is paired with an external back-to-back connected N-channel MOSFETs to replace other reverse
polarity schemes such as a P-channel MOSFETs. The wide input supply of 4 V to 65 V allows protection and
control of 12-V and 24-V automotive battery powered ECUs. The device can withstand and protect the loads
from negative supply voltages down to –65 V. An integrated charge pump drives external back-to-back
connected N-channel MOSFETs with gate drive voltage of approximately 12.4 V to realize reverse polarity
protection and load disconnect function in case of overvoltage and undervoltage event. LM74502-Q1 with it's
typical gate drive strength of 60 μA provides smooth start-up with inherent inrush current control due to its lower
gate drive strength. LM74502H-Q1 with it's 11-mA typical peak gate drive strength is suitable for applications
which need faster turn on such as load switch applications. LM74502-Q1 features an adjustable overvoltage
cutoff protection feature using a programming resistor divider to OV terminal. LM74502-Q1 features enable
control. With the enable pin low during the standby mode, both the external MOSFETs and controller is off and
draws a very low 1 μA of current.
9.2 Functional Block Diagram
VIN
VOUT
GATE
SRC
VS
VCAP
CP
VS
Gate
Driver
VCAP
Internal
Rails
Charge
Pump
Enable
Logic
Gate Drive
Enable
Logic
VS
UVLOb EN
OV
OV
+
EN
1.25 V
1.14 V
EN/UVLO
+
1 V
VS
0.3 V
+
UVLOb
1.25 V
1.14 V
Reverse
Protection Logic
LM74502-Q1
LM74502H-Q1
GND
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9.3 Feature Description
9.3.1 Input Voltage (VS)
The VS pin is used to power the LM74502-Q1's internal circuitry, typically drawing 45 µA when enabled and 1 µA
when disabled. If the VS pin voltage is greater than the POR Rising threshold, then LM74502-Q1 operates in
either shutdown mode or conduction mode in accordance with the EN/UVLO pin voltage. The voltage from VS to
GND is designed to vary from 65 V to –65 V, allowing the LM74502-Q1 to withstand negative voltage transients.
9.3.2 Charge Pump (VCAP)
The charge pump supplies the voltage necessary to drive the external N-channel MOSFET. An external charge
pump capacitor is placed between VCAP and VS pin to provide energy to turn on the external MOSFET. For the
charge pump to supply current to the external capacitor the EN/UVLO pin, voltage must be above the specified
input high threshold, V(EN_IH). When enabled the charge pump sources a charging current of 300-µA typically. If
EN/UVLO pins is pulled low, then the charge pump remains disabled. To ensure that the external MOSFET can
be driven above its specified threshold voltage, the VCAP to VS voltage must be above the undervoltage lockout
threshold, typically 6.5 V, before the internal gate driver is enabled. Use 方程式 1 to calculate the initial gate
driver enable delay.
T
(DRV_EN) = 75 µs + C(VCAP) × V(VCAP_UVLOR)
300 µA
(1)
where
• C(VCAP) is the charge pump capacitance connected across VS and VCAP pins
• V(VCAP_UVLOR) = 6.5 V (typical)
To remove any chatter on the gate drive approximately 800 mV of hysteresis is added to the VCAP undervoltage
lockout. The charge pump remains enabled until the VCAP to VS voltage reaches 12.4 V, typically, at which
point the charge pump is disabled decreasing the current draw on the VS pin. The charge pump remains
disabled until the VCAP to VS voltage is below to 11.6 V typically at which point the charge pump is enabled.
The voltage between VCAP and VS continue to charge and discharge between 11.6 V and 12.4 V as shown in
图 9-1. By enabling and disabling the charge pump, the operating quiescent current of the LM74502-Q1 is
reduced. When the charge pump is disabled it sinks 5-µA typical.
TDRV_EN
TON
TOFF
VIN
VS
0 V
VEN
12.4 V
11.6 V
VCAP-VS
6.5 V
V(VCAP UVLOR)
GATE DRIVER
(GATE to SRC)
ENABLE
图9-1. Charge Pump Operation
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9.3.3 Gate Driver (GATE an SRC)
The gate driver is used to control the external N-Channel MOSFET by setting the appropriate GATE to SRC
voltage.
Before the gate driver is enabled following three conditions must be achieved:
• The EN/UVLO pin voltage must be greater than the specified input high voltage.
• The VCAP to VS voltage must be greater than the undervoltage lockout voltage.
• The VS voltage must be greater than VS POR Rising threshold.
If the above conditions are not achieved, then the GATE pin is internally connected to the SRC pin, assuring that
the external MOSFET is disabled. After these conditions are achieved the gate driver operates in the conduction
mode enhancing the external MOSFET completely.
The controller offers two gate drive variants. LM74502-Q1 with typical peak gate drive strength of 60 μA is
suitable to achieve smooth start-up with inherent inrush current control due to its lower gate drive strength.
LM74502H-Q1 with its 11-mA typical peak gate drive strength is suitable for applications which need faster turn-
on such as load switch applications.
LM74502-Q1, LM74502H-Q1 SRC pin is capable of handling negative voltage which also makes it suitable for
load disconnect switch applications with loads which are inductive in nature.
9.3.3.1 Inrush Current Control
An external circuit as shown in 图 9-2 can be added on the GATE pin of the LM74502-Q1 to have additional
inrush current control for the applications which have large capacitive loads.
Q1
RG
Cdvdt
GATE
SRC
LM74502-Q1
图9-2. Inrush Current Limiting Using LM74502-Q1
The CdVdT capacitor is required for slowing down the GATE voltage ramp during power up for inrush current
limiting. Use 方程式2 to calculate CdVdT capacitance value.
C
dvdt = IGATE × COUT
IINRUSH
(2)
where IGATE is 60 μA (typical), IINRUSH is the inrush current and COUT is the output load capacitance. An extra
resistor, RG, in series with the CdVdT capacitor acts as an isolation resistor between Cdvdt and gate of the
MOSFET.
The inrush current control scheme shown in 图 9-2 is not applicable to LM74502H-Q1 as its gate drive is
optimized for fast turn-on load switch applications.
9.3.4 Enable and Undervoltage Lockout (EN/UVLO)
The LM74502-Q1 has an enable pin, EN/UVLO. The enable pin allows for the gate driver to be either enabled or
disabled by an external signal. If the EN/UVLO pin voltage is greater than the rising threshold, the gate driver
and charge pump operates as described in Gate Driver and Charge Pump sections. If the enable pin voltage is
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less than the input low threshold, the charge pump and gate driver are disabled placing the LM74502-Q1 in
shutdown mode. The EN/UVLO pin can withstand a voltage as large as 65 V and as low as –65 V. This feature
allows for the EN/UVLO pin to be connected directly to the VS pin if enable functionality is not needed. In
conditions where EN/UVLO is left floating, the internal sink current of 3 uA pulls EN/UVLO pin low and disables
the device.
An external resistor divider connected from input to EN/UVLO to ground can be used to implement the input
Undervoltage Lockout (UVLO) functionality. When EN/UVLO pin voltage is lower than UVLO comparator falling
threshold (VEN/UVLOR) but higher than enable falling threshold (VENF), the device disables gate drive voltage,
however, charge pump is kept on. This action ensures quick recovery of gate drive when UVLO condition is
removed. If UVLO functionality is not required, connect EN/UVLO pin to VS.
9.3.5 Overvoltage Protection (OV)
LM74502-Q1 provides programmable overvoltage protection feature with OV pin. A resistor divider can be
connected from input source to OV pin to ground to set overvoltage threshold. An internal comparator compares
the input voltage against fixed reference (1.25 V) and disables the gate drive as soon as OV pin voltage goes
above the OV comparator reference. When the resistor divider is referred from input supply side, the device is
configured for overvoltage cutoff functionality. When the resistor divider is referred from output side (VOUT), the
device is configured for overvoltage clamp functionality.
When OV pin voltage goes above OV comparator VOVR threshold (1.25-V typical), the device disables gate
drive, however, charge pump remains active. When OV pin voltage falls below VOVF threshold (1.14-V typical),
the gate is quickly turned on as charge pump is kept on and the device does not go through the device start-up
process. When OV pin is not used, it can be connected to ground.
9.4 Device Functional Modes
9.4.1 Shutdown Mode
The LM74502-Q1 enters shutdown mode when the EN/UVLO pin voltage is below the specified input low
threshold V(EN_IL). Both the gate driver and the charge pump are disabled in shutdown mode. During shutdown
mode the LM74502-Q1 enters low IQ operation with the VS pin only sinking 1 µA.
9.4.2 Conduction Mode
For the LM74502-Q1, LM74502H-Q1 to operate in conduction mode the gate driver must be enabled as
described in the Gate Driver (GATE an SRC) section. If these conditions are achieved the GATE pin is
• Internally driven through 60-μA current source in case of LM74502-Q1
• Internally connected to the VCAP for fast turn-on of external FET in case of LM74502H-Q1
LM74502-Q1, LM74502H-Q1 gate drive is disabled when OV pin voltage is above VOVR threshold or EN/UVLO
pin voltage is lower than VEN/UVLOF threshold.
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10 Application and Implementation
备注
Information in the following applications sections is not part of the TI component specification, and TI
does not warrant its accuracy or completeness. TI’s customers are responsible for determining
suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
10.1 Application Information
The LM74502-Q1 is used with N-Channel MOSFET controller in a typical reverse polarity protection application.
The schematic for the 12-V battery protection application is shown in 图 10-1 where the LM74502-Q1 is used to
drive back-to-back connected MOSFETs Q1 and Q2 in series with a battery to realize reverse polarity protection
and load disconnect solution. The TVS is not required for the LM74502-Q1 to operate, but they are used to
clamp the positive and negative voltage surges. TI recommends the output capacitor COUT to protect the
immediate output voltage collapse as a result of line disturbance.
10.2 Typical Application
Q1
Q2
VOUT
VBATT
12 V
CIN
0.1 µF
COUT
220 µF
SMBJ33CA
SRC
GATE
VS
CVCAP
220 nF
R1
100 kΩ
VCAP
OV
LM74502-Q1
EN / UVLO
OFF
ON
R2
3.5 kΩ
GND
图10-1. Typical Application Circuit
10.2.1 Design Requirements
表10-1 list design examples with system design parameters.
表10-1. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
12-V battery, 12-V nominal with 3.2-V cold crank and 35-V load
dump
Input voltage range
Output voltage
Output current range
Output capacitance
3.2 V during cold crank to 35-V load dump
3-A nominal, 5-A maximum
220-µF typical output capacitance
Overvoltage Protection
37-V typical
Automotive EMC compliance
ISO 7637-2 and ISO 16750-2
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10.2.2 Detailed Design Procedure
10.2.2.1 Design Considerations
• Input operating voltage range, including overvoltage conditions
• Nominal load current and maximum load current
10.2.2.2 MOSFET Selection
The important MOSFET electrical parameters are the maximum continuous drain current, ID, the maximum
drain-to-source voltage, VDS(MAX), the maximum source current through body diode, and the drain-to-source On
resistance, RDSON
.
The maximum continuous drain current, ID, rating must exceed the maximum continuous load current. The
maximum drain-to-source voltage, VDS(MAX), must be high enough to withstand the highest differential voltage
seen in the application. This requirement includes any anticipated fault conditions. TI recommends to use
MOSFETs with voltage rating up to 60-V maximum with the LM74502-Q1 because SOURCE pin maximum
voltage rating is 65 V. The maximum VGS LM74502-Q1 can drive is 13.9 V, so a MOSFET with 15-V minimum
VGS rating must be selected. If a MOSFET with VGS rating < 15 V is selected, a Zener diode can be used to
clamp VGS to safe level.
To reduce the MOSFET conduction losses, lowest possible RDS(ON) is preferred. Selecting a MOSFET with
RDS(ON) that gives VDS drop 20 mV to 50 mV at full load provides good trade off in terms of power dissipation
and cost.
Thermal resistance of the MOSFET must be considered against the expected maximum power dissipation in the
MOSFET to ensure that the junction temperature (TJ) is well controlled.
10.2.2.3 Overvoltage Protection
Resistors R1 and R2 connected in series is used to program the overvoltage threshold. Connecting R1 to VIN
provides overvoltage cutoff and switching the connection to VOUT provides overvoltage clamp response. The
resistor values required for setting the overvoltage threshold VOV to 37 V are calculated by solving 方程式3
R2 × VOV
VOVR
=
R1 + R2
(3)
For minimizing the input current drawn from the supply through resistors R1 and R2, TI recommends to use
higher value of resistance. Using high value resistors adds error in the calculations because the current through
the resistors at higher value becomes comparable to the leakage current into the OV pin. Select (R1 + R2) such
that current through resistors is around 100 times higher than the leakage through OV pin. Based on the device
electrical characteristics, VOVR is 1.25 V, select (R1) = 100 kΩand R2 = 3.5 kΩas a standard resistor value to
set overvoltage cutoff of 37 V.
Based on application use case, overvoltage threshold can be set at the lower voltage as it enables lower rated
downstream components, thus providing solution size and lower cost benefit.
10.2.2.4 Charge Pump VCAP, Input and Output Capacitance
Minimum required capacitance for charge pump VCAP and input and output capacitance are:
• VCAP: Minimum recommended value of VCAP (µF) ≥10 × CISS(MOSFET_effective) (µF),
CVCAP of 0.22 µF is selected
• CIN: Typical input capacitor of 0.1 µF
• COUT: Typical output capacitor 220 µF
10.2.3 Selection of TVS Diodes for 12-V Battery Protection Applications
TVS diodes are used in automotive systems for protection against transients. In the 12-V battery protection
application circuit shown in 图 10-1, a bi-directional TVS diode is used to protect from positive and negative
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transient voltages that occur during normal operation of the car and these transient voltage levels and pulses are
specified in ISO 7637-2 and ISO 16750-2 standards.
The two important specifications of the TVS are breakdown voltage and clamping voltage. Breakdown voltage is
the voltage at which the TVS diode goes into avalanche similar to a Zener diode and is specified at a low current
value typical 1 mA and the breakdown voltage must be higher than worst case steady state voltages seen in the
system. The breakdown voltage of the TVS+ must be higher than 24-V jump start voltage and 35-V suppressed
load dump voltage and less than the maximum input voltage rating of LM74502-Q1 (65 V). The breakdown
voltage of TVS– must be higher than maximum reverse battery voltage –16 V, so that the TVS– is not
damaged due to long time exposure to reverse connected battery.
Clamping voltage is the voltage the TVS diode clamps in high current pulse situations and this voltage is much
higher than the breakdown voltage. TVS diodes are meant to clamp transient pulses and must not interfere with
steady state operation. In the case of an ISO 7637-2 pulse 1, the input voltage goes up to –150 V with a
generator impedance of 10 Ω. This action translates to 15 A flowing through the TVS– and the voltage across
the TVS is close to its clamping voltage.
The next criterion is that the absolute minimum rating of source voltage of the LM74502-Q1 (–65 V) and the
maximum VDS rating MOSFET are not exceeded. In the design example, 60-V rated MOSFET is chosen.
SMBJ series of TVS' are rated up to 600-W peak pulse power levels. This rating is sufficient for ISO 7637-2
pulses and suppressed load dump (ISO-16750-2 pulse B).
10.2.4 Selection of TVS Diodes and MOSFET for 24-V Battery Protection Applications
Typical 24-V battery protection application circuit shown in 图10-2 uses two uni-directional TVS diodes to protect
from positive and negative transient voltages.
Q1
Q2
VOUT
VBATT
24 V
CIN
0.1 µF
COUT
220 µF
TVS+
SMBJ58A
SRC
GATE
VS
CVCAP
220 nF
R1
TVS-
SMBJ26A
VCAP
OV
LM74502-Q1
EN / UVLO
OFF
ON
R2
GND
图10-2. Typical 24-V Battery Protection with Two Uni-Directional TVS
The breakdown voltage of the TVS+ must be higher than 48-V jump start voltage, less than the absolute
maximum ratings of source and enable pin of LM74502-Q1 (65 V) and must withstand 65-V suppressed load
dump. The breakdown voltage of TVS– must be lower than maximum reverse battery voltage –32 V, so that
the TVS–is not damaged due to long time exposure to reverse connected battery.
During ISO 7637-2 pulse 1, the input voltage goes up to –600 V with a generator impedance of 50 Ω. Single bi-
directional TVS cannot be used for 24-V battery protection because breakdown voltage for TVS+ ≥ 48 V,
maximum negative clamping voltage is ≤ –65 V . Two uni-directional TVS connected back-to-back must be
used at the input. For positive side TVS+, TI recommends SMBJ58A with the breakdown voltage of 64.4 V
(minimum), 67.8 (typical). For the negative side TVS–, TI recommends SMBJ26A with breakdown voltage close
to 32 V (to withstand maximum reverse battery voltage –32 V) and maximum clamping voltage of 42 V.
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For 24-V battery protection, TI recommends a 75-V rated MOSFET to be used along with SMBJ26A and
SMBJ58A connected back-to-back at the input.
10.2.5 Application Curves
图10-3. ISO 7637-2 Pulse 1
Time (2.5 ms/DIV)
图10-4. Response to ISO 7637-2 Pulse 1 (–150 V)
Time (4 ms/DIV)
Time (40 ms/DIV)
图10-6. Start-up with No Load
图10-5. Start-up with Input Reverse Voltage (–12
V)
Time (20 ms/DIV)
Time (4 ms/DIV)
图10-8. Overvoltage Cutoff Response (37 V)
图10-7. Start-up with 5-A Load
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Time (20 ms/DIV)
Time (10 ms/DIV)
图10-10. Overvoltage Clamp Response
图10-9. Overvoltage Recovery
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10.3 Surge Stopper Using LM74502-Q1, LM74502H-Q1
Many automotive applications are designed to comply with unsuppressed load dump transients specified by
ISO16750-2 Pulse 5A. LM74502, LM74502H can be configured as input surge stopper to provide overvoltage
along with input reverse supply protection and protect the downstream loads in case of unsuppressed load dump
event.
Q1
200 V
Q2
60 V
24-V VBATT
200-V Unsuppressed
Load Dump
VOUT
R1
10 k
CIN
0.1 µF
COUT
220 µF
VOUT
(OV Clamp)
R2
100 k
VIN
OV cut-off
SRC
VS
GATE
OV
DZ
R3
3.5 k
CVS
1 µF
60 V
VCAP
CVCAP
220 nF
LM74502-Q1
GND
EN/UVLO
OFF
ON
图10-11. Typical Surge Stopper Application for 24-V Powered Systems
As shown in 图 10-11, MOSFET Q1 is used to turn off or clamp output voltage to acceptable safe level and
protect the MOSFET Q2 and LM74502 from input transient. Note that only the VS pin is exposed to input
transient through a resistor, R1. A 60-V rated Zener diode is used to clamp and protect the VS pin within
recommended operating condition. Th rest of the circuit is not exposed to higher voltage as the MOSFET Q1 can
either be turned off completely or output voltage clamped to safe level.
10.3.1 VS Capacitance, Resistor R1 and Zener Clamp (DZ)
A minimum of 1-µF CVS capacitance is required. During input overvoltage transient, resistor R1 and Zener diode,
DZ, are used to protect VS pin from exceeding the maximum ratings by clamping VVS to 60 V. Choosing R1 = 10
kΩ, the peak power dissipated in Zener diode DZ can be calculated using 方程式4 .
PDZ = VDZ × (VIN(MAX) – VDZ)
R1
(4)
Where VDZ is the breakdown voltage of Zener diode. Select the Zener diode that can handle peak power
requirement.
Peak power dissipated in resistor R1 can be calculated using 方程式5.
PR1 = (VIN(MAX) – VDZ)2
R1
(5)
Select a resistor package which can handle peak power and maximum DC voltage.
10.3.2 Overvoltage Protection
For the overvoltage setting, refer to the resistor selection procedure described in Overvoltage Protection. Select
(R2) = 100 kΩand R3 = 3.5 kΩas a standard resistor value to set overvoltage cutoff of 37 V.
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10.3.3 MOSFET Selection
The VDS rating of the MOSFET Q1 must be minimum VIN(max) for designs with output overvoltage cutoff where
output can reach 0 V with higher loads. For designs with output overvoltage clamp, MOSFET VDS rating must
be (VIN(max) – VOUT_CLAMP). The VGS rating is based on GATE-SRC maximum voltage of 15 V. TI recommends
a 20-V VGS rated MOSFET. Power dissipation on MOSFET Q1 on a design where output is clamped is critical
and SOA characteristics of the MOSFET must be considered with sufficient design margin for reliable operation.
An additional Zener diode from GATE to SRC can be needed to protect the external FET in case output is
expected to drop to the level where it can exceed external FET VGS(max) rating.
图10-12. 200-V Surge Stopper with Overvoltage Cutoff Using LM74502-Q1
10.4 Fast Turn-On and Turn-Off High Side Switch Driver Using LM74502H-Q1
In automotive load driving applications N-Channel MOSFET based high side switch is very commonly used to
disconnect the loads from supply line in case of faults such as overvoltage event . LM74502-Q1, LM74502H-Q1
can be used to drive external MOSFET to realize simple high side switch with overvoltage protection. 图 10-13
shows a typical application circuit where LM74502H-Q1 is used to drive external MOSFET Q1 as a main power
path connect and disconnect switch. A resistor divider from input to OV pin to ground can be used the set the
overvoltage threshold.
If VOUT node (SRC pin) of the device is expected to drop in case of events such as overcurrent or short-circuit
on load side then additional Zener diode is required across gate and source pin of external MOSFET to protect it
from exceeding its maximum VGS rating.
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Q1
VOUT
High Side
Switch
VIN
LOAD3
LOAD2
LOAD3
COUT
10 µF
CIN
4.7 µF
Low Side
Switch
VS
GATE
SRC
CVCAP
470 nF
VIN
R1
OV pin used for
overvoltage
protection
VCAP
OV
LM74502H-Q1
GND
DC/DC
Converter
R2
EN/UVLO
OFF
ON
OFF
ON
OV pin used as logic input for
fast turn ON/OFF of FET Q1
图10-13. Fast Turn-ON and OFF High Side Switch Using LM74502H-Q1
Many safety applications require fast switching off of the MOSFET in case of fault events such as overvoltage or
overcurrent fault. Some of the load driving path applications also require PWM operation of high side switch.
LM74502H-Q1 OV pin can be used as control input to realize fast turn-on and turn-off load switch functionality.
With OV pin pulled above VOVR threshold of (1.25-V typical), LM74502H-Q1 turns off the external MOSFET (with
Ciss = 4.7 nF) within 1 μs typically. When OV pin is pulled low, LM74502H-Q1 with its peak gate drive strength
of 11 mA turns on external MOSFET with turn-on speed of 7-μs typical. 图 10-14 shows LM74502H-Q1 GATE
to SRC response when OV pin is toggled with ON/OFF logic input.
图10-14. Fast Turn-On and Turn-Off High Side Switch Driver Using LM74502H-Q1
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11 Power Supply Recommendations
The LM74502-Q1, LM74502H-Q1 reverse polarity protection controller is designed for the supply voltage range
of 3.2 V ≤ VS ≤ 65 V. If the input supply is located more than a few inches from the device, TI recommends an
input ceramic bypass capacitor higher than 0.1 μF. Based on system requirements, a higher input bypass
capacitor can be needed with LM74502H-Q1 to avoid supply glitch in case of high inrush current start-up event.
To prevent LM74502-Q1 and surrounding components from damage under the conditions of a direct output short
circuit, use a power supply having overload and short-circuit protection.
12 Layout
12.1 Layout Guidelines
• Connect GATE and SRC pin of LM74502-Q1 close to the MOSFET's gate and source pin.
• Use thick traces for source and drain of the MOSFET to minimize resistive losses because the high current
path of for this solution is through the MOSFET.
• Keep the charge pump capacitor across VCAP and VS pin away from the MOSFET to lower the thermal
effects on the capacitance value.
• Connect the GATE pin of the LM74502-Q1 to the MOSFET gate with short trace. Avoid excessively thin and
long running trace to the Gate Drive.
12.2 Layout Example
Bo om Layer
Signal Via
VOUT
Q2
G
S
S
S
COUT
LM74502-Q1
8
SRC
OV
1
EN
GND
N.C
Q1
VIN
2
7
6
5
D
D
D
D
3
4
GATE
VS
VCAP
TVS
CIN
CVCAP
GND
GND
图12-1. Layout Example
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13 Device and Documentation Support
13.1 接收文档更新通知
要接收文档更新通知，请导航至 ti.com 上的器件产品文件夹。点击订阅更新 进行注册，即可每周接收产品信息更
改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。
13.2 支持资源
TI E2E™ 支持论坛是工程师的重要参考资料，可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解
答或提出自己的问题可获得所需的快速设计帮助。
链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范，并且不一定反映 TI 的观点；请参阅
TI 的《使用条款》。
13.3 Trademarks
TI E2E™ is a trademark of Texas Instruments.
所有商标均为其各自所有者的财产。
13.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
13.5 术语表
TI 术语表
本术语表列出并解释了术语、首字母缩略词和定义。
Copyright © 2022 Texas Instruments Incorporated
24
Submit Document Feedback
Product Folder Links: LM74502-Q1 LM74502H-Q1
LM74502-Q1, LM74502H-Q1
ZHCSNL2A –FEBRUARY 2022 –REVISED MAY 2022
www.ti.com.cn
14 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Copyright © 2022 Texas Instruments Incorporated
Submit Document Feedback
25
Product Folder Links: LM74502-Q1 LM74502H-Q1
PACKAGE OPTION ADDENDUM
www.ti.com
31-Oct-2022
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
LM74502HQDDFRQ1
LM74502QDDFRQ1
ACTIVE SOT-23-THIN
ACTIVE SOT-23-THIN
DDF
DDF
8
8
3000 RoHS & Green
3000 RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
-40 to 125
-40 to 125
502HQ
L502Q
Samples
Samples
NIPDAU
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
31-Oct-2022
OTHER QUALIFIED VERSIONS OF LM74502-Q1, LM74502H-Q1 :
Catalog : LM74502, LM74502H
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Addendum-Page 2
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