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SN74AXC1T45-Q1 [TI]

汽车单位双电源总线收发器;
SN74AXC1T45-Q1
型号： SN74AXC1T45-Q1
厂家： TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述：

汽车单位双电源总线收发器

总线收发器
文件： 总37页 (文件大小：1855K)
中文：  中文翻译
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SN74AXC1T45-Q1  
ZHCSK32B –FEBRUARY 2019–REVISED SEPTEMBER 2019  
具有可配置电压转换、三态输出且  
已通过汽车认证的 SN74AXC1T45-Q1 单比特位双电源总线收发器  
1 特性  
DIR 引脚决定信号传播的方向。DIR 引脚配置为高电  
平时，信号转换由端口 A 流向端口 B。DIR 配置为低  
电平时，则由端口 B 流向端口 A。DIR 引脚以 VCCA  
为基准，这意味着它的逻辑高电平和逻辑低电平阈值跟  
踪 VCCA 电压。  
1
•
符合面向汽车 应用的 AEC-Q100  
•
完全可配置的双轨设计可允许各个端口在 0.65V 至  
3.6V 的电源电压范围内运行  
•
•
•
工作温度：–40°C 至 +125°C  
无干扰电源定序  
该器件完全 适用于 使用 Ioff 电流的局部掉电应用。当  
器件掉电时，Ioff 保护电路可确保不从输入/输出或偏置  
到特定电压的快速 I/O 获取或向其提供多余电流。  
最大静态电流 (ICCA + ICCB) 为 8µA（最高 85°C）  
和 14µA（最高 125°C）  
•
•
从 1.8V 转换到 3.3V 时，支持高达 500Mbps 的转  
换速率  
VCC 隔离特性可确保当 VCCA 或 VCCB 低于 100mV  
VCC 隔离特性  
时，I/O 端口均禁用其输出并进入高阻抗状态。  
–
如果任何一个 VCC 输入低于 100mV，则所有  
I/O 输出均禁用且处于高阻抗状态  
无干扰电源定序使电源轨能以任何顺序打开或关断，从  
而提供强大的电源定序性能。  
•
•
•
Ioff 支持局部断电模式运行  
器件信息(1)  
闩锁性能超过 100mA，符合 JESD 78 II 类规范  
ESD 保护性能超过 JESD 22 规范要求  
器件型号  
封装  
封装尺寸（标称值）  
2.00mm × 1.25mm  
1.40mm x 1.00mm  
–
–
8000V 人体放电模型  
1000V 充电器件模型  
SN74AXC1T45QDCKRQ1 SC70 (6)  
SN74AXC1T45QDRYRQ1 SON (6)(2)  
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附  
录。  
2 应用  
(2) 预览器件  
•
•
•
•
ADAS 融合  
ADAS 前置摄像头  
HEV 电池管理系统  
信息娱乐系统音响主机  
功能方框图  
3 说明  
5
DIR  
SN74AXC1T45-Q1 是一款采用两个独立可配置电源轨  
的符合 AEC-Q100 标准的单比特位同相总线收发器。  
3
A
V
CCA 和 VCCB 电源电压低至 0.65V 时，该器件可正常  
工作。A 端口用于跟踪 VCCA，该端口可支持 0.65V 至  
3.6V 范围内的任何电源电压。B 端口用于跟踪 VCCB  
4
B
，
该端口也可支持 0.65V 至 3.6V 范围内的任何电源电  
压。此外，SN74AXC1T45-Q1 还与单电源系统兼容。  
V
V
CCB  
CCA  
1
本文档旨在为方便起见，提供有关 TI 产品中文版本的信息，以确认产品的概要。 有关适用的官方英文版本的最新信息，请访问 www.ti.com，其内容始终优先。 TI 不保证翻译的准确  
性和有效性。 在实际设计之前，请务必参考最新版本的英文版本。  
English Data Sheet: SCES901  
 
 
 
 
 
 
SN74AXC1T45-Q1  
ZHCSK32B –FEBRUARY 2019–REVISED SEPTEMBER 2019  
www.ti.com.cn  
目录  
8.3 Feature Description................................................. 20  
8.4 Device Functional Modes........................................ 21  
Application and Implementation ........................ 22  
9.1 Application Information............................................ 22  
9.2 Typical Applications ................................................ 22  
1
2
3
4
5
6
特性.......................................................................... 1  
应用.......................................................................... 1  
说明.......................................................................... 1  
修订历史记录 ........................................................... 2  
Pin Configuration and Functions......................... 3  
Specifications......................................................... 4  
6.1 Absolute Maximum Ratings ...................................... 4  
6.2 ESD Ratings.............................................................. 4  
6.3 Recommended Operating Conditions....................... 5  
6.4 Thermal Information.................................................. 5  
6.5 Electrical Characteristics........................................... 6  
6.6 Operating Characteristics: TA = 25°C ..................... 15  
6.7 Typical Characteristics............................................ 16  
Parameter Measurement Information ................ 18  
7.1 Load Circuit and Voltage Waveforms ..................... 18  
Detailed Description ............................................ 20  
8.1 Overview ................................................................. 20  
8.2 Functional Block Diagram ....................................... 20  
9
10 Power Supply Recommendations ..................... 25  
11 Layout................................................................... 25  
11.1 Layout Guidelines ................................................. 25  
11.2 Layout Example .................................................... 25  
12 器件和文档支持 ..................................................... 26  
12.1 文档支持................................................................ 26  
12.2 接收文档更新通知 ................................................. 26  
12.3 支持资源................................................................ 26  
12.4 商标....................................................................... 26  
12.5 静电放电警告......................................................... 26  
12.6 Glossary................................................................ 26  
13 机械、封装和可订购信息....................................... 26  
7
8
4 修订历史记录  
注：之前版本的页码可能与当前版本有所不同。  
Changes from Revision A (July 2019) to Revision B  
Page  
•
Device with DCK package is now Active status ..................................................................................................................... 3  
Changes from Original (February 2019) to Revision A  
Page  
•
•
•
已添加 将 DRY 封装添加到“器件信息”表中............................................................................................................................. 1  
Added DRY package to Pin Configuration and Functions ..................................................................................................... 3  
Added DRY package to Thermal Information table................................................................................................................ 5  
2
Copyright © 2019, Texas Instruments Incorporated  
 
SN74AXC1T45-Q1  
www.ti.com.cn  
ZHCSK32B –FEBRUARY 2019–REVISED SEPTEMBER 2019  
5 Pin Configuration and Functions  
DCK Package  
6-Pin SC70  
Top View  
VCCA  
VCCB  
1
2
3
6
5
4
GND  
A
DIR  
B
DRY Package(1)  
6-Pin SON  
Transparent Top View  
1
2
3
6
5
4
VCCA  
VCCB  
GND  
A
DIR  
B
(1) PREVIEW device  
Pin Functions  
PIN  
NAME  
VCCA  
GND  
A
TYPE  
DESCRIPTION  
NO.  
1
—
—
I/O  
I/O  
I
A-port supply voltage. 0.65V ≤ VCCA ≤ 3.6 V  
Ground  
2
3
Input/output A. This pin is referenced to VCCA  
Input/output B. This pin is referenced to VCCB  
Direction control signal. See for functionality  
B-port supply voltage. 0.65V ≤ VCCB ≤ 3.6 V.  
.
4
B
.
5
DIR  
VCCB  
6
—
Copyright © 2019, Texas Instruments Incorporated  
3
SN74AXC1T45-Q1  
ZHCSK32B –FEBRUARY 2019–REVISED SEPTEMBER 2019  
www.ti.com.cn  
6 Specifications  
6.1 Absolute Maximum Ratings  
over operating free-air temperature range (unless otherwise noted)(1)  
MIN  
–0.5  
–0.5  
–0.5  
–0.5  
–0.5  
–0.5  
–0.5  
MAX UNIT  
VCCA Supply voltage A  
VCCB Supply voltage B  
4.2  
4.2  
4.2  
4.2  
4.2  
4.2  
4.2  
V
V
I/O Ports (A Port)  
I/O Ports (B Port)  
Control Inputs  
A Port  
VI  
Input Voltage(2)  
V
VO  
VO  
Voltage applied to any output in the high-impedance or power-off state(2)  
Voltage applied to any output in the high or low state(2) (3)  
V
V
B Port  
A Port  
–0.5 VCCA + 0.2  
–0.5 VCCB + 0.2  
–50  
B Port  
IIK  
IOK  
IO  
Input clamp current  
VI < 0  
mA  
mA  
Output clamp current  
VO < 0  
–50  
Continuous output current  
Continuous current through VCC or GND  
Junction Temperature  
–50  
50 mA  
–100  
100 mA  
TJ  
150  
150  
°C  
°C  
TSTG  
Storage temperature  
–65  
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings  
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended  
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
(2) The input voltage and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.  
(3) The output positive-voltage rating may be exceeded up to 4.2 V maximum if the output current rating is observed.  
6.2 ESD Ratings  
VALUE  
±8000  
±1000  
UNIT  
Human body model (HBM), per AEC Q100-002(1)  
Charged device model (CDM), per AEC Q100-011  
V(ESD)  
Electrostatic discharge  
V
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.  
4
Copyright © 2019, Texas Instruments Incorporated  
 
SN74AXC1T45-Q1  
www.ti.com.cn  
ZHCSK32B –FEBRUARY 2019–REVISED SEPTEMBER 2019  
6.3 Recommended Operating Conditions  
over operating free-air temperature range (unless otherwise noted)(1)  
(2) (3)  
MIN  
0.65  
MAX UNIT  
VCCA  
VCCB  
Supply voltage A  
Supply voltage B  
3.6  
3.6  
V
V
0.65  
VCCI = 0.65 V - 0.75 V  
VCCI = 0.76 V - 1 V  
VCCI = 1.1 V - 1.95 V  
VCCI = 2.3 V - 2.7 V  
VCCI = 3 V - 3.6 V  
VCCI x 0.70  
VCCI x 0.70  
VCCI x 0.65  
1.6  
Data Inputs  
2
VIH  
High-level input voltage  
V
VCCA = 0.65 V - 0.75 V  
VCCA = 0.76 V - 1 V  
VCCA = 1.1 V - 1.95 V  
VCCA = 2.3 V - 2.7 V  
VCCA = 3 V - 3.6 V  
VCCI = 0.65 V - 0.75 V  
VCCI = 0.76 V - 1 V  
VCCI = 1.1 V - 1.95 V  
VCCI = 2.3 V - 2.7 V  
VCCI = 3 V - 3.6 V  
VCCA x 0.70  
VCCA x 0.70  
VCCA x 0.65  
1.6  
Control Input (DIR)  
Referenced to VCCA  
2
VCCI x 0.30  
VCCI x 0.30  
VCCI x 0.35  
0.7  
Data Inputs  
0.8  
VIL  
Low-level input voltage  
V
VCCA = 0.65 V - 0.75 V  
VCCA = 0.76 V - 1 V  
VCCA = 1.1 V - 1.95 V  
VCCA = 2.3 V - 2.7 V  
VCCA = 3 V - 3.6 V  
VCCA x 0.30  
VCCA x 0.30  
VCCA x 0.35  
0.7  
Control Input (DIR)  
Referenced to VCCA  
0.8  
(3)  
VI  
Input voltage  
0
0
0
3.6  
V
V
Active State  
Tri-State  
VCCO  
VO  
Output voltage  
3.6  
Δt/Δv  
Input transition rate  
100 ns/V  
125 °C  
TA  
Operating free-air temperature  
–40  
(1) VCCI is the VCC associated with the input port.  
(2) VCCO is the VCC associated with the output port.  
(3) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,  
Implications of Slow or Floating CMOS Inputs.  
6.4 Thermal Information  
SN74AXC1T45-Q1  
THERMAL METRIC(1)  
DCK (SC70)  
6 PINS  
235.3  
DRY (SON)(2)  
6 PINS  
305.2  
UNIT  
RθJA  
RθJC(top)  
RθJB  
ψJT  
Junction-to-ambient thermal resistance  
Junction-to-case (top) thermal resistance  
Junction-to-board thermal resistance  
°C/W  
°C/W  
°C/W  
°C/W  
°C/W  
160.5  
202.2  
76.9  
181.1  
Junction-to-top characterization parameter  
Junction-to-board characterization parameter  
59.7  
41.9  
ψJB  
77.1  
180.0  
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application  
report, SPRA953.  
(2) PREVIEW device  
Copyright © 2019, Texas Instruments Incorporated  
5
 
SN74AXC1T45-Q1  
ZHCSK32B –FEBRUARY 2019–REVISED SEPTEMBER 2019  
www.ti.com.cn  
6.5 Electrical Characteristics  
over operating free-air temperature range (unless otherwise noted)  
(1) (2)  
Operating free-air temperature (TA)  
PARAMETER  
TEST CONDITIONS  
VCCA  
VCCB  
-40°C to 85°C  
-40°C to 125°C  
UNIT  
MIN TYP(3) MAX  
MIN  
TYP MAX  
VCCO  
– 0.1  
VCCO  
– 0.1  
IOH = -100 µA  
0.7 V - 3.6 V 0.7 V - 3.6 V  
IOH = -50 µA  
IOH = -200 µA  
IOH = -500 µA  
0.65 V  
0.76 V  
0.85 V  
1.1 V  
1.4 V  
1.65 V  
2.3 V  
3 V  
0.65 V  
0.76 V  
0.85 V  
1.1 V  
1.4 V  
1.65 V  
2.3 V  
3 V  
0.55  
0.58  
0.65  
0.85  
1.05  
1.2  
0.55  
0.58  
0.65  
0.85  
1.05  
1.2  
High-level  
output  
voltage  
VOH  
VI = VIH  
V
IOH = -3 mA  
IOH = -6 mA  
IOH = -8 mA  
IOH = -9 mA  
IOH = -12 mA  
IOL = 100 µA  
IOL = 50 µA  
IOL = 200 µA  
IOL = 500 µA  
IOL = 3 mA  
IOL = 6 mA  
IOL = 8 mA  
IOL = 9 mA  
IOL = 12 mA  
1.75  
2.3  
1.75  
2.3  
0.7 V - 3.6 V 0.7 V - 3.6 V  
0.1  
0.1  
0.1  
0.65 V  
0.76 V  
0.85 V  
1.1 V  
1.4 V  
1.65 V  
2.3 V  
3 V  
0.65 V  
0.76 V  
0.85 V  
1.1 V  
1.4 V  
1.65 V  
2.3 V  
3 V  
0.1  
0.18  
0.2  
0.18  
0.2  
Low-level  
output  
voltage  
VOL  
VI = VIL  
0.25  
0.35  
0.45  
0.55  
0.7  
0.25  
0.35  
0.45  
0.55  
0.7  
V
Control input (DIR): VI =  
VCCA or GND  
0.65 V- 3.6 V 0.65 V- 3.6 V  
0.65 V- 3.6 V 0.65 V- 3.6 V  
–1  
–4  
1
4
–1.5  
–8  
1.5  
8
Input leakage  
current  
II  
µA  
A or B Port: Vi = VCCI or  
GND  
0 V  
0 V - 3.6 V  
0 V  
–5  
–5  
5
5
6
–7.5  
–7.5  
7.5  
7.5  
9
Partial power A or B Port: Vi or Vo = 0 V -  
down current 3.6 V  
Ioff  
µA  
µA  
0 V - 3.6 V  
0.65 V- 3.6 V 0.65 V- 3.6 V  
VCCA supply VI = VCCI  
IO = 0  
ICCA  
0 V  
3.6 V  
0 V  
–2  
–8  
current  
or GND  
3.6 V  
2
6
2
8
9
8
0.65 V- 3.6 V 0.65 V- 3.6 V  
VCCB supply VI = VCCI  
ICCB  
IO = 0  
IO = 0  
0 V  
3.6 V  
0 V  
µA  
current  
or GND  
3.6 V  
–2  
–8  
Combined  
supply  
current  
ICCA  
ICCB  
+
VI = VCCI  
or GND  
0.65 V- 3.6 V 0.65 V- 3.6 V  
8
14 µA  
pF  
Control input  
capacitance  
CI  
VI = 3.3 V or GND  
3.3 V  
3.3 V  
3.3 V  
0 V  
4.5  
5
4.5  
5
Data I/O  
capacitance,  
A Port  
VO = 1.65V DC +1 MHz -16  
dBm sine wave  
CIO  
pF  
Data I/O  
capacitance,  
B Port  
VO = 1.65V DC +1 MHz -16  
dBm sine wave  
CIO  
0 V  
3.3 V  
5
5
pF  
(1) VCCI is the VCC associated with the input port.  
(2) VCCO is the VCC associated with the output port.  
(3) All typical data is taken at 25°C.  
6
Copyright © 2019, Texas Instruments Incorporated  
 
SN74AXC1T45-Q1  
www.ti.com.cn  
ZHCSK32B –FEBRUARY 2019–REVISED SEPTEMBER 2019  
Table 1. Switching Characteristics, VCCA = 0.7 V  
B-Port Supply Voltage (VCCB  
)
Test  
Conditions  
PARAMETER  
FROM  
TO  
0.7 ± 0.05 V 0.8 ± 0.04 V 0.9 ± 0.045 V 1.2 ± 0.1 V  
MIN MAX MIN MAX MIN MAX MIN MAX  
1.5 ± 0.1 V  
MIN MAX  
1.8 ± 0.15 V  
MIN MAX  
2.5 ± 0.2 V  
MIN MAX  
3.3 ± 0.3 V  
MIN MAX  
UNIT  
-40°C to 85°C  
-40°C to 125°C  
-40°C to 85°C  
-40°C to 125°C  
-40°C to 85°C  
-40°C to 125°C  
-40°C to 85°C  
-40°C to 125°C  
-40°C to 85°C  
-40°C to 125°C  
-40°C to 85°C  
-40°C to 125°C  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
173  
173  
173  
173  
143  
143  
163  
163  
389  
406  
369  
395  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
117  
117  
154  
154  
143  
143  
123  
123  
331  
333  
313  
339  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
85  
85  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
51  
51  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
50  
50  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
53  
53  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
65  
65  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
143  
143  
80  
A
B
A
A
B
A
B
Propagation  
delay  
tpd  
ns  
127  
127  
143  
143  
100  
100  
287  
287  
281  
307  
88  
83  
82  
80  
B
88  
83  
82  
80  
80  
143  
143  
50  
143  
143  
45  
143  
143  
49  
143  
143  
61  
143  
143  
109  
109  
200  
200  
339  
365  
DIR  
DIR  
DIR  
DIR  
tdis Disable time  
ns  
ns  
50  
45  
49  
61  
143  
143  
247  
273  
134  
134  
246  
272  
137  
137  
249  
275  
147  
147  
261  
287  
ten Enable time  
Copyright © 2019, Texas Instruments Incorporated  
7
SN74AXC1T45-Q1  
ZHCSK32B –FEBRUARY 2019–REVISED SEPTEMBER 2019  
www.ti.com.cn  
Table 2. Switching Characteristics, VCCA = 0.8 V  
B-Port Supply Voltage (VCCB  
)
Test  
Conditions  
PARAMETER  
FROM  
TO  
0.7 ± 0.05 V 0.8 ± 0.04 V 0.9 ± 0.045 V 1.2 ± 0.1 V  
MIN MAX MIN MAX MIN MAX MIN MAX  
1.5 ± 0.1 V  
MIN MAX  
1.8 ± 0.15 V  
MIN MAX  
2.5 ± 0.2 V  
MIN MAX  
3.3 ± 0.3 V  
MIN MAX  
UNIT  
-40°C to 85°C  
-40°C to 125°C  
-40°C to 85°C  
-40°C to 125°C  
-40°C to 85°C  
-40°C to 125°C  
-40°C to 85°C  
-40°C to 125°C  
-40°C to 85°C  
-40°C to 125°C  
-40°C to 85°C  
-40°C to 125°C  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
153  
153  
117  
117  
100  
100  
151  
151  
321  
341  
309  
317  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
95  
95  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
64  
64  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
33  
33  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
27  
27  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
26  
26  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
27  
27  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
36  
36  
A
B
A
A
B
A
B
Propagation  
delay  
tpd  
ns  
96  
78  
52  
42  
41  
40  
39  
B
96  
78  
52  
42  
41  
40  
39  
100  
100  
111  
111  
261  
266  
251  
259  
100  
100  
88  
100  
100  
38  
100  
100  
32  
100  
100  
30  
100  
100  
30  
100  
100  
38  
DIR  
DIR  
DIR  
DIR  
tdis Disable time  
ns  
ns  
88  
38  
32  
30  
30  
38  
226  
229  
220  
228  
96  
80  
78  
76  
87  
97  
80  
78  
76  
87  
ten Enable time  
189  
197  
183  
191  
182  
190  
183  
191  
192  
200  
8
Copyright © 2019, Texas Instruments Incorporated  
SN74AXC1T45-Q1  
www.ti.com.cn  
ZHCSK32B –FEBRUARY 2019–REVISED SEPTEMBER 2019  
Table 3. Switching Characteristics, VCCA = 0.9 V  
B-Port Supply Voltage (VCCB  
)
Test  
Conditions  
PARAMETER  
FROM  
TO  
0.7 ± 0.05 V 0.8 ± 0.04 V 0.9 ± 0.045 V 1.2 ± 0.1 V  
MIN MAX MIN MAX MIN MAX MIN MAX  
1.5 ± 0.1 V  
MIN MAX  
1.8 ± 0.15 V  
MIN MAX  
2.5 ± 0.2 V  
MIN MAX  
3.3 ± 0.3 V  
MIN MAX  
UNIT  
-40°C to 85°C  
-40°C to 125°C  
-40°C to 85°C  
-40°C to 125°C  
-40°C to 85°C  
-40°C to 125°C  
-40°C to 85°C  
-40°C to 125°C  
-40°C to 85°C  
-40°C to 125°C  
-40°C to 85°C  
-40°C to 125°C  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
126  
126  
85  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
78  
78  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
52  
52  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
23  
23  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
18  
18  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
16  
16  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
15  
15  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
18  
18  
A
B
A
A
B
A
B
Propagation  
delay  
tpd  
ns  
64  
53  
40  
28  
24  
22  
21  
B
85  
64  
53  
40  
28  
24  
22  
21  
75  
75  
75  
75  
75  
75  
75  
75  
DIR  
DIR  
DIR  
DIR  
79  
79  
79  
79  
79  
79  
79  
79  
tdis Disable time  
ns  
ns  
144  
144  
282  
304  
262  
269  
105  
105  
223  
229  
214  
221  
82  
32  
25  
24  
21  
23  
83  
36  
28  
26  
21  
23  
195  
199  
188  
195  
77  
59  
54  
48  
54  
81  
62  
56  
49  
54  
ten Enable time  
159  
166  
154  
161  
152  
159  
151  
158  
154  
161  
Copyright © 2019, Texas Instruments Incorporated  
9
SN74AXC1T45-Q1  
ZHCSK32B –FEBRUARY 2019–REVISED SEPTEMBER 2019  
www.ti.com.cn  
Table 4. Switching Characteristics, VCCA = 1.2 V  
B-Port Supply Voltage (VCCB  
)
Test  
Conditions  
PARAMETER  
FROM  
TO  
0.7 ± 0.05 V 0.8 ± 0.04 V 0.9 ± 0.045 V 1.2 ± 0.1 V  
MIN MAX MIN MAX MIN MAX MIN MAX  
1.5 ± 0.1 V  
MIN MAX  
1.8 ± 0.15 V  
MIN MAX  
2.5 ± 0.2 V  
MIN MAX  
3.3 ± 0.3 V  
MIN MAX  
UNIT  
-40°C to 85°C  
-40°C to 125°C  
-40°C to 85°C  
-40°C to 125°C  
-40°C to 85°C  
-40°C to 125°C  
-40°C to 85°C  
-40°C to 125°C  
-40°C to 85°C  
-40°C to 125°C  
-40°C to 85°C  
-40°C to 125°C  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
87  
87  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
52  
52  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
39  
39  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
15  
15  
15  
15  
22  
29  
24  
30  
45  
51  
43  
49  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
9
10  
12  
12  
22  
29  
18  
23  
36  
41  
37  
44  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
8
9
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
7
7
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
7
8
A
B
A
A
B
A
B
Propagation  
delay  
tpd  
ns  
51  
33  
23  
10  
10  
22  
29  
16  
21  
33  
37  
36  
43  
7
7
B
51  
33  
23  
8
7
22  
22  
22  
22  
29  
13  
17  
26  
30  
35  
41  
22  
29  
13  
16  
29  
32  
35  
42  
DIR  
DIR  
DIR  
DIR  
29  
29  
29  
tdis Disable time  
ns  
ns  
137  
137  
240  
265  
115  
121  
98  
74  
98  
78  
185  
193  
80  
157  
164  
67  
ten Enable time  
86  
73  
10  
Copyright © 2019, Texas Instruments Incorporated  
SN74AXC1T45-Q1  
www.ti.com.cn  
ZHCSK32B –FEBRUARY 2019–REVISED SEPTEMBER 2019  
Table 5. Switching Characteristics, VCCA = 1.5 V  
B-Port Supply Voltage (VCCB  
)
Test  
Conditions  
PARAMETER  
FROM  
TO  
0.7 ± 0.05 V 0.8 ± 0.04 V 0.9 ± 0.045 V 1.2 ± 0.1 V  
MIN MAX MIN MAX MIN MAX MIN MAX  
1.5 ± 0.1 V  
MIN MAX  
1.8 ± 0.15 V  
MIN MAX  
2.5 ± 0.2 V  
MIN MAX  
3.3 ± 0.3 V  
MIN MAX  
UNIT  
-40°C to 85°C  
-40°C to 125°C  
-40°C to 85°C  
-40°C to 125°C  
-40°C to 85°C  
-40°C to 125°C  
-40°C to 85°C  
-40°C to 125°C  
-40°C to 85°C  
-40°C to 125°C  
-40°C to 85°C  
-40°C to 125°C  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
83  
83  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
42  
42  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
28  
28  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
12  
12  
10  
10  
15  
20  
22  
29  
38  
44  
33  
38  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
8
9
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
7
8
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
5
6
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
5
6
A
B
A
A
B
A
B
Propagation  
delay  
tpd  
ns  
50  
28  
18  
8
7
5
4
B
50  
28  
18  
9
8
6
5
15  
15  
15  
15  
20  
16  
21  
30  
36  
29  
35  
15  
20  
14  
19  
28  
33  
28  
34  
15  
20  
11  
15  
22  
26  
26  
32  
15  
20  
11  
14  
24  
27  
26  
32  
DIR  
DIR  
DIR  
DIR  
20  
20  
20  
tdis Disable time  
ns  
ns  
136  
136  
238  
263  
104  
109  
96  
72  
96  
76  
178  
186  
63  
151  
157  
49  
ten Enable time  
68  
54  
Copyright © 2019, Texas Instruments Incorporated  
11  
SN74AXC1T45-Q1  
ZHCSK32B –FEBRUARY 2019–REVISED SEPTEMBER 2019  
www.ti.com.cn  
Table 6. Switching Characteristics, VCCA = 1.8 V  
B-Port Supply Voltage (VCCB  
)
Test  
Conditions  
PARAMETER  
FROM  
TO  
0.7 ± 0.05 V 0.8 ± 0.04 V 0.9 ± 0.045 V 1.2 ± 0.1 V  
MIN MAX MIN MAX MIN MAX MIN MAX  
1.5 ± 0.1 V  
MIN MAX  
1.8 ± 0.15 V  
MIN MAX  
2.5 ± 0.2 V  
MIN MAX  
3.3 ± 0.3 V  
MIN MAX  
UNIT  
-40°C to 85°C  
-40°C to 125°C  
-40°C to 85°C  
-40°C to 125°C  
-40°C to 85°C  
-40°C to 125°C  
-40°C to 85°C  
-40°C to 125°C  
-40°C to 85°C  
-40°C to 125°C  
-40°C to 85°C  
-40°C to 125°C  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
81  
81  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
41  
41  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
24  
24  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
10  
10  
8
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
7
8
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
6
7
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
5
5
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
4
5
A
B
A
A
B
A
B
Propagation  
delay  
tpd  
ns  
53  
26  
16  
7
6
5
4
B
53  
26  
16  
9
7
7
5
4
13  
13  
13  
13  
18  
22  
28  
35  
42  
30  
34  
13  
18  
15  
20  
28  
33  
27  
32  
13  
18  
14  
18  
26  
32  
26  
31  
13  
18  
11  
14  
21  
24  
25  
29  
13  
18  
11  
13  
24  
26  
24  
29  
DIR  
DIR  
DIR  
DIR  
18  
18  
18  
tdis Disable time  
ns  
ns  
136  
136  
241  
266  
101  
105  
96  
72  
96  
75  
176  
184  
61  
148  
155  
44  
ten Enable time  
65  
48  
12  
Copyright © 2019, Texas Instruments Incorporated  
SN74AXC1T45-Q1  
www.ti.com.cn  
ZHCSK32B –FEBRUARY 2019–REVISED SEPTEMBER 2019  
Table 7. Switching Characteristics, VCCA = 2.5 V  
B-Port Supply Voltage (VCCB  
)
Test  
Conditions  
PARAMETER  
FROM  
TO  
0.7 ± 0.05 V 0.8 ± 0.04 V 0.9 ± 0.045 V 1.2 ± 0.1 V  
MIN MAX MIN MAX MIN MAX MIN MAX  
1.5 ± 0.1 V  
MIN MAX  
1.8 ± 0.15 V  
MIN MAX  
2.5 ± 0.2 V  
MIN MAX  
3.3 ± 0.3 V  
MIN MAX  
UNIT  
-40°C to 85°C  
-40°C to 125°C  
-40°C to 85°C  
-40°C to 125°C  
-40°C to 85°C  
-40°C to 125°C  
-40°C to 85°C  
-40°C to 125°C  
-40°C to 85°C  
-40°C to 125°C  
-40°C to 85°C  
-40°C to 125°C  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
80  
80  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
40  
40  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
22  
22  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
7
8
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
5
6
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
5
5
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
4
5
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
4
4
A
B
A
A
B
A
B
Propagation  
delay  
tpd  
ns  
66  
27  
15  
7
5
5
4
3
B
66  
27  
15  
7
6
5
5
4
10  
10  
10  
10  
13  
21  
27  
33  
39  
22  
26  
10  
13  
14  
20  
25  
31  
24  
24  
10  
13  
13  
17  
24  
29  
20  
23  
10  
13  
10  
13  
19  
23  
23  
23  
10  
13  
10  
12  
22  
25  
19  
22  
DIR  
DIR  
DIR  
DIR  
13  
13  
13  
tdis Disable time  
ns  
ns  
136  
136  
254  
278  
99  
95  
71  
95  
75  
176  
185  
55  
147  
153  
41  
ten Enable time  
98  
58  
40  
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Table 8. Switching Characteristics, VCCA = 3.3 V  
B-Port Supply Voltage (VCCB  
)
Test  
Conditions  
PARAMETER  
FROM  
TO  
0.7 ± 0.05 V 0.8 ± 0.04 V 0.9 ± 0.045 V 1.2 ± 0.1 V  
MIN MAX MIN MAX MIN MAX MIN MAX  
1.5 ± 0.1 V  
MIN MAX  
1.8 ± 0.15 V  
MIN MAX  
2.5 ± 0.2 V  
MIN MAX  
3.3 ± 0.3 V  
MIN MAX  
UNIT  
-40°C to 85°C  
-40°C to 125°C  
-40°C to 85°C  
-40°C to 125°C  
-40°C to 85°C  
-40°C to 125°C  
-40°C to 85°C  
-40°C to 125°C  
-40°C to 85°C  
-40°C to 125°C  
-40°C to 85°C  
-40°C to 125°C  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
79  
79  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
39  
39  
36  
36  
9
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
22  
22  
18  
18  
9
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
7
7
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
4
5
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
4
4
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
3
4
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
3
4
A
B
A
A
B
A
B
Propagation  
delay  
tpd  
ns  
144  
144  
9
7
5
4
4
3
B
8
6
5
4
4
9
9
9
9
9
DIR  
DIR  
DIR  
DIR  
12  
12  
95  
95  
185  
93  
58  
59  
12  
71  
75  
149  
156  
41  
42  
12  
21  
27  
33  
40  
26  
27  
12  
14  
19  
25  
31  
23  
25  
12  
12  
17  
23  
29  
23  
24  
12  
10  
13  
19  
22  
22  
24  
12  
10  
12  
22  
24  
22  
24  
tdis Disable time  
ns  
ns  
136  
136  
331  
356  
98  
ten Enable time  
99  
14  
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6.6 Operating Characteristics: TA = 25°C  
PARAMETER  
TEST CONDITIONS  
VCCA  
0.7 V  
VCCB  
0.7 V  
MIN  
TYP  
1.3  
MAX UNIT  
0.8 V  
0.9 V  
1.2 V  
1.5 V  
1.8 V  
2.5 V  
3.3 V  
0.7 V  
0.8 V  
0.9 V  
1.2 V  
1.5 V  
1.8 V  
2.5 V  
3.3 V  
0.7 V  
0.8 V  
0.9 V  
1.2 V  
1.5 V  
1.8 V  
2.5 V  
3.3 V  
0.7 V  
0.8 V  
0.9 V  
1.2 V  
1.5 V  
1.8 V  
2.5 V  
3.3 V  
0.8 V  
0.9 V  
1.2 V  
1.5 V  
1.8 V  
2.5 V  
3.3 V  
0.7 V  
0.8 V  
0.9 V  
1.2 V  
1.5 V  
1.8 V  
2.5 V  
3.3 V  
0.7 V  
0.8 V  
0.9 V  
1.2 V  
1.5 V  
1.8 V  
2.5 V  
3.3 V  
0.7 V  
0.8 V  
0.9 V  
1.2 V  
1.5 V  
1.8 V  
2.5 V  
3.3 V  
1.3  
1.3  
1.3  
Power Dissipation Capacitance CL = 0, RL = Open f = 1  
pF  
per transceiver (A to B)  
MHz, tr = tf = 1 ns  
1.3  
1.4  
1.7  
2.1  
CpdA  
9.2  
9.4  
9.4  
9.8  
Power Dissipation Capacitance CL = 0, RL = Open f = 1  
per transceiver (B to A) MHz, tr = tf = 1 ns  
pF  
pF  
pF  
10.1  
11.0  
14.4  
18.6  
9.2  
9.3  
9.4  
9.7  
Power Dissipation Capacitance CL = 0, RL = Open f = 1  
per transceiver (A to B) MHz, tr = tf = 1 ns  
10.1  
11.0  
14.4  
18.3  
1.3  
CpdB  
1.3  
1.3  
1.3  
Power Dissipation Capacitance CL = 0, RL = Open f = 1  
per transceiver (B to A) MHz, tr = tf = 1 ns  
1.3  
1.4  
1.7  
2.1  
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6.7 Typical Characteristics  
50  
45  
40  
35  
30  
25  
20  
15  
10  
CL = 45 pF  
CL = 62 pF  
CL = 79 pF  
CL = 105 pF  
CL = 123 pF  
CL = 45 pF  
CL = 62 pF  
CL = 79 pF  
CL = 105 pF  
CL = 123 pF  
45  
40  
35  
30  
25  
20  
15  
0.6  
0.9  
1.2  
1.5  
1.8 2.1  
Supply B (V)  
2.4  
2.7  
3
3.3  
0.6  
0.9  
1.2  
1.5  
1.8 2.1  
Supply B (V)  
2.4  
2.7  
3
3.3  
D016  
D001  
TA = 25°C  
VCCA = 0.7 V  
TA = 25°C  
VCCA = 0.8 V  
图 1. Typical Propagation Delay of Low-to-High  
图 2. Typical Propagation Delay of Low-to-High  
(A to B) vs Load Capacitance  
(A to B) vs Load Capacitance  
40  
30  
CL = 45 pF  
CL = 62 pF  
CL = 79 pF  
CL = 105 pF  
CL = 123 pF  
CL = 45 pF  
CL = 62 pF  
CL = 79 pF  
CL = 105 pF  
CL = 123 pF  
27  
24  
21  
18  
15  
12  
9
35  
30  
25  
20  
15  
10  
5
6
0.6  
0.9  
1.2  
1.5  
1.8 2.1  
Supply B (V)  
2.4  
2.7  
3
3.3  
0.6  
0.9  
1.2  
1.5  
1.8 2.1  
Supply B (V)  
2.4  
2.7  
3
3.3  
D002  
D003  
TA = 25°C  
VCCA = 0.9 V  
TA = 25°C  
VCCA = 1.2 V  
图 3. Typical Propagation Delay of Low-to-High  
图 4. Typical Propagation Delay of Low-to-High  
(A to B) vs Load Capacitance  
(A to B) vs Load Capacitance  
30  
27  
CL = 45 pF  
CL = 45 pF  
CL = 62 pF  
CL = 79 pF  
CL = 105 pF  
CL = 123 pF  
CL = 62 pF  
CL = 79 pF  
CL = 105 pF  
CL = 123 pF  
27  
24  
21  
18  
15  
12  
9
24  
21  
18  
15  
12  
9
6
6
3
0.6  
0.9  
1.2  
1.5  
1.8 2.1  
Supply B (V)  
2.4  
2.7  
3
3.3  
0.6  
0.9  
1.2  
1.5  
1.8 2.1  
Supply B (V)  
2.4  
2.7  
3
3.3  
D004  
D005  
TA = 25°C  
VCCA = 1.5 V  
TA = 25°C  
VCCA = 1.8 V  
图 5. Typical Propagation Delay of Low-to-High  
图 6. Typical Propagation Delay of Low-to-High  
(A to B) vs Load Capacitance  
(A to B) vs Load Capacitance  
27  
27  
CL = 45 pF  
CL = 45 pF  
CL = 62 pF  
CL = 79 pF  
CL = 105 pF  
CL = 123 pF  
CL = 62 pF  
CL = 79 pF  
CL = 105 pF  
CL = 123 pF  
24  
21  
18  
15  
12  
9
24  
21  
18  
15  
12  
9
6
6
3
3
0.6  
0.9  
1.2  
1.5  
1.8 2.1  
Supply B (V)  
2.4  
2.7  
3
3.3  
0.6  
0.9  
1.2  
1.5  
1.8 2.1  
Supply B (V)  
2.4  
2.7  
3
3.3  
D007  
D006  
TA = 25°C  
VCCA = 3.3 V  
TA = 25°C  
VCCA = 2.5 V  
图 7. Typical Propagation Delay of Low-to-High  
图 8. Typical Propagation Delay of Low-to-High  
(A to B) vs Load Capacitance  
(A to B) vs Load Capacitance  
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Typical Characteristics (接下页)  
50  
45  
40  
35  
30  
25  
20  
15  
40  
CL = 45 pF  
CL = 62 pF  
CL = 79 pF  
CL = 105 pF  
CL = 123 pF  
CL = 45 pF  
CL = 62 pF  
CL = 79 pF  
CL = 105 pF  
CL = 123 pF  
35  
30  
25  
20  
15  
10  
0.6  
0.9  
1.2  
1.5  
1.8 2.1  
Supply A (V)  
2.4  
2.7  
3
3.3  
0.6  
0.9  
1.2  
1.5  
1.8 2.1  
Supply A (V)  
2.4  
2.7  
3
3.3  
D008  
D009  
TA = 25°C  
VCCA = 0.7 V  
TA = 25°C  
VCCA = 0.8 V  
图 9. Typical Propagation Delay of Low-to-High  
图 10. Typical Propagation Delay of Low-to-High  
(B to A) vs Load Capacitance  
(B to A) vs Load Capacitance  
36  
27.5  
CL = 45 pF  
CL = 45 pF  
33  
30  
27  
24  
21  
18  
15  
12  
9
CL = 62 pF  
CL = 79 pF  
CL = 105 pF  
CL = 123 pF  
CL = 62 pF  
CL = 79 pF  
CL = 105 pF  
CL = 123 pF  
25  
22.5  
20  
17.5  
15  
12.5  
10  
7.5  
0.6  
0.9  
1.2  
1.5  
1.8 2.1  
Supply A (V)  
2.4  
2.7  
3
3.3  
0.6  
0.9  
1.2  
1.5  
1.8 2.1  
Supply A (V)  
2.4  
2.7  
3
3.3  
D010  
D011  
TA = 25°C  
VCCA = 0.9 V  
TA = 25°C  
VCCA = 1.2 V  
图 11. Typical Propagation Delay of Low-to-High  
图 12. Typical Propagation Delay of Low-to-High  
(B to A) vs Load Capacitance  
(B to A) vs Load Capacitance  
30  
25  
CL = 45 pF  
CL = 45 pF  
CL = 62 pF  
CL = 79 pF  
CL = 105 pF  
CL = 123 pF  
CL = 62 pF  
CL = 79 pF  
CL = 105 pF  
CL = 123 pF  
27  
24  
21  
18  
15  
12  
9
22.5  
20  
17.5  
15  
12.5  
10  
7.5  
5
6
0.6  
0.9  
1.2  
1.5  
1.8 2.1  
Supply A (V)  
2.4  
2.7  
3
3.3  
0.6  
0.9  
1.2  
1.5  
1.8 2.1  
Supply A (V)  
2.4  
2.7  
3
3.3  
D012  
D013  
TA = 25°C  
VCCA = 1.5 V  
TA = 25°C  
VCCA = 1.8 V  
图 13. Typical Propagation Delay of Low-to-High  
图 14. Typical Propagation Delay of Low-to-High  
(B to A) vs Load Capacitance  
(B to A) vs Load Capacitance  
30  
30  
CL = 45 pF  
CL = 62 pF  
CL = 79 pF  
CL = 105 pF  
CL = 123 pF  
CL = 45 pF  
27  
24  
21  
18  
15  
12  
9
CL = 62 pF  
CL = 79 pF  
CL = 105 pF  
CL = 123 pF  
25  
20  
15  
10  
5
6
3
0.6  
0.9  
1.2  
1.5  
1.8 2.1  
Supply A (V)  
2.4  
2.7  
3
3.3  
0.6  
0.9  
1.2  
1.5  
1.8 2.1  
Supply A (V)  
2.4  
2.7  
3
3.3  
D014  
D015  
TA = 25°C  
VCCA = 2.5 V  
TA = 25°C  
VCCA = 3.3 V  
图 15. Typical Propagation Delay of Low-to-High  
图 16. Typical Propagation Delay of Low-to-High  
(B to A) vs Load Capacitance  
(B to A) vs Load Capacitance  
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7 Parameter Measurement Information  
7.1 Load Circuit and Voltage Waveforms  
Unless otherwise noted, all input pulses are supplied by generators having the following characteristics:  
•
•
•
f = 1 MHz  
ZO = 50 Ω  
dv/dt ≤ 1 ns/V  
Measurement Point  
2 x VCCO  
Open  
S1  
RL  
Output Pin  
Under Test  
GND  
(1)  
CL  
RL  
(1) CL includes probe and jig capacitance.  
图 17. Load Circuit  
表 9. Load Circuit Conditions  
Parameter  
VCCO  
RL  
CL  
S1  
VTP  
N/A  
N/A  
Δt/Δv Input transition rise or fall rate  
0.65 V – 3.6 V  
1.1 V – 3.6 V  
1 MΩ  
2 kΩ  
15 pF  
15 pF  
Open  
Open  
tpd Propagation (delay) time  
0.65 V – 0.95  
V
20 kΩ  
15 pF  
Open  
N/A  
3 V – 3.6 V  
1.65 V – 2.7 V  
1.1 V – 1.6 V  
2 kΩ  
2 kΩ  
2 kΩ  
15 pF  
15 pF  
15 pF  
2 × VCCO  
2 × VCCO  
2 × VCCO  
0.3 V  
0.15 V  
0.1 V  
ten, tdis Enable time, disable time  
0.65 V – 0.95  
V
20 kΩ  
15 pF  
2 × VCCO  
0.1 V  
3 V – 3.6 V  
1.65 V – 2.7 V  
1.1 V – 1.6 V  
2 kΩ  
2 kΩ  
2 kΩ  
15 pF  
15 pF  
15 pF  
GND  
GND  
GND  
0.3 V  
0.15 V  
0.1 V  
ten, tdis Enable time, disable time  
0.65 V – 0.95  
V
20 kΩ  
15 pF  
GND  
0.1 V  
(1)  
VCCI  
(1)  
VCCI  
Input A, B  
100 kHz  
VCCI / 2  
VCCI / 2  
Input A, B  
500 ps/V œ 100 ns/V  
0 V  
VOH  
0 V  
VOH  
(2)  
tpd  
tpd  
(2)  
Output B, A  
Ensure Monotonic  
Rising and Falling Edge  
(2)  
VOL  
Output B, A  
VCCI / 2  
VCCI / 2  
(2)  
VOL  
1. VCCI is the supply pin associated with the input port.  
2. VOH and VOL are typical output voltage levels that occur with  
specified RL, CL, and S1  
1. VCCI is the supply pin associated with the input port.  
2. VOH and VOL are typical output voltage levels that occur with  
specified RL, CL, and S1  
图 19. Input Transition Rise or Fall Rate  
图 18. Propagation Delay  
18  
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VCCA  
VCCA / 2  
DIR  
VCCA / 2  
GND  
(1)  
ten  
(5)  
VCCO  
Output A(2)  
Output A(3)  
VCCO / 2  
VOL + VTP  
(6)  
VOL  
tdis  
(6)  
VOH  
VOH - VTP  
VCCO / 2  
GND  
(1)  
ten  
(5)  
VCCO  
Output B(2)  
Output B(3)  
VCCO / 2  
VOL + VTP  
(6)  
VOL  
tdis  
(6)  
VOH  
VOH - VTP  
VCCO / 2  
GND  
1. Illustrative purposes only. Enable Time is a calculation as described in the data sheet.  
2. Output waveform on the condition that input is driven to a valid Logic Low.  
3. Output waveform on the condition that input is driven to a valid Logic High.  
4. VCCI is the supply pin associated with the input port  
5. VCCO is the supply pin associated with the output port.  
6. VOH and VOL are typical output voltage levels that occur with specified RL, CL, and S1  
图 20. Disable and Enable Time  
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8 Detailed Description  
8.1 Overview  
The SN74AXC1T45-Q1 is AEC-Q100 qualified single-bit, dual-supply, non-inverting voltage level translator. Pin A  
and the direction control pin are referenced to VCCA logic levels and pin B is referenced to VCCB logic levels, as  
depicted in the Functional Block Diagram. The A port can accept I/O voltages ranging from 0.65 V to 3.6 V, and  
the B port can accept I/O voltages from 0.65 V to 3.6 V. A logic high on the DIR pin enables data transmission  
from A to B and a logic low on the DIR pin enables data transmission from B to A.  
8.2 Functional Block Diagram  
5
DIR  
3
A
4
B
V
V
CCB  
CCA  
图 21. Functional Block Diagram  
8.3 Feature Description  
8.3.1 Standard CMOS Inputs  
Standard CMOS inputs are high impedance and are typically modeled as a resistor in parallel with the input  
capacitance given in the Electrical Characteristics. The worst case resistance is calculated with the maximum  
input voltage, given in the Absolute Maximum Ratings, and the maximum input leakage current, given in the  
Electrical Characteristics, using ohm's law (R = V ÷ I).  
Signals applied to the inputs need to have fast edge rates, as defined by Δt/Δv in Recommended Operating  
Conditions to avoid excessive current consumption and oscillations. If a slow or noisy input signal is required, a  
device with a Schmitt-trigger input should be used to condition the input signal prior to the standard CMOS input.  
8.3.2 Balanced High-Drive CMOS Push-Pull Outputs  
A balanced output allows the device to sink and source similar currents. The high drive capability of this device  
creates fast edges into light loads so routing and load conditions should be considered to prevent ringing.  
Additionally, the outputs of this device are capable of driving larger currents than the device can sustain without  
being damaged. The electrical and thermal limits defined in the Absolute Maximum Ratings must be followed at  
all times.  
8.3.3 Partial Power Down (Ioff  
)
The inputs and outputs for this device enter a high-impedance state when the device is powered down, inhibiting  
current backflow into the device. The maximum leakage into or out of any input or output pin on the device is  
specified by Ioff in the Electrical Characteristics.  
8.3.4 VCC Isolation  
The inputs and outputs for this device enter a high-impedance state when either supply is <100mV.  
20  
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Feature Description (接下页)  
8.3.5 Over-voltage Tolerant Inputs  
Input signals to this device can be driven above the supply voltage so long as they remain below the maximum  
input voltage value specified in the Recommended Operating Conditions.  
8.3.6 Negative Clamping Diodes  
The inputs and outputs to this device have negative clamping diodes as depicted in 图 22.  
CAUTION  
Voltages beyond the values specified in the Absolute Maximum Ratings table can  
cause damage to the device. The input negative-voltage and output voltage ratings  
may be exceeded if the input and output clamp-current ratings are observed.  
VCC  
Device  
Input  
Output  
Logic  
GND  
-IIK  
-IOK  
图 22. Electrical Placement of Clamping Diodes for Each Input and Output  
8.3.7 Fully Configurable Dual-Rail Design  
Both the VCCA and VCCB pins can be supplied at any voltage from 0.65 V to 3.6 V, making the device suitable for  
translating between any of the voltage nodes (0.7 V, 0.8 V, 0.9 V, 1.2 V, 1.8 V, 2.5 V and 3.3 V).  
8.3.8 Supports High-Speed Translation  
The SN74AXC1T45-Q1 device can support high data-rate applications. The translated signal data rate can be up  
to 500 Mbps when the signal is translated from 1.8 V to 3.3 V.  
8.4 Device Functional Modes  
表 10 lists the device functions for the DIR input.  
表 10. Function Table  
INPUT(1)  
OPERATION  
DIR  
L
B data to A bus  
A data to B bus  
H
(1) Input circuits of the data I/Os always are active.  
版权 © 2019, Texas Instruments Incorporated  
21  
 
 
SN74AXC1T45-Q1  
ZHCSK32B –FEBRUARY 2019–REVISED SEPTEMBER 2019  
www.ti.com.cn  
9 Application and Implementation  
注
Information in the following applications sections is not part of the TI component  
specification, and TI does not warrant its accuracy or completeness. TI’s customers are  
responsible for determining suitability of components for their purposes. Customers should  
validate and test their design implementation to confirm system functionality.  
9.1 Application Information  
The SN74AXC1T45-Q1 device can be used in level-translation applications for interfacing devices or systems  
with one another when they are operating at different interface voltages. The maximum data rate can be up to  
500 Mbps when the device translate signals from 1.8 V to 3.3 V.  
9.1.1 Enable Times  
Calculate the enable times for the SN74AXC1T45-Q1 using the following formulas:  
tPZH (DIR to A) = tPLZ (DIR to B) + tPLH (B to A)  
tPZL (DIR to A) = tPHZ (DIR to B) + tPHL (B to A)  
tPZH (DIR to B) = tPLZ (DIR to A) + tPLH (A to B)  
tPZL (DIR to B) = tPHZ (DIR to A) + tPHL (A to B)  
(1)  
(2)  
(3)  
(4)  
In a bidirectional application, these enable times provide the maximum delay time from the time the DIR bit is  
switched until an output is expected. For example, if the SN74AXC1T45-Q1 initially is transmitting from A to B,  
then the DIR bit is switched; the B port of the device must be disabled before presenting it with an input. After the  
B port has been disabled, an input signal applied to it appears on the corresponding A port after the specified  
propagation delay.  
9.2 Typical Applications  
9.2.1 Interrupt Request Application  
图 23 shows an example of the SN74AXC1T45-Q1 being used in an application where a system controller flags  
an interrupt request (IRQ) to the CPU. The system controller determines the direction of the IRQ line to either  
flag an interrupt to the CPU or allow the CPU to drive data on the line. In this application the controller is  
operating at 3.3 V while the CPU can be operating as low as 0.65 V.  
The SN74AXC1T45-Q1 device is used to ensure that these devices can communicate at the appropriate voltage  
levels. Because the SN74AXC1T45-Q1 does not have an output-enable (OE) pin, the system designer should  
take precautions to avoid bus contention between the CPU and controller when changing directions.  
0.7 V  
3.3 V  
0.1 µF  
0.1 µF  
VCCA  
VCCB  
IRQ  
Data  
IRQ  
Data  
CPU  
Controller  
B
SN74AXC1T45-Q1  
GND  
A
IRQ  
Direction  
DIR  
图 23. Interrupt Request Application  
9.2.1.1 Design Requirements  
For this design example, use the parameters listed in 表 11.  
22  
版权 © 2019, Texas Instruments Incorporated  
 
 
SN74AXC1T45-Q1  
www.ti.com.cn  
ZHCSK32B –FEBRUARY 2019–REVISED SEPTEMBER 2019  
Typical Applications (接下页)  
表 11. Design Parameters  
DESIGN PARAMETERS  
Input voltage range  
EXAMPLE VALUES  
0.65 V to 3.6 V  
Output voltage range  
0.65 V to 3.6 V  
9.2.1.2 Detailed Design Procedure  
To begin the design process, determine the following:  
•
Input voltage range  
–
Use the supply voltage of the device that is driving the SN74AXC1T45-Q1 device to determine the input  
voltage range. For a valid logic-high, the value must exceed the high-level input voltage (VIH) of the input  
port. For a valid logic low the value must be less than the low-level input voltage (VIL) of the input port.  
•
Output voltage range  
–
Use the supply voltage of the device that the SN74AXC1T45-Q1 device is driving to determine the output  
voltage range.  
9.2.1.3 Application Curve  
图 24. Up Translation at 2.5 MHz (0.7 V to 3.3 V)  
版权 © 2019, Texas Instruments Incorporated  
23  
 
SN74AXC1T45-Q1  
ZHCSK32B –FEBRUARY 2019–REVISED SEPTEMBER 2019  
www.ti.com.cn  
9.2.2 Universal Asynchronous Receiver-Transmitter (UART) Interface Application  
图 25 shows the SN74AXC1T45-Q1 being used for the two-bit UART interface application. One SN74AXC1T45-  
Q1 device is used to level shift the voltage and drive the TX from the processor to the GPS Module while a  
second SN74AXC1T45-Q1 device is used to drive the TX Data line from the GPS Module to the Processor.  
0.7 V  
3.3 V  
0.1 µF  
0.1 µF  
VCCA  
VCCB  
RX  
TX  
B
SN74AXC1T45-Q1  
GND  
A
DIR  
0.1 µF  
0.1 µF  
Processor  
GPS Module  
VCCA  
VCCB  
TX  
RX  
B
SN74AXC1T45-Q1  
GND  
A
DIR  
图 25. UART Interface Application  
9.2.2.1 Design Requirements  
Refer to Design Requirements.  
9.2.2.2 Detailed Design Procedure  
Refer to Detailed Design Procedure.  
24  
版权 © 2019, Texas Instruments Incorporated  
 
SN74AXC1T45-Q1  
www.ti.com.cn  
ZHCSK32B –FEBRUARY 2019–REVISED SEPTEMBER 2019  
10 Power Supply Recommendations  
Always apply a ground reference to the GND pins first. This device is designed for glitch free power sequencing  
without any supply sequencing requirements such as ramp order or ramp rate.  
This device was designed with various power supply sequencing methods in mind to help prevent unintended  
triggering of downstream devices. For more information regarding the power up glitch performance of the AXC  
family of level translators, see the Power Sequencing for AXC Family of Devices application report  
11 Layout  
11.1 Layout Guidelines  
To ensure reliability of the device, following common printed-circuit board layout guidelines are recommended:  
•
•
Use bypass capacitors on the power supply pins and place them as close to the device as possible.  
Use short trace lengths to avoid excessive loading.  
11.2 Layout Example  
LEGEND  
Polygonal Copper Pour  
VIA to Power Plane  
VIA to GND Plane (Inner Layer)  
VCCB  
VCCA  
6
5
4
1
2
3
VCCA  
GND  
A
VCCB  
DIR  
B
VCCA  
From Controller  
To System  
图 26. PCB Layout Example  
版权 © 2019, Texas Instruments Incorporated  
25  
SN74AXC1T45-Q1  
ZHCSK32B –FEBRUARY 2019–REVISED SEPTEMBER 2019  
www.ti.com.cn  
12 器件和文档支持  
12.1 文档支持  
相关文档请参见以下部分：  
•
•
•
德州仪器 (TI)，《使用通用 EVM 评估 SN74AXC1T45DRL》应用报告  
德州仪器 (TI)，《慢速或浮点 CMOS 输入的影响》应用报告  
德州仪器 (TI)，《AXC 系列器件电源定序》应用报告  
12.2 接收文档更新通知  
要接收文档更新通知，请导航至 ti.com. 上的器件产品文件夹。单击右上角的通知我进行注册，即可每周接收产品  
信息更改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。  
12.3 支持资源  
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight  
from the experts. Search existing answers or ask your own question to get the quick design help you need.  
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do  
not necessarily reflect TI's views; see TI's Terms of Use.  
12.4 商标  
E2E is a trademark of Texas Instruments.  
12.5 静电放电警告  
ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可  
能会损坏集成电路。  
ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。 精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可  
能会导致器件与其发布的规格不相符。  
12.6 Glossary  
SLYZ022 — TI Glossary.  
This glossary lists and explains terms, acronyms, and definitions.  
13 机械、封装和可订购信息  
以下页面包含机械、封装和可订购信息。这些信息是指定器件的最新可用数据。数据如有变更，恕不另行通知，且  
不会对此文档进行修订。如需获取此数据表的浏览器版本，请查阅左侧的导航栏。  
26  
版权 © 2019, Texas Instruments Incorporated  
PACKAGE OPTION ADDENDUM  
www.ti.com  
10-Dec-2020  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan  
Lead finish/  
Ball material  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
(6)  
SN74AXC1T45QDCKRQ1  
SN74AXC1T45QDRYRQ1  
ACTIVE  
ACTIVE  
SC70  
SON  
DCK  
DRY  
6
6
3000 RoHS & Green  
5000 RoHS & Green  
NIPDAU  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
-40 to 125  
-40 to 125  
1E1  
G2  
NIPDAU  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance  
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may  
reference these types of products as "Pb-Free".  
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.  
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based  
flame retardants must also meet the <=1000ppm threshold requirement.  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
(6)  
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two  
lines if the finish value exceeds the maximum column width.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
10-Dec-2020  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
16-Jun-2023  
TAPE AND REEL INFORMATION  
REEL DIMENSIONS  
TAPE DIMENSIONS  
K0  
P1  
W
B0  
Reel  
Diameter  
Cavity  
A0  
A0 Dimension designed to accommodate the component width  
B0 Dimension designed to accommodate the component length  
K0 Dimension designed to accommodate the component thickness  
Overall width of the carrier tape  
W
P1 Pitch between successive cavity centers  
Reel Width (W1)  
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE  
Sprocket Holes  
Q1 Q2  
Q3 Q4  
Q1 Q2  
Q3 Q4  
User Direction of Feed  
Pocket Quadrants  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
SN74AXC1T45QDCKRQ1 SC70  
SN74AXC1T45QDRYRQ1 SON  
DCK  
DRY  
6
6
3000  
5000  
178.0  
180.0  
9.0  
9.5  
2.4  
1.2  
2.5  
1.2  
0.7  
4.0  
4.0  
8.0  
8.0  
Q3  
Q1  
1.65  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
16-Jun-2023  
TAPE AND REEL BOX DIMENSIONS  
Width (mm)  
H
W
L
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
SN74AXC1T45QDCKRQ1  
SN74AXC1T45QDRYRQ1  
SC70  
SON  
DCK  
DRY  
6
6
3000  
5000  
190.0  
189.0  
190.0  
185.0  
30.0  
36.0  
Pack Materials-Page 2  
GENERIC PACKAGE VIEW  
DRY 6  
USON - 0.6 mm max height  
PLASTIC SMALL OUTLINE - NO LEAD  
Images above are just a representation of the package family, actual package may vary.  
Refer to the product data sheet for package details.  
4207181/G  
PACKAGE OUTLINE  
DRY0006B  
USON - 0.55 mm max height  
S
C
A
L
E
8
.
5
0
0
PLASTIC SMALL OUTLINE - NO LEAD  
1.05  
0.95  
A
B
PIN 1 INDEX AREA  
1.5  
1.4  
C
0.55 MAX  
SEATING PLANE  
0.08 C  
0.05  
0.00  
3X 0.6  
SYMM  
(0.127) TYP  
(0.05) TYP  
3
4
4X  
0.5  
SYMM  
2X  
1
6
1
0.25  
6X  
0.15  
PIN 1 ID  
(OPTIONAL)  
0.1  
C A  
C
B
0.05  
0.35  
0.25  
6X  
4222207/B 02/2016  
NOTES:  
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing  
per ASME Y14.5M.  
2. This drawing is subject to change without notice.  
www.ti.com  
EXAMPLE BOARD LAYOUT  
DRY0006B  
USON - 0.55 mm max height  
PLASTIC SMALL OUTLINE - NO LEAD  
SYMM  
6X (0.3)  
1
6
6X (0.2)  
SYMM  
4X (0.5)  
4
3
(R0.05) TYP  
(0.6)  
LAND PATTERN EXAMPLE  
1:1 RATIO WITH PKG SOLDER PADS  
SCALE:40X  
0.05 MAX  
ALL AROUND  
0.05 MIN  
ALL AROUND  
METAL  
SOLDER MASK  
OPENING  
SOLDER MASK  
OPENING  
METAL UNDER  
SOLDER MASK  
NON SOLDER MASK  
DEFINED  
SOLDER MASK  
DEFINED  
(PREFERRED)  
SOLDER MASK DETAILS  
4222207/B 02/2016  
NOTES: (continued)  
3. For more information, see QFN/SON PCB application report in literature No. SLUA271 (www.ti.com/lit/slua271).  
www.ti.com  
EXAMPLE STENCIL DESIGN  
DRY0006B  
USON - 0.55 mm max height  
PLASTIC SMALL OUTLINE - NO LEAD  
SYMM  
6X (0.3)  
1
6
6X (0.2)  
SYMM  
4X (0.5)  
4
3
(R0.05) TYP  
(0.6)  
SOLDER PASTE EXAMPLE  
BASED ON 0.075 - 0.1 mm THICK STENCIL  
SCALE:40X  
4222207/B 02/2016  
NOTES: (continued)  
4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate  
design recommendations.  
www.ti.com  
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