TPS65145PWPR [TI]
TRIPLE OUTPUT LCD SUPPLY WITH LINEAR REGULATOR AND POWER GOOD; 与线性稳压器和电源良好三路输出LCD电源
| 型号： | TPS65145PWPR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | TRIPLE OUTPUT LCD SUPPLY WITH LINEAR REGULATOR AND POWER GOOD |
| 文件： | 总24页 (文件大小：853K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPS65140
TPS65145
www.ti.com
SLVS497B–SEPTEMBER 2003–REVISED MARCH 2004
TRIPLE OUTPUT LCD SUPPLY WITH LINEAR REGULATOR AND POWER GOOD
FEATURES
DESCRIPTION
•
•
•
•
2.7-V to 5.8-V Input Voltage Range
1.6-MHz Fixed Switching Frequency
3 Independent Adjustable Outputs
The TPS65140/145 offers a compact and small
power supply solution to provide all three voltages
required by thin film transistor (TFT) LCD displays.
The auxiliary linear regulator controller can be used
to generate a 3.3-V logic power rail for systems
powered by a 5-V supply rail only.
Main Output up to 15 V With <1% Typical
Output Voltage Accuracy
•
•
•
•
•
•
•
•
•
Negative Output Voltage Down to -12 V/20 mA
Positive Output Voltage up to 30 V/20 mA
Auxiliary 3.3-V Linear Regulator Controller
Internal Soft Start
The main output Vo1 is a 1.6-MHz fixed frequency
PWM boost converter providing the source drive
voltage for the LCD display. The device is available in
two versions with different internal switch current
limits to allow the use of a smaller external inductor
when lower output power is required. The TPS65140
has a typical switch current limit of 2.3 A and the
TPS65145 has a typical switch current limit of 1.37 A.
Internal Power-On Sequencing
Fault Detection of all Outputs
Thermal Shutdown
A
fully integrated adjustable charge pump
System Power Good
doubler/tripler provides the positive LCD gate drive
voltage. An externally adjustable negative charge
pump provides the negative gate drive voltage. Due
to the high 1.6-MHz switching frequency of the
charge pumps, inexpensive and small 220-nF capaci-
tors can be used.
Available in TSSOP-24 and QFN-24
PowerPAD™ Packages
APPLICATIONS
•
•
•
•
•
•
TFT LCD Displays for Notebooks
TFT LCD Displays for Monitors
Portable DVD Players
Tablet PCs
Car Navigation Systems
Industrial Displays
Additionally, the TPS65140/145 has a system power
good output to indicate when all supply rails are
acceptable. For LCD panels powered by 5 V, only the
TPS65140/145 has a linear regulator controller using
an external transistor to provide a regulated 3.3 V
output for the digital circuits. For maximum safety, the
entire device goes into shutdown as soon as one of
the outputs is out of regulation. The device can be
enabled again by toggling the input or the enable
(EN) pin to GND.
TPS65140/45
Vo1
Vin
Boost
Up to 15 V / 400 mA
2.7 V to 5.8 V
Converter
Vo3
Positive Charge
Pump
Up to 30 V / 20 mA
Negative
Charge Pump
Vo2
Up to −12 V / 20 mA
Power Good
Power Good
Vo4
3.3 V
Linear Regulator
Controller
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2003–2004, Texas Instruments Incorporated
TPS65140
TPS65145
www.ti.com
SLVS497B–SEPTEMBER 2003–REVISED MARCH 2004
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
TYPICAL APPLICATION CIRCUIT
V 1
O
V
L1
4.2 µH
I
Up to 15 V/350 mA
D1
2.7 V to 5.8 V
C3
22 µF
TPS65140
C5
C4
22 µF
R1
R2
VIN
SW
SW
C13
10 nF
COMP
GND
FB1
SUP
C2+
EN
0.22 µF
C1
ENR
C1
0.22 µF
0.22 µF
C2−/MODE
OUT3
C1+
C1−
V 2
O
V 3
O
D2
Up to 12 V/20 mA
Up to 30 V/20 mA
C12
DRV
FB2
FB3
PG
C6
0.22 µF
REF
FB4
PGND
PGND
GND
D3
R3
R4
C7
R5
0.22 µF
BASE
R6
Q1
BCP68
C11
100 nF
V 4
O
3.3 V
V
I
V
I
R7
33 kΩ
C9
4.7 µF
C9
1 µF
System Power
Good
ORDERING INFORMATION
PACKAGE(1)
LINEAR REGULATOR
OUTPUT VOLTAGE
MINIMUM SWITCH
CURRENT LIMIT
TA
PACKAGE
TSSOP
QFN
MARKING
TPS65140
TPS65145
3.3 V
3.3 V
1.6 A
TPS65140PWP
TPS65145PWP
TPS65140RGE
TPS65145RGE
-40°C to 85°C
0.96 A
(1) The PWP and RGE packages are available taped and reeled. Add an R suffix to the device type (TPS65100PWPR) to order the device
taped and reeled. The PWPR package has quantities of 2000 devices per reel, and the the RGER package has 3000 devices per reel.
Without the suffix, the PWP package only, is shipped in tubes with 60 devices per tube.
2
TPS65140
TPS65145
www.ti.com
SLVS497B–SEPTEMBER 2003–REVISED MARCH 2004
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)(1)
UNIT
-0.3 V to 6.0 V
-0.3 V to 15.5 V
-0.3 V to VI + 0.3 V
20 V
Voltages on pin VIN(2)
(2)
Voltages on pin Vo1, SUP, PG
Voltages on pin EN, MODE, ENR(2)
Voltage on pin SW(2)
Power good maximum sink current (PG)
Continuous power dissipation
1 mA
See Dissipation Rating Table
-40°C to 150°C
-65°C to 150°C
260°C
Operating junction temperature range
Storage temperature range
Lead temperature (soldering, 10 sec)
(1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating
conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
DISSIPATION RATINGS
TA≤ 25°C
POWER RATING
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
PACKAGE
RΘJA
24-Pin TSSOP
24-Pin QFN
30.13 C°/W (PWP soldered)
30.0 C°/W
3.3 W
3.3 W
1.83 W
1.8 W
1.32 W
1.3 W
RECOMMENDED OPERATING CONDITIONS
MIN
TYP
MAX
UNIT
V
VIN
L
Input voltage range
Inductor(1)
2.7
5.8
4.7
µH
°C
TA
TJ
Operating ambient temperature
Operating junction temperature
-40
-40
85
125
°C
(1) Refer to the application information section for further information.
ELECTRICAL CHARACTERISTICS
Vin = 3.3 V, EN = VIN, Vo1 = 10 V, TA= -40°C to 85°C, typical values are at TA = 25°C (unless otherwise noted)
PARAMETER
SUPPLY CURRENT
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Vin
Input voltage range
2.7
5.5
0.9
V
ENR = GND, Vo3 = 2 × Vo1,
Boost converter not switching
0.7
mA
IQIN
Quiescent current into VIN
Vo1 = SUP = 10 V, Vo3 = 2 × Vo1
Vo1 = SUP = 10 V, Vo3 = 3 × Vo1
ENR = VIN, EN = GND
1.7
3.9
2.7
6
Charge pump quiescent
current into SUP
IQCharge
IQEN
mA
µA
LDO controller quiescent
current into Vin
300
800
ISD
Shutdown current into VIN EN = ENR = GND
1
10
µA
V
VUVLO
Undervoltage lockout
threshold
VI falling
2.2
2.4
Thermal shutdown
Temperature rising
160
°C
LOGIC SIGNALS EN, ENR
VIH
VIL
II
High level input voltage
1.5
V
V
Low level input voltage
Input leakage current
0.4
0.1
EN = GND or VIN
0.01
µA
3
TPS65140
TPS65145
www.ti.com
SLVS497B–SEPTEMBER 2003–REVISED MARCH 2004
ELECTRICAL CHARACTERISTICS (continued)
Vin = 3.3 V, EN = VIN, Vo1 = 10 V, TA= -40°C to 85°C, typical values are at TA = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
MAIN BOOST CONVERTER
Vo1
Output voltage range
5
1
15
V
V
VO1-Vin
Minimum input to output
voltage difference
VREF
VFB
IFB
Reference voltage
1.205
1.136
1.13
1.219
1.154
V
V
Feedback regulation volt-
age
1.146
Feedback input bias cur-
rent
10
100
nA
Vo1 = 10 V, Isw = 500 mA
195
285
2.3
1.37
9
290
420
2.6
1.56
15
N-MOSFET on-resistance
(Q1)
rDS(on)
mΩ
Vo1 = 5 V, Isw = 500 mA
TPS65140
1.6
A
A
N-MOSFET switch current
limit (Q1)
ILIM
TPS65145
0.96
Vo1 = 10 V, Isw = 100 mA
Vo1 = 5 V, Isw = 100 mA
P-MOSFET on-resistance
(Q2)
rDS(on)
IMAX
Ileak
Ω
A
14
22
Maximum P-MOSFET peak
switch current
1
Vsw = 15 V
1
1
10
10
Switch leakage current
Oscillator frequency
µA
Vsw = 0 V
0°C ≤ TA≤ 85°C
1.295
1.191
1.6
2.1
2.1
fSW
MHz
-40°C ≤ TA≤ 85°C
2.7 V ≤ VI ≤ 5.7 V; Iload = 100 mA
0 mA ≤ IO≤ 300 mA
1.6
Line regulation
Load regulation
0.012
0.2
%/V
%/A
NEGATIVE CHARGE PUMP Vo2
Vo2
Vref
Output voltage range
Reference voltage
-2
V
V
1.205
1.213
0
1.219
36
Feedback regulation volt-
age
VFB
IFB
-36
mV
nA
Feedback input bias cur-
rent
10
4.3
2.9
100
8
Q8 P-Channel switch
rDS(on)
rDS(on)
IO = 20 mA
Ω
Q9 N-Channel switch
rDS(on)
4.4
IO
Minimum output current
20
mA
%/V
7 V ≤ Vo1 ≤ 15 V, Iload =10 mA, Vo2 = -5
V
Line regulation
0.09
Load regulation
1 mA ≤ IO≤ 20 mA, Vo2 = -5 V
0.126
%/mA
POSITIVE CHARGE PUMP Vo3
Vo3
Vref
Output voltage range
Reference voltage
30
V
V
1.205
1.187
1.213
1.214
1.219
Feedback regulation volt-
age
VFB
IFB
1.238
100
V
Feedback input bias cur-
rent
10
nA
4
TPS65140
TPS65145
www.ti.com
SLVS497B–SEPTEMBER 2003–REVISED MARCH 2004
ELECTRICAL CHARACTERISTICS (continued)
Vin = 3.3 V, EN = VIN, Vo1 = 10 V, TA= -40°C to 85°C, typical values are at TA = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Q3 P-Channel switch
rDS(on)
9.9
15.5
Q4 N-Channel switch
rDS(on)
1.1
4.6
1.2
610
1.8
8.5
2.2
720
rDS(on)
IO = 20 mA
Ω
Q5 P-Channel switch
rDS(on)
Q6 N-Channel switch
rDS(on)
D1 – D4 Shottky diode for-
ward voltage
Vd
IO
ID1-D4 = 40 mA
mV
mA
Minimum output current
20
10 V ≤ Vo1 ≤ 15 V, Iload = 10 mA, Vo3 =
27 V
Line regulation
0.56
0.05
%/V
Load regulation
1 mA ≤ IO≤ 20 mA, Vo3 = 27 V
%/mA
LINEAR REGULATOR CONTROLLER Vo4
Vo4
Output voltage
4.5 V≤VI≤ 5.5 V; 10 mA ≤ IO≤500 mA
Vin-Vo4-VBE≥ 0.5 V(1)
3.2
13.5
20
3.3
19
3.4
25
V
Maximum base drive cur-
rent
IBASE
mA
(1)
Vin-Vo4-VBE≥ 0.75 V
27
Line regulation
Load regulation
Start up current
4.75 V ≤ VI≤5.5 V, Iload = 500 mA
1 mA ≤ IO≤ 500 mA, VI = 5 V
Vo4 ≤ 0.8 V
0.186
0.064
20
%/V
%/A
mA
11
SYSTEM POWER GOOD (PG)
V(PG, VO1)
V(PG, VO2) Power good threshold(2)
-12
-13
-11
-8.75% Vo1
-9.5% Vo2
-8% Vo3
-6
-5
V
V
V(PG, VO3)
-5
V
VOL
IL
PG output low voltage
I(sink) = 500 µA
0.3
1
V
PG output leakage current VPG = 5 V
0.001
uA
(1) With Vin = supply voltage of the TPS65140, Vo4 = output voltage of the regulator, VBE = basis emitter voltage of external transistor.
(2) The power good goes high when all 3 outputs (Vo1, Vo2, Vo3) are above their threshold. The power good goes low as soon as one of
the outputs is below their threshold.
DEVICE INFORMATION
PWP PACKAGE
RGE PACKAGE
TOP VIEW
TOP VIEW
1
2
3
4
24
23
22
21
FB1
FB4
EN
ENR
BASE
VIN
COMP
FB2
23 22 21 20
24
19
18
COMP
ENR
EN
1
2
3
4
5
6
C2−/MODE
C2+
SW
5
6
20
19
REF
17
16
15
14
13
SW
GND
DRV
Exposed
Thermal Die*
OUT3
FB3
7
18
17
16
15
14
13
PGND
PGND
SUP
PG
FB1
FB4
8
C1−
GND
9
C1+
PG
BASE
7
8
9
11 12
10
10
11
12
C2−/MODE
C2+
GND
FB3
OUT3
5
TPS65140
TPS65145
www.ti.com
SLVS497B–SEPTEMBER 2003–REVISED MARCH 2004
DEVICE INFORMATION (continued)
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NO.
(PWP)
NAME
VIN
NO. (RGE)
4
7
3
1
I
I
Input voltage pin of the device.
Enable pin of the device. This pin should be terminated and not be left floating. A logic
high enables the device and a logic low shuts down the device.
EN
24
22
COMP
Compensation pin for the main boost converter. A small capacitor is connected to this
pin.
Open drain output indicating when all outputs Vo1, Vo2, Vo3 are within 10% of their
nominal output voltage. The output goes low when one of the outputs falls below 10%
of their nominal output voltage.
PG
10
23
13
2
O
I
Enable pin of the linear regulator controller. This pin should be terminated and not be
left floating. Logic high enables the regulator and a logic low puts the regulator in
shutdown.
ENR
C1+
C1-
16
17
18
21
20
19
20
21
24
23
Positive terminal of the charge pump flying capacitor
Negative terminal of the charge pump flying capacitor
External charge pump driver
DRV
FB2
REF
O
I
Feedback pin of negative charge pump
Internal reference output typically 1.23 V
O
Feedback pin of the linear regulator controller. The linear regulator controller is set to a
fixed output voltage of 3.3 V or 3.0 V depending on the version.
FB4
2
5
I
BASE
GND
3
11, 19
7, 8
12
6
O
Base drive output for the external transistor
Ground
14, 22
10, 11
15
PGND
FB3
Power ground
I
Feedback pin of positive charge pump
Positive charge pump output
OUT3
13
16
O
Negative terminal of the charge pump flying capacitor and charge pump MODE pin. If
the flying capacitor is connected to this pin, the converter operates in a voltage tripler
mode. If the charge pump needs to operate in a voltage doubler mode, the flying
capacitor is removed and the C2-/MODE pin needs to be connected to GND.
C2-/MODE
C2+
15
14
9
18
17
12
Positive terminal for the charge pump flying capacitor. If the device runs in voltage
doubler mode, this pin needs to be left open.
Supply pin of the positive, negative charge pump, boost converter, and gate drive
circuit. This pin needs to be connected to the output of the main boost converter and
cannot be connected to any other voltage source. For performance reasons, it is not
recommended for a bypass capacitor to be connected directly to this pin.
SUP
I
FB1
SW
1
4
I
I
Feedback pin of the boost converter
Switch pin of the boost converter
5, 6
8, 9
PowerPAD
™/Thermal
Die
The PowerPAD or exposed thermal die needs to be connected to power ground pins
(PGND)
6
TPS65140
TPS65145
www.ti.com
SLVS497B–SEPTEMBER 2003–REVISED MARCH 2004
FUNCTIONAL BLOCK DIAGRAM
VIN
SW
SW
Q2
Main boost
converter
D
S
EN
Bias V = 1.213 V
ref
Current Limit
Thermal Shutdown
Start−Up Sequencing
Undervoltage Detection
Overvoltage Detection
Short Circuit Protection
and
Soft Start
FB1
FB2
FB3
1.6-MHz
Oscillator
SUP
Control Logic
Gate Drive Circuit
D
S
Q1
COMP
FB1
Comparator
Sawtooth
Generator
SUP
VFB
1.146 V
FB3
SUP
(V
)
O
Positive
SUP
GM Amplifier
Low Gain
Charge Pump
D
S
Q3
Current
Control
VFB
1.146 V
Vref
1.214 V
C1−
Gain Select
(Doubler or
Tripler Mode)
D
S
Q4
SUP
Negative
Charge Pump
SUP
Soft Start
C1+
D
S
Current
Control
Soft Start
Q8
Q9
D
DRV
Q7
S
D
S
SUP
D
Vo3
C2+
D1
D4
D2
Q5
S
FB2
D3
D
Vref
0 V
Q6
S
C2−
PG
Reference
Output
Vref
1.213 V
Vref
1.213 V
Vin
Soft Start
Iref = 20 mA
REF
FB4
Short Circuit
Detect
System Power
Good
FB1
~1 V
Vref
D
Logic and
1-µs Glitch
Filter
FB2
FB3
S
D
S
Q10
Linear
Regulator
Controller
1.213 V
ENR
BASE
GND
GND
PGND
PGND
7
TPS65140
TPS65145
www.ti.com
SLVS497B–SEPTEMBER 2003–REVISED MARCH 2004
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
Main Boost Converter
Efficiency, main boost converter Vo1
vs Load current
1
2
η
Efficiency, main boost converter Vo1
Efficiency
vs Load current
vs Input voltage
3
fsw
Switching frequency
vs Free-air temperature
vs Free-air temperature
4
rDS(on)
rDS(on) N-Channel main switch Q1
PWM operation continuous mode
PWM operation, discontinuous (light load)
Load transient response, CO = 22 µF
Load transient response, CO = 2*22 µF
Power-up sequencing
5
6
7
8
9
10
11
Soft start Vo1
Negative Charge Pump
Imax
Vo2 maximum load current
vs Output voltage Vo1
12
Positive Charge Pump
Imax
Imax
Vo3 maximum load current
vs Output voltage Vo1 (doubler mode)
vs Output voltage Vo1 (tripler mode)
13
14
Vo3 Maximum load current
EFFICIENCY
vs
LOAD CURRENT
EFFICIENCY
vs
LOAD CURRENT
EFFICIENCY
vs
INPUT VOLTAGE
100
90
100
100
95
ILoad at Vo1 = 100 mA
Vo2, Vo3 = No Load, Switching
90
80
Vo1 = 6 V
80
70
60
50
40
Vo1 = 10 V
Vo1 = 6 V
90
70
60
50
Vo1 = 10 V
Vo2 = 10 V
85
80
Vo1 = 15 V
Vo1 = 15 V
Vo3 = 15 V
40
30
20
30
20
10
75
70
V = 3.3 V
Vo2, Vo3 = No Load, Switching
V = 5 V
Vo2, Vo3 = No Load, Switching
I
I
10
1
10 100
1 k
1
10 100
1 k
2.5
3
3.5
4
4.5
5
5.5
6
I
− Load Current − mA
I
− Load Current − mA
V − Input Voltage − V
I
L
L
Figure 1.
Figure 2.
Figure 3.
8
TPS65140
TPS65145
www.ti.com
SLVS497B–SEPTEMBER 2003–REVISED MARCH 2004
TYPICAL CHARACTERISTICS (continued)
SWITCHING FREQUENCY
vs
FREE-AIR TEMPERATURE
rDS(on) N-CHANNEL MAIN SWITCH
vs
PWM OPERATION CONTINUOUS
MODE
FREE-AIR TEMPERATURE
1.9
1.8
1.7
1.6
1.5
350
300
250
V
SW
V = 2.7 V
I
10 V/div
Vo1 = 5 V
V = 3.3 V
I
V
O
50 mV/div
V = 5.8 V
I
200
150
100
Vo1 = 10 V
1.4
1.3
I
V = 3.3 V
I
V = 10 V/300 mA
O
L
Vo1 = 15 V
1 A/div
−40 −20
0
20
40
60
80 100
−40 −20
0
20
40
60
80
100
250 ns/div
T − Free-Air Temperature − °C
A
T
A
− Free-Air Temperature − °C
Figure 4.
Figure 5.
Figure 6.
LOAD TRANSIENT RESPONSE
PWM OPERATION AT LIGHT LOAD
LOAD TRANSIENT RESPONSE
V
= 3.3 V
I
Vo1 = 10 V, C = 2*22 µF
O
Vo1
200 mV/div
Vo1
100 mV/div
V
SW
10 V/div
V
O
50 mV/div
V
V
= 3.3 V
I
= 10 V/10 mA
O
I
I
O
O
V
= 3.3 V
I
50 mA to 250 mA
50 mA to 250 mA
I
Vo1 = 10 V, C = 22 µF
L
O
500 mA/div
100 µs/div
100 µs/div
250 ns/div
Figure 7.
POWER-UP SEQUENCING
Figure 8.
SOFT START Vo1
Figure 9.
Vo2 MAXIMUM LOAD CURRENT
0.20
0.18
0.16
0.14
0.12
0.10
0.08
V = 3.3 V
Vo2 = −8 V
I
V
= 10 V,
O
T
= −40°C
A
I
= 300 mA
O
Vo1
5 V/div
T
A
= 85°C
Vo1
5 V/div
Vo2
5 V/div
T
= 25°C
A
0.06
0.04
Vo3
10 V/div
I
I
V = 3.3 V
I
500
mA/div
V
= 10 V,
O
0.02
0
8.8
9.8
10.8 11.8 12.8 13.8 14.8
500 µs/div
500 µs/div
Vo1 − Output Voltage − V
Figure 10.
Figure 11.
Figure 12.
9
TPS65140
TPS65145
www.ti.com
SLVS497B–SEPTEMBER 2003–REVISED MARCH 2004
TYPICAL CHARACTERISTICS (continued)
Vo3 MAXIMUM LOAD CURRENT
Vo3 MAXIMUM LOAD CURRENT
0.14
0.12
0.10
0.08
0.06
0.04
0.02
0
T
= −40°C
Vo3 = 18 V (Doubler Mode)
A
0.12
T
A
= −40°C
T
A
= 85°C
0.10
0.08
0.06
0.04
T
A
= 25°C
T
A
= 25°C
T
A
= 85°C
0.02
0
Vo3 = 28 V (Tripler Mode)
11 12 13 14
9
9
10
15
10
11
12
13
14
15
Vo1 − Output Voltage − V
Vo1 − Output Voltage − V
Figure 13.
Figure 14.
DETAILED DESCRIPTION
The TPS65140/45 consists of a main boost converter operating with a fixed switching frequency of 1.6 MHz to
allow for small external components. The boost converter output voltage Vo1 is also the input voltage, connected
via the pin SUP, for the positive and negative charge pump. The linear regulator controller is independent from
this system with its own enable pin. This allows the linear regulator controller to continue to operate while the
other supply rails are disabled or in shutdown due to a fault condition on one of their outputs. Refer to the
functional block diagram for more information.
Main Boost Converter
The main boost converter operates with PWM and a fixed switching frequency of 1.6 MHz. The converter uses a
unique fast response, voltage mode controller scheme with input voltage feedforward. This achieves excellent
line and load regulation (0.2% A load regulation typical) and allows the use of small external components. To add
higher flexibility to the selection of external component values, the device uses external loop compensation.
Although the boost converter looks like a nonsynchronous boost converter topology operating in discontinuous
mode at light load, the TPS65140/45 maintains continuous conduction even at light load currents.
This is achieved with a novel architecture using an external Schottky diode and an integrated MOSFET in parallel
connected between SW and SUP (see the functional block diagram). The integrated MOSFET Q2 allows the
inductor current to become negative at light load conditions. For this purpose, a small integrated P-channel
MOSFET with typically 10 Ω rDS(on) is sufficient. When the inductor current is positive, the external Schottky diode
with the lower forward voltage conducts the current. This causes the converter to operate with a fixed frequency
in continuous conduction mode over the entire load current range. This avoids the ringing on the switch pin as
seen with a standard nonsynchronous boost converter and allows a simpler compensation for the boost
converter.
Power-Good Output
The TPS65140/45 has an open-drain power-good output with a maximum sink capability of 1 mA. The
power-good output goes high as soon as the main boost converter Vo1 and the negative and the positive charge
pumps are within regulation. The power-good output goes low as soon as one of the outputs is out of regulation.
In this case, the device goes into shutdown at the same time. See the electrical characteristics table for the
power-good thresholds.
Enable and Power-On Sequencing (EN, ENR)
The device has two enable pins. These pins should be terminated and not left floating to prevent faulty operation.
Pulling the enable pin (EN) high enables the device and starts the power-on sequencing with the main boost
converter Vo1 coming up first, then the negative and positive charge pumps. The linear regulator has an
independent enable pin (ENR). Pulling this pin low disables the regulator, and pulling this pin high enables this
regulator.
10
TPS65140
TPS65145
www.ti.com
SLVS497B–SEPTEMBER 2003–REVISED MARCH 2004
If the enable pin (EN) is pulled high, the device starts its power-on sequencing. The main boost converter starts
up first with its soft start. If the output voltage has reached 91.25% of its output voltage, the negative charge
pump comes up next. The negative charge pump starts with a soft start and when the output voltage has
reached 91% of the nominal value, the positive charge pump comes up with the soft start.
Pulling the enable pin low shuts down the device. Dependent on load current and output capacitance, each of
the outputs comes down.
Positive Charge Pump
The TPS65140/45 has a fully regulated integrated positive charge pump generating Vo3. The input voltage for
the charge pump is applied to the SUP pin that is equal to the output of the main boost converter Vo1. The
charge pump is capable of supplying a minimum load current of 20 mA. Higher load currents are possible
depending on the voltage difference between Vo1 and Vo3. See Figure 13 and Figure 14.
Negative Charge Pump
The TPS65140/45 has a regulated negative charge pump using two external Schottky diodes. The input voltage
for the charge pump is applied to the SUP pin that is connected to the output of the main boost converter Vo1.
The charge pump inverts the main boost converter output voltage and is capable of supplying a minimum load
current of 20 mA. Higher load currents are possible depending on the voltage difference between Vo1 and Vo2.
See Figure 12.
Linear Regulator Controller
The TPS65140/45 includes a linear regulator controller to generate a 3.3-V rail which is useful when the system
is powered from a 5-V supply. The regulator is independent from the other voltage rails of the device and has its
own enable (ENR).
Soft Start
The main boost converter as well as the charge pumps and linear regulator have an internal soft start. This
avoids heavy voltage drops at the input voltage rail or at the output of the main boost converter Vo1 during
start-up caused by high inrush currents. See Figure 10 and Figure 11.
Fault Protection
All of the outputs of the TPS65140/45 have short-circuit detection and cause the device to go into shutdown. The
main boost converter has overvoltage and undervoltage protection. If the output voltage Vo1 rises above the
overvoltage protection threshold of typically 5% of Vo1, then the device stops switching, but remains operational.
When the output voltage falls below this threshold, the converter continues operation. When the output voltage
falls below the undervoltage protection threshold of typically 8.75% of Vo1, because of a short-circuit condition,
the TPS65140/45 goes into shutdown. Because there is a direct pass from the input to the output through the
diode, the short-circuit condition remains. If this condition needs to be avoided, a fuse at the input or an output
disconnect using a single transistor and resistor is required. The negative and positive charge pumps have an
undervoltage lockout (UVLO) to protect the LCD panel of possible latch-up conditions due to a short-circuit
condition or faulty operation. When the negative output voltage is typically above 9.5% of its output voltage
(closer to ground), then the device enters shutdown. When the positive charge pump output voltage, Vo3, is
below 8% typical of its output voltage, the device goes into shutdown. See the fault protection thresholds in the
electrical characteristics table. The device is enabled by toggling the enable pin (EN) below 0.4 V or by cycling
the input voltage below the UVLO of 1.7 V. The linear regulator reduces the output current to 20 mA typical
under a short-circuit condition when the output voltage is typically < 1 V. See the functional block diagram. The
linear regulator does not go into shutdown under a short-circuit condition.
Thermal Shutdown
A thermal shutdown is implemented to prevent damage due to excessive heat and power dissipation. Typically,
the thermal shutdown threshold is 160°C. If this temperature is reached, the device goes into shutdown. The
device can be enabled by toggling the enable pin to low and back to high or by cycling the input voltage to GND
and back to VI again.
11
TPS65140
TPS65145
www.ti.com
SLVS497B–SEPTEMBER 2003–REVISED MARCH 2004
APPLICATION INFORMATION
BOOST CONVERTER DESIGN PROCEDURE
The first step in the design procedure is to calculate the maximum possible output current of the main boost
converter under certain input and output voltage conditions. Below is an example for a 3.3-V to 10-V conversion:
Vin = 3.3 V, Vout = 10 V, Switch voltage drop Vsw = 0.5 V, Schottky diode forward voltage VD = 0.8 V
1. Duty cycle:
V
) V * V
out
10 V ) 0.8 V * 3.3 V
10 V ) 0.8 V * 0.5 V
D
in
+
D +
+ 0.73
V
) V * V
sw
out
D
2. Average inductor current:
I
out
300 mA
1 * 0.73
I
+
+
+ 1.11 A
L
1 * D
3. Inductor peak-to-peak ripple current:
ƪVin
ƫ
* V
D
sw
f L
(3.3 V * 0.5 V) 0.73
Di +
+
+ 304 mA
L
1.6 MHz 4.2 mH
s
4. Peak switch current:
Di
304 mA
L
I
+ I )
+ 1.11 A )
+ 1.26 A
swpeak
L
2
2
The integrated switch, the inductor, and the external Schottky diode must be able to handle the peak switch
current. The calculated peak switch current has to be equal or lower to the minimum N-MOSFET switch current
limit as specified in the electrical characteristics table (1.6 A for the TPS65140 and 0.96 A for the TPS65145). If
the peak switch current is higher, then the converter cannot support the required load current. This calculation
must be done for the minimum input voltage where the peak switch current is highest. The calculation includes
conduction losses like switch rDS(on) (0.5 V) and diode forward drop voltage losses (0.8 V). Additional switching
losses, inductor core and winding losses, etc., require a slightly higher peak switch current in the actual
application. The above calculation still allows for a good design and component selection.
Inductor Selection
Several inductors work with the TPS65140. Especially with the external compensation, the performance can be
adjusted to the specific application requirements. The main parameter for the inductor selection is the saturation
current of the inductor which should be higher than the peak switch current as calculated above with additional
margin to cover for heavy load transients and extreme start-up conditions. Another method is to choose the
inductor with a saturation current at least as high as the minimum switch current limit of 1.6 A for the TPS65140
and 0.96 A for the TPS65145. The different switch current limits allow selection of a physically smaller inductor
when less output current is required. The second important parameter is the inductor dc resistance. Usually, the
lower the dc resistance, the higher the efficiency. However, the inductor dc resistance is not the only parameter
determining the efficiency. Especially for a boost converter where the inductor is the energy storage element, the
type and material of the inductor influences the efficiency as well. Especially at high switching frequencies of 1.6
MHz, inductor core losses, proximity effects, and skin effects become more important. Usually, an inductor with a
larger form factor yields higher efficiency. The efficiency difference between different inductors can vary between
2% to 10%. For the TPS65140, inductor values between 3.3 µH and 6.8 µH are a good choice but other values
can be used as well. Possible inductors are shown in Table 1.
12
TPS65140
TPS65145
www.ti.com
SLVS497B–SEPTEMBER 2003–REVISED MARCH 2004
APPLICATION INFORMATION (continued)
Table 1. Inductor Selection
DEVICE
INDUCTOR VALUE
4.7 µH
COMPONENT SUPPLIER
Coilcraft DO1813P-472HC
DIMENSIONS
8.89*6.1*5.0
ISAT/DCR
2.6 A/54 mΩ
4.2 µH
4.7 µH
3.3 µH
4.2 µH
3.3 µH
3.3 µH
3.3 µH
3.3 µH
4.7 µH
3.3 µH
Sumida CDRH5D28 4R2
Sumida CDC5D23 4R7
5.7*5.7*3
2.2 A/23 mΩ
1.6 A/48 mΩ
1.8 A/65 mΩ
1.8 A/60 mΩ
1.9 A/50 mΩ
1.5 A/26 mΩ
1.4 A/120 mΩ
1.45 A/69 mΩ
1.0 A/260 mΩ
1.3 A/160 mΩ
6*6*2.5
TPS65140
Wuerth Elektronik 744042003
Sumida CDRH6D12 4R2
Sumida CDRH6D12 3R3
Sumida CDPH4D19 3R3
Coilcraft DO1606T-332
4.8*4.8*2.0
6.5*6.5*1.5
6.5*6.5*1.5
5.1*5.1*2.0
6.5*5.2*2.0
3.2*3.2*2.0
5.5*3.5*1.0
6.6*5.5*1.0
TPS65145
Sumida CDRH2D18/HP 3R3
Wuerth Elektronik 744010004
Coilcraft LPO6610-332M
Output Capacitor Selection
For best output voltage filtering, a low ESR output capacitor is recommended. Ceramic capacitors have a low
ESR value but depending on the application, tantalum capacitors can be used as well. A 22-µF ceramic output
capacitor works for most of the applications. Higher capacitor values can be used to improve load transient
regulation. See Table 2 for the selection of the output capacitor. The output voltage ripple can be calculated as:
I L
I
p
out
1
DV
+
*
) I ESR
p
ƪ
ƫ
out
C
f
V
) V * V
s
out
out
d
in
with:
I = Peak current as described in the previous section peak current control
p
L = Selected inductor value
I
= Nominal load current
out
f = Switching frequency
s
V = Rectifier diode forward voltage (typically 0.3 V)
d
C
out
= Selected output capacitor
ESR = Output capacitor ESR value
Input Capacitor Selection
For good input voltage filtering, low ESR ceramic capacitors are recommended. A 22-µF ceramic input capacitor
is sufficient for most of applications. For better input voltage filtering, this value can be increased. See Table 2
and the typical applications for input capacitor recommendations.
Table 2. Input and Output Capacitors Selection
CAPACITOR
22 µF/1210
22 µF/1206
VOLTAGE RATING
COMPONENT SUPPLIER
Taiyo Yuden EMK325BY226MM
Taiyo Yuden JMK316BJ226
COMMENTS
16V
CO
CI
6.3V
Rectifier Diode Selection
To achieve high efficiency, a Schottky diode should be used. The voltage rating should be higher than the
maximum output voltage of the converter. The average forward current should be equal to the average inductor
current of the converter. The main parameter influencing the efficiency of the converter is the forward voltage and
the reverse leakage current of the diode; both should be as low as possible. Possible diodes are: On
Semiconductor MBRM120L, Microsemi UPS120E, and Fairchild Semiconductor MBRS130L.
13
TPS65140
TPS65145
www.ti.com
SLVS497B–SEPTEMBER 2003–REVISED MARCH 2004
Converter Loop Design and Stability
The TPS65140/45 converter loop can be externally compensated and allows access to the internal
transconductance error amplifier output at the COMP pin. A small feedforward capacitor across the upper
feedback resistor divider speeds up the circuit as well. To test the converter stability and load transient
performance of the converter, a load step from 50 mA to 250 mA is applied and the output voltage of the
converter is monitored. Applying load steps to the converter output is a good tool to judge the stability of such a
boost converter.
Design Procedure Quick Steps
1. Select the feedback resistor divider to set the output voltage.
2. Select the feedforward capacitor to place a zero at 50 kHz.
3. Select the compensation capacitor on pin COMP. The smaller the value, the higher the low frequency gain.
4. Use a 50-kΩ potentiometer in series to Cc and monitor Vout during load transients. Fine tune the load
transient by adjusting the potentiometer. Select a resistor value that comes closest to the potentiometer
resistor value. This needs to be done at the highest Vin and highest load current because stability is most
critical at these conditions.
Setting the Output Voltage and Selecting the Feedforward Capacitor
The output voltage is set by the external resistor divider and is calculated as:
R1
R2
+ 1.146 V ƪ1 ) ƫ
V
out
Across the upper resistor, a bypass capacitor is required to speed up the circuit during load transients as shown
in Figure 15.
V 1
O
Up to 10 V/150 mA
D1
C8
6.8 pF
C4
22 µF
R1
430 kΩ
SW
SW
FB1
SUP
R2
56 kΩ
C2 0.22 µF
C2+
C2−/MODE
Figure 15. Feedforward Capacitor
Together with R1 the bypass capacitor C8 sets a zero in the control loop at approximately 50 kHz:
1
1
C8 +
+
2 p f R1
2 p 50 kHz R1
z
A value closest to the calculated value should be used. Larger feedforward capacitor values reduce the load
regulation of the converter and cause load steps as shown in Figure 16.
14
TPS65140
TPS65145
www.ti.com
SLVS497B–SEPTEMBER 2003–REVISED MARCH 2004
Load Step
Figure 16. Load Step Caused By A Too Large Feedforward Capacitor Value
Compensation
The regulator loop can be compensated by adjusting the external components connected to the COMP pin. The
COMP pin is connected to the output of the internal transconductance error amplifier. A typical compensation
scheme is shown in Figure 17.
C
C
VIN
R
C
COMP
15 kΩ
1 nF
Figure 17. Compensation Network
The compensation capacitor Cc adjusts the low frequency gain, and the resistor value adjusts the high frequency
gain. The following formula calculates at what frequency the resistor increases the high frequency gain.
1
f +
z
2 p Cc Rc
Lower input voltages require a higher gain and a lower compensation capacitor value. A good start is Cc = 1 nF
for a 3.3-V input and Cc = 2.2 nF for a 5-V input. If the device operates over the entire input voltage range from
2.7 V to 5.8 V, a larger compensation capacitor up to 10 nF is recommended. Figure 18 shows the load transient
with a larger compensation capacitor, and Figure 19 shows a smaller compensation capacitor.
C
C
= 4.7 nF
Figure 18. CC = 4. 7 nF
15
TPS65140
TPS65145
www.ti.com
SLVS497B–SEPTEMBER 2003–REVISED MARCH 2004
C
C
= 1 nF
Figure 19. CC = 1 nF
Lastly, Rc needs to be selected. A good practice is to use a 50-kΩ potentiometer and adjust the potentiometer for
the best load transient where no oscillations should occur. These tests have to be done at the highest Vin and
highest load current because the converter stability is most critical under these conditions. Figure 20, Figure 21,
and Figure 22 show the fine tuning of the loop with Rc.
Figure 20. Overcompensated (Damped Oscillation), RC Is Too Large
Figure 21. Undercompensated (Loop Is Too Slow), RC Is Too Small
16
TPS65140
TPS65145
www.ti.com
SLVS497B–SEPTEMBER 2003–REVISED MARCH 2004
Figure 22. Optimum, RC Is Ideal
Negative Charge Pump
The negative charge pump provides a regulated output voltage by inverting the main output voltage, Vo1. The
negative charge pump output voltage is set with external feedback resistors.
The maximum load current of the negative charge pump depends on the voltage drop across the external
Schottky diodes, the internal on resistance of the charge pump MOSFETS Q8 and Q9, and the impedance of the
flying capacitor, C12. When the voltage drop across these components is larger than the voltage difference from
Vo1 to Vo2, the charge pump is in drop out, providing the maximum possible output current. Therefore, the
higher the voltage difference between Vo1 and Vo2, the higher the possible load current. See Figure 12 for the
possible output current versus boost converter voltage Vo1 and the calculations below.
Voutmin = -(Vo1 - 2 VD - Io (2 × rDS(on)Q8 + 2 × rDS(on)Q9 + Xcfly))
Setting the output voltage:
R3
R4
R3
R4
ƪ1 ) ƫ) V + * 1.213 V ƪ1 ) ƫ) 1.213 V
V
+ * V
out
REF
REF
ŤV Ť) V
ŤVoutŤ) 1.213
ȱ
ȳ
out
REF
R3 + R4
* 1 + R4
* 1
ƪ ƫ
ȧ
ȧ
1.213
V
Ȳ
ȴ
REF
The lower feedback resistor value, R4, should be in a range between 40 kΩ to 120 kΩ or the overall feedback
resistance should be within 500 kΩ to 1 MΩ. Smaller values load the reference too heavy and larger values may
cause stability problems. The negative charge pump requires two external Schottky diodes. The peak current
rating of the Schottky diode has to be twice the load current of the output. For a 20 mA output current, the dual
Schottky diode BAT54 or similar is a good choice.
Positive Charge Pump
The positive charge pump can be operated in a voltage doubler mode or a voltage tripler mode depending on the
configuration of the C2+ and C2-/MODE pins. Leaving the C2+ pin open and connecting C2-/MODE to GND
forces the positive charge pump to operate in a voltage doubler mode. If higher output voltages are required the
positive charge pump can be operated as a voltage tripler. To operate the charge pump in the voltage tripler
mode, a flying capacitor needs to be connected to C2+ and C2-/MODE.
The maximum load current of the positive charge pump depends on the voltage drop across the internal Schottky
diodes, the internal on-resistance of the charge pump MOSFETS, and the impedance of the flying capacitor.
When the voltage drop across these components is larger than the voltage difference Vo1 × 2 to Vo3 (doubler
mode) or Vo1 × 3 to Vo3 (tripler mode), then the charge pump is in dropout, providing the maximum possible
output current. Therefore, the higher the voltage difference between Vo1 × 2 (doubler) or Vo1 × 3 (tripler) to Vo3,
the higher the possible load current. See Figure 13 and Figure 14 for output current versus boost converter
voltage, Vo1, and the following calculations.
Voltage doubler:
Vo3max = 2 × Vo1 - (2 VD + 2× Io × (2 × rDS(on)Q5 + rDS(on)Q3 + rDS(on)Q4 + XC1))
17
TPS65140
TPS65145
www.ti.com
SLVS497B–SEPTEMBER 2003–REVISED MARCH 2004
Voltage tripler:
Vo3max = 3 × Vo1 - (3 × VD + 2 × Io × (3 × rDS(on)Q5 + rDS(on)Q3 + rDS(on)Q4 + XC1 + XC2))
The output voltage is set by the external resistor divider and is calculated as:
R5
R6
+ 1.214 ƪ1 ) ƫ
V
out
V
V
out
out
R5 + R6
* 1 + R6
ƪ
* 1
ƫ
ƪ ƫ
1.214
V
FB
Linear Regulator Controller
The TPS65100/05 includes a linear regulator controller to generate a 3.3-V rail when the system is powered from
a 5-V supply. Because an external npn transistor is required, the input voltage of the TPS65140/45 applied to
VIN needs to be higher than the output voltage of the regulator. To provide a minimum base drive current of 13.5
mA, a minimum internal voltage drop of 500 mV from Vin to Vbase is required. This can be translated into a
minimum input voltage on VIN for a certain output voltage as the following calculation shows:
Vinmin = Vo4 + VBE + 0.5 V
The base drive current together with the hFE of the external transistor determines the possible output current.
Using a standard npn transistor like the BCP68 allows an output current of 1 A and using the BCP54 allows a
load current of 337 mA for an input voltage of 5 V. Other transistors can be used as well, depending on the
required output current, power dissipation, and PCB space. The device is stable with a 4.7-µF ceramic output
capacitor. Larger output capacitor values can be used to improve the load transient response when higher load
currents are required.
Thermal Information
An influential component of the thermal performance of a package is board design. To take full advantage of the
heat dissipation abilities of the PowerPAD or QFN package with exposed thermal die, a board that acts similar to
a heatsink and allows for the use of an exposed (and solderable) deep downset pad should be used. For further
information. see Texas Instrumens application notes (SLMA002) PowerPAD Thermally Enhanced Package, and
(SLMA004) Power Pad Made Easy. For the QFN package, see the application report (SLUA271) QFN/SON PCB
Attachement.
Layout Considerations
For all switching power supplies, the layout is an important step in the design, especially at high-peak currents
and switching frequencies. If the layout is not carefully designed, the regulator might show stability and EMI
problems. Therefore, the traces carrying high-switching currents should be routed first using wide and short
traces. The input filter capacitor should be placed as close as possible to the input pin VIN of the IC. See the
evaluation module (EVM) for a layout example.
18
TPS65140
TPS65145
www.ti.com
SLVS497B–SEPTEMBER 2003–REVISED MARCH 2004
Vo1
10V / 150 mA
L1
3.3uH
Vin
3.3V
D1
C3
22uF
TPS65140
R1
430
C5
6.8pF
C4
22uF
C13
1n
R7
15k
VIN
SW
SW
COMP
GND
EN
FB1
R2
56k
SUP
C1
C2
0.22u
0.22u
ENR
C2+
C2−/MODE
C1+
C1−
D2
Vo3
OUT3
C12 0.22u
up to 23V/20mA
Vo2
−5 V / 20 mA
DRV
FB2
FB3
PG
D3
REF
FB4
PGND
PGND
GND
R5
1M
C6
0.22u
R3
620k
C7
0.22u
BASE
R4
150k
R6
56k
C11
220nF
Vin
R7
33k
System Power
Good
Figure 23. Typical Application, Notebook Supply
Vo1
L1
4.7uH
Vin
5.0 V
D1
13.5V / 400 mA
C3
22uF
R7
4.3k
TPS65140
R1
820
C5
3.3pF
C4
22uF
C13
2.2n
VIN
SW
SW
COMP
GND
EN
FB1
R2
75k
SUP
C1
0.22u
ENR
C2+
C2−/MODE
OUT3
C1+
C1−
DRV
D2
Vo3
C12 0.22u
up to 23V/20mA
Vo2
−7 V / 20 mA
FB3
PG
FB2
D3
REF
FB4
PGND
PGND
GND
R5
1M
C6
0.22u
R3
750k
C7
0.22u
BASE
R4
130k
R6
56k
Vo4
3.3V/500mA
Q1
BCP68
C11
220nF
Vin
Vin
R7
33k
System Power
Good
C9
1uF
C10
4.7uF
Figure 24. Typical Application, Monitor Supply
19
THERMAL PAD MECHANICAL DATA
PWP (R-PDSO-G24)
PowerPAD™ PLASTIC SMALL-OUTLINE
www.ti.com
PACKAGE OPTION ADDENDUM
www.ti.com
4-Mar-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
HTSSOP
HTSSOP
QFN
Drawing
PWP
PWP
RGE
TPS65140PWP
TPS65140PWPR
TPS65140RGER
TPS65145PWP
TPS65145PWPR
TPS65145RGER
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
24
24
24
24
24
24
60
None
None
None
None
None
None
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-2-235C-1 YEAR
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-2-235C-1 YEAR
2000
3000
60
HTSSOP
HTSSOP
QFN
PWP
PWP
RGE
2000
3000
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional
product content details.
None: Not yet available Lead (Pb-Free).
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,
including bromine (Br) or antimony (Sb) above 0.1% of total product weight.
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder
temperature.
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Addendum-Page 1
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